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LTC1772

LTC1772

  • 厂商:

    LINER

  • 封装:

  • 描述:

    LTC1772 - Constant Frequency Current Mode Step-Down DC/DC Controller in SOT-23 - Linear Technology

  • 数据手册
  • 价格&库存
LTC1772 数据手册
LTC1772 Constant Frequency Current Mode Step-Down DC/DC Controller in SOT-23 FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO High Efficiency: Up to 94% High Output Currents Easily Achieved Wide VIN Range: 2.5V to 9.8V Constant Frequency 550kHz Operation Burst Mode® Operation at Light Load Low Dropout: 100% Duty Cycle Tiny 6-Lead SOT-23 Package 0.8V Reference Allows Low Output Voltages Current Mode Operation for Excellent Line and Load Transient Response Low Quiescent Current: 270µA Shutdown Mode Draws Only 8µA Supply Current ± 2.5% Reference Accuracy The LTC®1772 is a constant frequency current mode stepdown DC/DC controller providing excellent AC and DC load and line regulation. The device incorporates an accurate undervoltage lockout feature that shuts down the LTC1772 when the input voltage falls below 2.0V. The LTC1772 provides a ±2.5% output voltage accuracy and consumes only 270µA of quiescent current. For applications where efficiency is a prime consideration, the LTC1772 is configured for Burst Mode operation, which enhances efficiency at low output current. To further maximize the life of a battery source, the external P-channel MOSFET is turned on continuously in dropout (100%dutycycle).In shutdown, the device draws a mere 8µA. High constant operating frequency of 550kHz allows the use of a small external inductor. The LTC1772 is available in a small footprint 6-lead SOT-23. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. APPLICATIO S ■ ■ ■ ■ ■ ■ One or Two Lithium-Ion-Powered Applications Cellular Telephones Wireless Modems Portable Computers Distributed 3.3V, 2.5V or 1.8V Power Systems Scanners TYPICAL APPLICATIO R1 0.03Ω 1 10k 220pF ITH/RUN PGATE LTC1772 2 3 GND VFB VIN SENSE – 5 4 D1 6 L1 M1 4.7µH C1 10µF 10V VIN 2.5V TO 9.8V + EFFICIENCY (%) C2A 47µF 6V C2B 1µF 10V VOUT 2.5V 2A 174k C1: TAIYO YUDEN LMK325BJ106K-T C2A: SANYO 6TPA47M C2B: AVX 0805ZC105KAT1A D1: MOTOROLA MBRM120T3 L1: MURATA LQN6C-4R7 M1: FAIRCHILD FDC638P R1: IRC LRC-LR1206-01-R030F 80.6k 1772 F01a Figure 1. High Efficiency, High Output Current 2.5V/2A Regulator 1772fb U Efficiency vs Load Current 100 90 80 VIN = 6V 70 VIN = 9.8V 60 50 VOUT = 2.5V 40 1 10 100 1000 LOAD CURRENT (mA) 10000 1772 F01b U U VIN = 3.3V VIN = 4.2V VIN = 8.4V 1 LTC1772 ABSOLUTE MAXIMUM RATINGS (Note 1) PACKAGE/ORDER INFORMATION TOP VIEW ITH/RUN 1 GND 2 VFB 3 6 PGATE 5 VIN 4 SENSE – Input Supply Voltage (VIN).........................– 0.3V to 10V SENSE–, PGATE Voltages ............. – 0.3V to (VIN + 0.3V) VFB, ITH /RUN Voltages .............................– 0.3V to 2.4V PGATE Peak Output Current ( 7.5% by turning off the external P-channel power MOSFET and keeping it off until the fault is removed. Burst Mode Operation The LTC1772 enters Burst Mode operation at low load currents. In this mode, the peak current of the inductor is set as if VITH/RUN = 1V (at low duty cycles) even though the voltage at the ITH/RUN pin is at a lower value. If the inductor’s average current is greater than the load requirement, the voltage at the ITH/RUN pin will drop. When the ITH/RUN voltage goes below 0.85V, the sleep signal goes high, turning off the external MOSFET. The sleep signal goes low when the ITH/RUN voltage goes above 0.925V and the LTC1772 resumes normal operation. The next U (Refer to Functional Diagram) oscillator cycle will turn the external MOSFET on and the switching cycle repeats. Dropout Operation When the input supply voltage decreases towards the output voltage, the rate of change of inductor current during the ON cycle decreases. This reduction means that the external P-channel MOSFET will remain on for more than one oscillator cycle since the inductor current has not ramped up to the threshold set by EAMP. Further reduction in input supply voltage will eventually cause the P-channel MOSFET to be turned on 100%, i.e., DC. The output voltage will then be determined by the input voltage minus the voltage drop across the MOSFET, the sense resistor and the inductor. Undervoltage Lockout To prevent operation of the P-channel MOSFET below safe input voltage levels, an undervoltage lockout is incorporated into the LTC1772. When the input supply voltage drops below approximately 2.0V, the P-channel MOSFET and all circuitry is turned off except the undervoltage block, which draws only several microamperes. Short-Circuit Protection When the output is shorted to ground, the frequency of the oscillator will be reduced to about 120kHz. This lower frequency allows the inductor current to safely discharge, thereby preventing current runaway. The oscillator’s frequency will gradually increase to its designed rate when the feedback voltage again approaches 0.8V. Overvoltage Protection As a further protection, the overvoltage comparator in the LTC1772 will turn the external MOSFET off when the feedback voltage has risen 7.5% above the reference voltage of 0.8V. This comparator has a typical hysteresis of 20mV. 1772fb 5 LTC1772 OPERATIO Slope Compensation and Inductor’s Peak Current The inductor’s peak current is determined by: SF = IOUT/IOUT(MAX) (%) IPK = VITH – 0.7 10(RSENSE ) when the LTC1772 is operating below 40% duty cycle. However, once the duty cycle exceeds 40%, slope compensation begins and effectively reduces the peak inductor current. The amount of reduction is given by the curves in Figure 2. APPLICATIONS INFORMATION The basic LTC1772 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L1 and RSENSE (= R1). Next, the power MOSFET, M1 and the output diode D1 are selected followed by CIN (= C1) and COUT (= C2). RSENSE Selection for Output Current RSENSE is chosen based on the required output current. With the current comparator monitoring the voltage developed across RSENSE, the threshold of the comparator determines the inductor’s peak current. The output current the LTC1772 can provide is given by: IOUT = 0.12 I − RIPPLE RSENSE 2 where IRIPPLE is the inductor peak-to-peak ripple current (see Inductor Value Calculation section). A reasonable starting point for setting ripple current is IRIPPLE = (0.4)(IOUT). Rearranging the above equation, it becomes: RSENSE = 1 for Duty Cycle < 40% (10)(IOUT ) 6 U W U U U (Refer to Functional Diagram) 110 100 90 80 70 60 50 40 30 20 10 0 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 1772 F02 IRIPPLE = 0.4IPK AT 5% DUTY CYCLE IRIPPLE = 0.2IPK AT 5% DUTY CYCLE VIN = 4.2V Figure 2. Maximum Output Current vs Duty Cycle However, for operation that is above 40% duty cycle, slope compensation effect has to be taken into consideration to select the appropriate value to provide the required amount of current. Using Figure 2, the value of RSENSE is: RSENSE = SF (10)(IOUT )(100) Inductor Value Calculation The operating frequency and inductor selection are interrelated in that higher operating frequencies permit the use of a smaller inductor for the same amount of inductor ripple current. However, this is at the expense of efficiency due to an increase in MOSFET gate charge losses. The inductance value also has a direct effect on ripple current. The ripple current, IRIPPLE, decreases with higher inductance or frequency and increases with higher VIN or VOUT. The inductor’s peak-to-peak ripple current is given by: IRIPPLE = VIN − VOUT ⎛ VOUT + VD ⎞ ⎜ ⎟ f(L) ⎝ VIN + VD ⎠ 1772fb LTC1772 APPLICATIONS INFORMATION where f is the operating frequency. Accepting larger values of IRIPPLE allows the use of low inductances, but results in higher output voltage ripple and greater core losses. A reasonable starting point for setting ripple current is IRIPPLE = 0.4(IOUT(MAX)). Remember, the maximum IRIPPLE occurs at the maximum input voltage. In Burst Mode operation on the LTC1772, the ripple current is normally set such that the inductor current is continuous during the burst periods. Therefore, the peakto-peak ripple current must not exceed: Molypermalloy (from Magnetics, Inc.) is a very good, low loss core material for toroids, but it is more expensive than ferrite. A reasonable compromise from the same manufacturer is Kool Mµ. Toroids are very space efficient, especially when you can use several layers of wire. Because they generally lack a bobbin, mounting is more difficult. However, new designs for surface mount that do not increase the height significantly are available. Power MOSFET Selection An external P-channel power MOSFET must be selected for use with the LTC1772. The main selection criteria for the power MOSFET are the threshold voltage VGS(TH) and the “on” resistance RDS(ON), reverse transfer capacitance CRSS and total gate charge. Since the LTC1772 is designed for operation down to low input voltages, a sublogic level threshold MOSFET (RDS(ON) guaranteed at VGS = 2.5V) is required for applications that work close to this voltage. When these MOSFETs are used, make sure that the input supply to the LTC1772 is less than the absolute maximum VGS rating, typically 8V. The required minimum RDS(ON) of the MOSFET is governed by its allowable power dissipation. For applications that may operate the LTC1772 in dropout, i.e., 100% duty cycle, at its worst case the required RDS(ON) is given by: RDS(ON) DC= 100% 0.03 IRIPPLE ≤ RSENSE This implies a minimum inductance of: LMIN = VIN − VOUT ⎛ VOUT + VD ⎞ ⎜ ⎟ ⎛ 0.03 ⎞ ⎝ VIN + VD ⎠ f⎜ ⎟ ⎝ RSENSE ⎠ (Use VIN(MAX) = VIN) A smaller value than L MIN could be used in the circuit; however, the inductor current will not be continuous during burst periods. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or Kool Mµ® cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! U W U U = (IOUT(MAX) )2 (1+ δp) PP where PP is the allowable power dissipation and δp is the temperature dependency of RDS(ON). (1 + δp) is generally given for a MOSFET in the form of a normalized RDS(ON) vs temperature curve, but δp = 0.005/°C can be used as an approximation for low voltage MOSFETs. In applications where the maximum duty cycle is less than 100% and the LTC1772 is in continuous mode, the RDS(ON) is governed by: RDS(ON) ≅ (DC )IOUT 2 (1+ δp) 1772fb PP where DC is the maximum operating duty cycle of the LTC1772. 7 LTC1772 APPLICATIONS INFORMATION Output Diode Selection The catch diode carries load current during the off-time. The average diode current is therefore dependent on the P-channel switch duty cycle. At high input voltages the diode conducts most of the time. As VIN approaches VOUT the diode conducts only a small fraction of the time. The most stressful condition for the diode is when the output is short-circuited. Under this condition the diode must safely handle IPEAK at close to 100% duty cycle. Therefore, it is important to adequately specify the diode peak current and average power dissipation so as not to exceed the diode ratings. Under normal load conditions, the average current conducted by the diode is: ⎛V −V ⎞ ID = ⎜ IN OUT ⎟ IOUT ⎝ VIN + VD ⎠ The allowable forward voltage drop in the diode is calculated from the maximum short-circuit current as: VF ≈ PD ISC(MAX) where PD is the allowable power dissipation and will be determined by efficiency and/or thermal requirements. A fast switching diode must also be used to optimize efficiency. Schottky diodes are a good choice for low forward drop and fast switching times. Remember to keep lead length short and observe proper grounding (see Board Layout Checklist) to avoid ringing and increased dissipation. CIN and COUT Selection In continuous mode, the source current of the P-channel MOSFET is a square wave of duty cycle (VOUT + VD)/ (VIN + VD). To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: [VOUT (VIN − VOUT )]1/ 2 CIN Required IRMS ≈ IMAX VIN 8 U W U U This formula has a maximum value at VIN = 2VOUT, where IRMS = IOUT /2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose a capacitor rated at a higher temperature than required. Several capacitors may be paralleled to meet the size or height requirements in the design. Due to the high operating frequency of the LTC1772, ceramic capacitors can also be used for CIN. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (∆VOUT) is approximated by: ⎛ 1⎞ ∆VOUT ≈ IRIPPLE ⎜ ESR + ⎟ ⎝ 4 fC OUT ⎠ where f is the operating frequency, COUT is the output capacitance and IRIPPLE is the ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. In surface mount applications, multiple capacitors may have to be paralleled to meet the ESR or RMS current handling requirements of the application. Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS, AVX TPSV and KEMET T510 series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. Other capacitor types include Sanyo OS-CON, Nichicon PL series and Panasonic SP. 1772fb LTC1772 APPLICATIONS INFORMATION Low Supply Operation Although the LTC1772 can function down to approximately 2V, the maximum allowable output current is reduced when VIN decreases below 3V. Figure 3 shows the amount of change as the supply is reduced down to 2V. Also shown in Figure 3 is the effect of VIN on VREF as VIN goes below 2.3V. 105 100 95 90 85 80 75 2.0 VREF NORMALIZED VOLTAGE (%) VITH 2.2 2.4 2.6 2.8 INPUT VOLTAGE (V) 3.0 1772 F03 Figure 3. Line Regulation of VREF and VITH Setting Output Voltage The LTC1772 develops a 0.8V reference voltage between the feedback (Pin 3) terminal and ground (see Figure 4). By selecting resistor R1, a constant current is caused to flow through R1 and R2 to set the overall output voltage. The regulated output voltage is determined by: ⎛ R2⎞ VOUT = 0.8 ⎜ 1 + ⎟ ⎝ R1⎠ For most applications, an 80k resistor is suggested for R1. To prevent stray pickup, locate resistors R1 and R2 close to LTC1772. VOUT LTC1772 VFB R2 3 R1 1772 F04 Figure 4. Setting Output Voltage U W U U Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (η1 + η2 + η3 + ...) where η1, η2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC1772 circuits: 1) LTC1772 DC bias current, 2) MOSFET gate charge current, 3) I2R losses and 4) voltage drop of the output diode. 1. The VIN current is the DC supply current, given in the electrical characteristics, that excludes MOSFET driver and control currents. VIN current results in a small loss which increases with VIN. 2. MOSFET gate charge current results from switching the gate capacitance of the power MOSFET. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN which is typically much larger than the DC supply current. In continuous mode, IGATECHG = f(Qp). 3. I2R losses are predicted from the DC resistances of the MOSFET, inductor and current shunt. In continuous mode the average output current flows through L but is “chopped” between the P-channel MOSFET (in series with RSENSE) and the output diode. The MOSFET RDS(ON) plus RSENSE multiplied by duty cycle can be summed with the resistances of L and RSENSE to obtain I2R losses. 4. The output diode is a major source of power loss at high currents and gets worse at high input voltages. The diode loss is calculated by multiplying the forward voltage times the diode duty cycle multiplied by the load current. For example, assuming a duty cycle of 50% with a Schottky diode forward voltage drop of 1772fb 9 LTC1772 APPLICATIONS INFORMATION 0.4V, the loss increases from 0.5% to 8% as the load current increases from 0.5A to 2A. 5. Transition losses apply to the external MOSFET and increase at higher operating frequencies and input voltages. Transition losses can be estimated from: Transition Loss = 2(VIN)2IO(MAX)CRSS(f) Other losses including CIN and COUT ESR dissipative losses, and inductor core losses, generally account for less than 2% total additional loss. Foldback Current Limiting As described in the Output Diode Selection, the worst-case dissipation occurs with a short-circuited output when the diode conducts the current limit value almost continuously. To prevent excessive heating in the diode, foldback current limiting can be added to reduce the current in proportion to the severity of the fault. Foldback current limiting is implemented by adding diodes DFB1 and DFB2 between the output and the ITH/RUN pin as shown in Figure 5. In a hard short (VOUT = 0V), the current LTC1772 R2 ITH /RUN VFB R1 DFB2 1772 F05 VOUT + DFB1 Figure 5. Foldback Current Limiting 1 6 RSENSE 0.1µF M1 D1 ITH/RUN PGATE LTC1772 GND VIN SENSE – RITH 2 3 CITH VFB BOLD LINES INDICATE HIGH CURRENT PATHS Figure 6. LTC1772 Layout Diagram (See PC Board Layout Checklist) 1772fb 10 U W U U will be reduced to approximately 50% of the maximum output current. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC1772. These items are illustrated graphically in the layout diagram in Figure 6. Check the following in your layout: 1. Is the Schottky diode closely connected between ground (Pin 2) and drain of the external MOSFET? 2. Does the (+) plate of CIN connect to the sense resistor as closely as possible? This capacitor provides AC current to the MOSFET. 3. Is the input decoupling capacitor (0.1µF) connected closely between VIN (Pin 5) and ground (Pin 2)? 4. Connect the end of RSENSE as close to VIN (Pin 5) as possible. The VIN pin is the SENSE + of the current comparator. 5. Is the trace from SENSE – (Pin 4) to the Sense resistor kept short? Does the trace connect close to RSENSE? 6. Keep the switching node PGATE away from sensitive small signal nodes. 7. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1 and R2 must be connected between the (+) plate of COUT and signal ground. VIN CIN + L1 5 VOUT + COUT 4 R1 1772 F06 R2 LTC1772 TYPICAL APPLICATIO LTC1772 High Efficiency, Small Footprint 3.3V to 1.8V/0.5A Regulator R1 0.15Ω 1 R4 10k C3 220pF ITH/RUN PGATE LTC1772 2 3 GND VFB VIN SENSE – 5 4 D1 6 L1 M1 10µH C1 10µF 10V VIN 3.3V PACKAGE DESCRIPTION S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 0.95 REF 2.90 BSC (NOTE 4) 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.20 BSC 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U U + C2 47µF 6V VOUT 1.8V 0.5A R2 100k R3 80.6k 1772 TA02 C1: TAIYO YUDEN CERAMIC L1: COILTRONICS UP1B-100 LMK325BJ106K-T M1: Si3443DV C2: SANYO POSCAP 6TPA47M R1: DALE 0.25W D1: MOTOROLA MBRM120T3 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.95 BSC 0.30 – 0.45 6 PLCS (NOTE 3) 0.80 – 0.90 0.01 – 0.10 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 1772fb 11 LTC1772 TYPICAL APPLICATIONS LTC1772 3.3V to 5V/1A Boost Regulator VIN 3.3V R1 0.033Ω C1 47µF 16V ×2 U1 1 R4 10k C3 220pF ITH/RUN PGATE LTC1772 2 3 GND VFB VIN SENSE – 5 4 R2 422k U1: FAIRCHILD NC7SZ04 ALSO SEE LTC1872 FOR THIS APPLICATION R3 80.6k 1772 TA03 C1: AVXTPSE476M016R0047 C2: AVXTPSE107M010R0100 D1: IR10BQ015 C1: AVXTPSE476M016R0047 C2: AVXTPSE107M010R0100 D1: IR10BQ015 RELATED PARTS PART NUMBER LTC1147 Series LT1375/LT1376 LTC1622 LTC1624 LTC1625 LTC1627 LTC1649 LTC1702 LTC1735 LTC1771 LTC1872 DESCRIPTION High Efficiency Step-Down Switching Regulator Controllers 1.5A, 500kHz Step-Down Switching Regulators Low Input Voltage Current Mode Step-Down DC/DC Controller High Efficiency SO-8 N-Channel Switching Regulator Controller No RSENSE Synchronous Step-Down Regulator Low Voltage, Monolithic Synchronous Step-Down Regulator 3.3V Input Synchronous Controller 550kHz, 2 Phase, Dual Synchronous Controller Single, High Efficiency, Low Noise Synchronous Switching Controller Ultra-Low Supply Current Step-Down DC/DC Controller SOT-23 Step-Up Controller TM No RSENSE is a trademark of Linear Technology Corporation. 1772fb 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● U R4 10k L1 4.7µH D1 6 2 5 3 4 + M1 C2 100µF 10V ×2 VOUT 5V 1A L1: MURATA LQN6C-4R7 M1: Si9804 R1: DALE 0.25W LTC1772 5V/0.5A Flyback Regulator R1 0.033Ω 1 ITH/RUN PGATE LTC1772 2 3 GND VFB VIN SENSE – 5 4 6 M1 C2 47µF 16V ×2 VIN 2.5V TO 9.8V C3 220pF C5 150pF R6 CERAMIC 100Ω D1 T1 R5 22Ω • C4 10µH 100pF CERAMIC 10µH + • C2 100µF 10V ×2 VOUT 5V 0.5A R2 52.3k M1: Si9803 R1: DALE 0.25W T1: COILTRONICS CTX10-4 R3 10k 1772 TA04 COMMENTS 100% Duty Cycle, 3.5V ≤ VIN ≤ 16V High Frequency, Small Inductor, High Efficiency VIN 2V to 10V, IOUT Up to 4.5A, Synchronizable to 750kHz Optional Burst Mode Operation, 8-Lead MSOP N-Channel Drive, 3.5V ≤ VIN ≤ 36V 97% Efficiency, No Sense Resistor Low Supply Voltage Range: 2.65V to 8V, IOUT = 0.5A No Need for 5V Supply, Uses Standard Logic Gate MOSFETs; IOUT up to 15A Two Channels; Minimum CIN and COUT, IOUT up to 15A High Efficiency 5V to 3.3V Conversion at up to 15A 10µA Supply Current, 93% Efficiency, 1.23V ≤ VOUT ≤ 18V; 2.8V ≤ VIN ≤ 20V 2.5V ≤ VIN ≤ 9.8V; 550kHz; 90% Efficiency LT/LT 0605 500 REV B • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 1999
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