LTC3803

LT4430 Secondary-Side Opto-Coupler Driver FEATURES n n n n n n n DESCRIPTION The LT®4430 drives the opto-coupler that crosses the galvanic barrier in an isolated power supply. The IC contains a precision-trimmed reference, a high bandwidth error amplifier, an inverting gain of 6 stage to drive the optocoupler and unique overshoot control circuitry. The LT4430’s 600mV reference provides ±0.75% initial accuracy and ±1.25% tolerance over temperature. A high bandwidth 9MHz error amplifier permits simple frequency compensation and negligible phase shift at typical loop crossover frequencies. The opto-coupler driver provides 10mA of output current and is short-circuit protected. A unique overshoot control function prevents output overshoot on start-up and short-circuit recovery with a single capacitor. The LT4430 is available in the low profile 6-lead TSOT-23 package. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. 600mV Reference (1.25% Over Temperature) Wide Input Supply Range: 3V to 20V Overshoot Control Function Prevents Output Overshoot on Start-Up and Short-Circuit Recovery High Bandwidth Error Amplifier Permits Simple Loop Frequency Compensation Ground-Referenced Opto-Coupler Drive 10mA Opto-Coupler Drive with Current Limiting Low Profile (1mm) ThinSOTTM Package APPLICATIONS n n n n n n 48V Input Isolated DC/DC Converters Isolated Telecommunication Power Systems Distributed Power Step-Down Converters Offline Isolated Power Supplies Industrial Control Systems Automotive and Heavy Equipment TYPICAL APPLICATION Simplified Isolated Synchronous Forward Converter ISOLATION BARRIER VIN VOUT + • • + Isolated Flyback Telecom Converter Start-Up with Overshoot Control (See Schematic on Back Page) VIN 50V/DIV LT1952 • • VCC FG CG SYNC LTC3900 VCC VIN GND OC LT4430 OPTO COMP FB VOUT 5V/DIV OVERSHOOT CONTROL IMPLEMENTED t = 5ms/DIV 4430 TA01b 4430 TA01 4430fb 1 LT4430 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION TOP VIEW VIN 1 GND 2 OC 3 6 OPTO 5 COMP 4 FB Supply Voltage VIN ........................................................................20V FB Voltage .................................................... –0.3V to 6V OPTO Short-Circuit Duration............................ Indefinite Operating Junction Temperature Range (Note 2) E-, I-Grades ....................................... –40°C to 125°C H-Grade ............................................. –40°C to 150°C MP-Grade .......................................... –55°C to 150°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C S6 PACKAGE 6-LEAD PLASTIC TSOT-23 TJMAX = 125°C, θJA = 250°C/W ORDER INFORMATION LEAD FREE FINISH LT4430ES6#PBF LT4430IS6#PBF LT4430HS6#PBF LT4430MPS6#PBF LEAD BASED FINISH LT4430ES6 LT4430IS6 LT4430HS6 LT4430MPS6 TAPE AND REEL LT4430ES6#TRPBF LT4430IS6#TRPBF LT4430HS6#TRPBF LT4430MPS6#TRPBF TAPE AND REEL LT4430ES6#TR LT4430IS6#TR LT4430HS6#TR LT4430MPS6#TR PART MARKING* LTBFY LTBFY LTBFY LTBFY PART MARKING* LTBFY LTBFY LTBFY LTBFY PACKAGE DESCRIPTION 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 PACKAGE DESCRIPTION 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 6-Lead Plastic TSOT-23 TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –40°C to 150°C –55°C to 150°C TEMPERATURE RANGE –40°C to 125°C –40°C to 125°C –40°C to 150°C –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS SYMBOL VIN IIN VUVLO PARAMETER Input Voltage Range Supply Current Undervoltage Lockout Threshold The ● denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, FB = VFB, COMP = 1V, unless otherwise noted (Note 3). CONDITIONS ● MIN 3 ● ● ● ● ● TYP 1.9 1.9 MAX 20 3.9 4.3 2.5 2.5 2.55 0.6045 0.6075 0.1 UNITS V mA mA V V V V V % nA 3V ≤ VIN ≤ 20V (E-, I-Grades) 3V ≤ VIN ≤ 20V (H-, MP-Grades) OC Held Low for VIN < VUVLO (E-, I-Grades) OC Held Low for VIN < VUVLO (H-Grade) OC Held Low for VIN < VUVLO (MP-Grade) 3V ≤ VIN ≤ 20V 1.95 1.9 1.9 0.5955 0.5925 –150 2.2 2.2 2.2 0.6 0.6 0.02 –75 VFB Feedback Reference Voltage VFB Line Regulation 3V ≤ VIN ≤ 20V FB = VFB IFB FB Input Bias Current 4430fb 2 LT4430 ELECTRICAL CHARACTERISTICS SYMBOL IOC PARAMETER Overshoot Control Charging Current The ● denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, FB = VFB, COMP = 1V, unless otherwise noted (Note 3). CONDITIONS VOC = 0V (E-, I-Grades) VOC = 0V (H-Grade) VOC = 0V (MP-Grade) FB = 0.3V VCOMP = 0.8V to 1V (E-, I-Grades) VCOMP = 0.8V to 1V (H-, MP-Grades) No Load (Note 4) FB = 1V FB = 0V (E-, I-Grades) FB = 0V (H-Grade) FB = 0V (MP-Grade) FB = 0V, COMP = 1V (E-, I-Grades) FB = 0V, COMP = 1V (H-Grade) FB = 0V, COMP = 1V (MP-Grade) FB = 1V, COMP = 1V –6.4 No Load (Note 4) FB = 0V, COMP = Open (E-, I-Grades) FB = 0V, COMP = Open (H-, MP-Grades) VIN = 3V, FB = 1V, COMP = Open, IOPTO = 10mA (E-, I-, H-Grades) VIN = 3V, FB = 1V, COMP = Open, IOPTO = 10mA (MP-Grade) VIN = 20V, FB = 1V, COMP = Open, IOPTO = 10mA FB = 1V, COMP = Open, OPTO = 0V (E-, I-, H-Grades) FB = 1V, COMP = Open, OPTO = 0V (MP-Grade) FB = 0V, OPTO = 1.5V (E-, I-, H-Grades) FB = 0V, OPTO = 1.5V (MP-Grade) ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● MIN –15 –17 –17 TYP –8.5 –8.5 –8.5 0.93 48 MAX –5 –5 –4 UNITS μA μA μA V mV dB dB MHz OC Clamp Voltage OC Amplifier Offset Voltage AVOL Error Amplifier Open-Loop DC Gain Error Amplifier Unity-Gain Bandwidth Error Amplifier Output Swing Low Error Amplifier Output Swing High 60 55 0.1 1.2 1.2 1.15 –800 –825 –825 80 80 9 0.35 1.33 1.33 1.33 –450 –450 –450 25 –6 600 0.5 0.5 0.85 0.9 –5.6 0.55 1.5 1.55 1.55 –225 –225 –200 V V V V μA μA μA mA V/V kHz V V V V Error Amplifier Output Source Current Error Amplifier Output Sink Current Opto Driver Inverting DC Gain Opto Driver –3dB Bandwidth Opto Driver Output Swing Low Opto Driver Output Swing High VIN – 1.25 VIN – 1.05 VIN – 1.3 4.2 10.5 9.5 150 135 VIN – 1.05 5.6 22 22 350 350 7.5 45 45 650 650 Opto Driver Output Swing High ISC Opto Driver Output Short-Circuit Current (Sourcing) V mA mA μA μA Opto Driver Output Sink Current Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT4430 is tested under pulsed load conditions such that TJ ≈ TA. The LT4430E is guaranteed to meet specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT4430I is guaranteed over the –40°C to 125°C operating junction temperature range, the LT4430H is guaranteed over the –40°C to 150°C operating junction temperature range and the LT4430MP is tested and guaranteed over the –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 3: All currents into device pins are positive. All currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. Note 4: This parameter is guaranteed by correlation and is not tested. 4430fb 3 LT4430 TYPICAL PERFORMANCE CHARACTERISTICS Quiescent Current vs Temperature 4.0 3.5 QUIESCENT CURRENT (mA) 2.5 3.0 2.5 2.0 1.5 1.0 –75 –50 –25 1.0 –75 –50 –25 VIN = 3V VFB (V) VIN = 20V VUVLO (V) 2.0 3.0 Undervoltage Lockout Threshold vs Temperature 0.606 0.605 0.604 0.603 0.602 0.601 0.600 0.599 0.598 1.5 0.597 0.596 0.595 Feedback Reference Voltage vs Temperature 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G01 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G02 0.594 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G03 FB Voltage Line Regulation 0.6010 TA = 25°C FB INPUT BIAS CURRENT (nA) 50 25 FB Input Bias Current vs Temperature 15 OC Charging Current vs Input Voltage OC CHARGING CURRENT (μA) 0.6005 0 –25 –50 –75 –100 –125 –150 –175 13 VFB (V) 11 0.6000 9 0.5995 7 0.5990 0 2 4 6 8 10 12 14 16 18 20 VIN (V) –200 –75 –50 –25 5 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G05 0 5 4430 G04 10 VIN (V) 15 20 4430 G06 OC Charging Current vs Temperature 15 VIN = 5V 1.5 OC Clamp Voltage vs Temperature 100 90 OC Amplifier Offset Voltage vs Temperature OC CHARGING CURRENT (μA) 13 OC CLAMP VOLTAGE (V) 1.3 VOC – VFB (mV) 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G08 80 70 60 50 40 30 11 1.1 9 0.9 7 0.7 20 10 5 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G07 0.5 –75 –50 –25 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G09 4430fb 4 LT4430 TYPICAL PERFORMANCE CHARACTERISTICS Error Amplifier Open Loop Gain and Phase vs Frequency 70 60 50 GAIN (dB) 40 30 20 10 0 –10 –20 1k 10k 1M 100k FREQUENCY (Hz) 10M –45 50M 4430 G10 Error Amplifier Output Swing Low vs Temperature ERROR AMPLIFIER OUTPUT SWING HIGH (V) 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G11 Error Amplifier Output Swing High vs Temperature 1.5 135 PHASE 90 GAIN 45 PHASE (°) ERROR AMPLIFIER OUTPUT SWING LOW (V) 80 180 0.5 0.4 1.4 0.3 1.3 0.2 1.2 0 0.1 1.1 0 –75 –50 –25 1.0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G12 ERROR AMPLIFIER OUTPUT SOURCE CURRENT (μA) Error Amplifier Output Source Current vs Temperature 1000 900 800 700 600 500 400 300 200 100 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G13 Error Amplifier Output Sink Current vs Temperature ERROR AMPLIFIER OUTPUT SINK CURRENT (mA) 50 40 30 20 10 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G14 Opto Driver Inverting DC Gain vs Temperature 6.4 OPTO DRIVER INVERTING DC GAIN (V/V) 6.3 6.2 GAIN (dB) 40 35 30 25 20 15 10 5 Opto Driver Inverting Closed Loop Gain and Phase vs Frequency 180 PHASE 135 6.1 6.0 5.9 5.8 5.7 5.6 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G15 90 GAIN 45 PHASE (°) 0 –5 –10 1k 10k 1M 100k FREQUENCY (Hz) 0 –45 10M 4430 G16 4430fb 5 LT4430 TYPICAL PERFORMANCE CHARACTERISTICS Opto Driver Output Swing Low vs Temperature 1.0 OPTO DRIVER OUTPUT SWING LOW (V) 0.9 0.8 VIN – VOPTO (V) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G17 Opto Driver Output Swing High vs Temperature 1.5 OPTO DRIVER OUTPUT SWING HIGH (V) VIN = 3V 1.4 IOPTO = 10mA 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 Opto Driver Output Swing High vs Temperature VIN = 20V IOPTO = 10mA 4.0 –75 –50 –25 4430 G18 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G19 Opto Driver Output Sink Current vs Temperature 900 800 700 600 500 400 300 200 100 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G20 Opto Driver Output Short-Circuit Current (Sourcing) vs Temperature OPTO DRIVER SHORT-CIRCUIT CURRENT (mA) 40 OPTO DRIVER OUTPUT SINK CURRENT (μA) 1000 30 20 10 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 4430 G21 4430fb 6 LT4430 PIN FUNCTIONS VIN (Pin 1): This is the input supply that powers all internal circuitry. The input supply range is 3V minimum to 20V maximum and the typical input quiescent current is 1.9mA. Connect a 1μF bypass capacitor directly from VIN to GND. GND (Pin 2): Analog Ground Pin. It is also the negative sense terminal for the internal 0.6V reference. Connect the external feedback divider network that terminates to ground directly to this pin for best regulation and performance. OC (Pin 3): Overshoot Control Pin. A typical 8.5μA current source and a capacitor placed from this pin to GND controls output voltage overshoot on start-up and recovery from short-circuit. The typical ramp time is (COC • 0.6V)/8.5μA. If VIN is below VUVLO (its undervoltage lockout threshold), the OC pin is actively held low. The OC pin also ties to the overshoot control amplifier output. This amplifier monitors the FB pin voltage and the error amplifier output. If FB is low due to a short-circuit fault condition, the COMP pin goes high. Logic detects the error amplifier COMP pin high state and activates the overshoot control amplifier. The amplifier responds by discharging the OC capacitor down to the FB voltage plus a built-in offset voltage of 48mV. If the short-circuit condition persists, the amplifier maintains the voltage on OC. If the short-circuit condition goes away, the FB pin recovers under the control of the OC pin. FB (Pin 4): This is the inverting input of the error amplifier. The noninverting input is tied to the internal 0.6V reference. Input bias current for this pin is typically 75nA flowing out of the pin. This pin normally ties to a resistor divider network to set output voltage. Tie the top of the external resistor divider directly to the output voltage for best regulation performance. COMP (Pin 5): This is the output of the error amplifier. The error amplifier is a true voltage-mode error amplifier and frequency compensation is performed around the amplifier. Typical LT4430 compensation schemes use series R-C in parallel with C networks from the COMP pin to the FB pin. COMP also ties to the overshoot control amplifier logic that detects if the COMP pin is at its high clamp level. The logic activates the overshoot control amplifier if COMP is at its clamp level for longer than 1μs. OPTO (Pin 6): This is the output of the amplifier that drives the opto-coupler. The opto driver amplifier uses an inverting gain of six configuration to drive the opto-coupler referenced to ground. Driving the opto-coupler referenced to GND accommodates low output voltages and eases loop frequency compensation as the secondary feedback path with a traditional “431” topology is eliminated. The opto driver amplifier sources a maximum of 10mA, sinks 350μA typically and is short-circuit protected. 4430fb 7 LT4430 BLOCK DIAGRAM VIN I1 12.5μA BIAS AND REFERENCE GENERATOR 1.1V 0.6V Q2 Q3 COMP R3 15k + OPTO DRIVER OUT + ERROR AMP – R4 90k VIN STARTUP – VIN I2 12.5μA UVLO Q1 VIN R1 2k FB DFB Q5 IOC 8.5μA LOGIC AND DELAY Q7 GND + – V2 0.6V Q4 Q6 S1 NORMALLY OPEN OC + – V1 0.2V 8 + + – VOS 48mV 4430 BD01 OC AMP – 4430fb R2 2k LT4430 APPLICATIONS INFORMATION Block Diagram Operation A precision voltage reference, a high-bandwidth error amplifier, an inverting opto-coupler driver and an overshoot control amplifier comprise the LT4430. Referring to the block diagram, a start-up circuit establishes all internal current and voltage biasing for the IC. A precision-trimmed bandgap generates the 600mV reference voltage and a 1.1V bias voltage for the opto-coupler driver. Room temperature reference voltage accuracy is specified at ±0.75% and operating temperature range tolerance is specified at ±1.25%. The 600mV reference ties to the noninverting input of the error amplifier. The LT4430 error amplifier senses the output voltage through an external resistor divider and regulates the FB pin to 600mV. The FB pin ties to the inverting input of the error amplifier. The error amplifier’s open loop DC gain is 80dB and its unity-gain crossover frequency of 9MHz provides negligible phase shift at typical feedback loop crossover frequencies. The error amplifier is a true voltage-mode amplifier and frequency compensation connects around the amplifier. Typical LT4430 compensation schemes use series R-C in parallel with C networks from the COMP pin to the FB pin. The opto-coupler driver amplifies the voltage difference between the COMP pin and the 1.1V bias potential applied to its noninverting terminal with an inverting gain of 6. This signal drives the opto-coupler referenced to GND. Driving the opto-coupler referenced to GND accommodates low output voltages and simplifies loop frequency compensation as the secondary feedback path with a traditional “431” topology is eliminated. A resistor in series with the opto-coupler sets the opto-coupler’s DC bias current. The opto driver amplifier sources a guaranteed maximum of 10mA, sinks 350μA typically and is short-circuit protected. The opto-coupler driver amplifier’s typical –3dB bandwidth is 600kHz. The opto-coupler’s output crosses the galvanic isolation barrier and closes the feedback loop to the primary-side controller. The LT4430 incorporates a unique overshoot control function that allows the user to ramp the output voltage on start-up and recovery from short-circuit conditions, preventing overshoot. A capacitor, connected from the OC pin to GND and charged by internal 8.5μA current source IOC, sets the ramp rate. On start-up, Q1 actively holds the OC capacitor low until VIN of the LT4430 reaches its typical undervoltage lockout threshold of 2.2V. Q1 then turns off and the OC capacitor charges linearly. Q2 and Q3 OR the OC pin voltage and the 600mV reference voltage at the noninverting terminal of the error amplifier. The OC pin voltage is the reference voltage for the error amplifier until it increases above 600mV. If the feedback loop is in control, the FB pin voltage follows and regulates to the OC pin voltage. As the OC pin voltage increases past 600mV, the reference voltage takes control of the error amplifier and the FB pin regulates to 600mV. The OC pin voltage increases until it is internally clamped by R2, Q6 and V1. The OC pin’s typical clamp voltage of 0.93V ensures that Q3 turns off. All of I1’s current flows in Q2, matching I2’s current in Q4. In a short-circuit condition, the output voltage decreases to something well below the regulated level. The error amplifier reacts by increasing the COMP pin voltage, thereby decreasing the drive to the opto-coupler. The decreased opto-coupler bias signals the primary-side controller to increase the amount of power it delivers in an attempt to raise the output voltage back to its regulated value. As long as the fault persists, the output voltage remains low. The error amplifier’s COMP pin voltage increases until it reaches a clamp level set by Q7 and V2. Q7’s resultant collector current drives internal logic that closes normally open switch S1. This action activates the overshoot control amplifier which employs a unity-gain follower configuration. The overshoot control amplifier monitors the FB pin voltage and, on S1’s closing, pulls the OC pin voltage down to the FB pin voltage plus a built-in offset voltage of typically 48mV. The built-in offset voltage serves two purposes. First, the offset voltage prevents the overshoot control amplifier from interfering with normal transient operating conditions. Second, the offset voltage biases the feedback loop so that if the short-circuit condition ends, the feedback loop immediately starts to increase the output voltage to its regulated value. 4430fb 9 LT4430 APPLICATIONS INFORMATION If the fault condition ceases, the output voltage increases. In response, the error amplifier COMP pin’s voltage decreases. This action opens switch S1, deactivates the overshoot control amplifier and allows the OC pin capacitor to charge. The FB pin voltage increases quickly until the FB pin voltage exceeds the OC pin voltage. The feedback loop increases the drive to the opto-coupler until the FB pin follows and regulates to the OC pin voltage. Again, as the OC pin voltage increases past 600mV, the reference voltage takes control of the error amplifier and the FB pin regulates to 600mV. Generating a VIN Bias Supply Biasing an LT4430 is crucial to proper operation. If the overshoot control (OC) function is not being used and the output voltage is greater than 3.3V, the IC may be biased from VOUT. In these cases, it is the user’s responsibility to verify large-signal start-up and fault recovery behavior. If the overshoot control function is being used or the output voltage is below the LT4430’s minimum operating voltage of 3V, employing an alternate bias method is necessary. The LT4430’s undervoltage lockout (UVLO) circuitry, controlled by VIN, resets and holds the OC pin capacitor low for VIN less than 2.2V. When VIN increases above 2.2V, the circuit releases the OC pin capacitor. The LT4430’s supply voltage must come up faster than the output voltage to assert loop control and limit output voltage overshoot. In most cases, a few simple components accomplish this task. Adding a few biasing components to control overshoot is advantageous. Let’s examine bias circuits for different topologies. Figures 1a to 1e illustrate bias supply circuits for the flyback converter. Figure 1a shows the typical flyback output connection. Figures 1b and 1c exhibit equivalent circuit performance but rotate the rectifier connection to the ground-referred side. This connection permits the user to take advantage of the transformer secondary’s forward behavior when the primary-side switch is on. Figures 1d to 1e illustrate the bias generator circuit. VIN • N volts appear across the secondary winding when the primary-side switch is on. D2 forward biases and C1 charges. During this time, the secondary-voltage is in series with VOUT and C1 ultimately charges to (VIN • N + VOUT – VF). VF is the forward voltage of D2. When VOUT is zero at start-up, VIN • N volts exists to charge C1. C1 is generally much smaller in value than COUT and the bias supply starts up ahead of VOUT. R1 in Figures 1d and 1e limits peak charging currents, lowering D2’s current rating. R1 also filters C1 from peak-charging to the voltage spikes induced by the secondary winding’s leakage inductance. Between 1Ω to 10Ω is generally sufficient. R1 is usually necessary if C1 is a low ESR ceramic capacitor or if the transformer has high leakage inductance. It may be possible to eliminate R1 if C1 is a low cost, high ESR, surface-mount tantalum. VIN variation changes the bias supply in Figure 1d. Depending on VOUT, the transformer turns ratio N and VIN range, the bias supply may exceed the LT4430’s 20V VIN absolute maximum rating. If this occurs, two solutions exist. One is to tap the secondary-side inductor to create a lower voltage from which to rectify as illustrated in Figure 2a. The bias voltage decreases to (VIN • N1/N + VOUT – VF). This solution relies on secondary-side pins being available for the tap point. 4430fb 10 LT4430 APPLICATIONS INFORMATION T1 VIN D1 VOUT COUT VIN T1 • • 1:N • • D1 VOUT COUT 4430 F01a 1:N 4430 F01b Figure 1a. Typical Flyback Converter Connection Figure 1b. Equivalent Flyback Converter Connection Tx1 VIN T1 VOUT COUT Q1 1:N SYNC 4430 F01c • • 1:N VIN • • D1 VOUT COUT D2 R1* *OPTIONAL SEE TEXT LT4430 VBIAS C1 4430 F01d Figure 1c. Synchronous Flyback Converter Connection Figure 1d. Flyback Converter with Bias Generator T1 VIN • • 1:N D2 Q1 VOUT COUT SYNC R1* LT4430 VBIAS C1 4430 F01e *OPTIONAL SEE TEXT Figure 1e. Synchronous Flyback with Bias Generator 4430fb 11 LT4430 APPLICATIONS INFORMATION The second solution is to make a preregulator as shown in Figure 2b. In this example, the bias supply equals (VZ1 – VBE). Select R2 to bias Zener diode Z1 and to supply base current to QBS. Resistor R3 (on the order of a few hundred ohms), in series with Q5’s base, suppresses possible high frequency oscillations depending on QBS’s selection. The preregulator circuit has additional value for fully synchronous converters. Fully synchronous converters require gate drivers to control the secondary-side T1 VOUT N1 VIN MOSFETs turn on and turnoff. The gate driver circuitry requires supply current in the range of 10mA to 100mA depending on the gate driver supply voltage, MOSFET size and switching frequency. The preregulator bias supply is ideal for powering both the LT4430 and the gate driver circuitry, especially since the gate drivers typically use a supply voltage between 5V to 12V. The preregulator circuit finds wide use in fully synchronous forward converters, push-pull converters and full-bridge converters. • • COUT N2 • 1:N N = N1 + N2 *OPTIONAL SEE TEXT D1 D2 R1* LT4430 VBIAS C1 4430 F02a Figure 2a. Flyback Converter with Tapped Secondary Bias T1 VIN • • 1:N D1 D2 VOUT COUT R1* R2 R3* QBS C1 Z1 LT4430 VBIAS C2 *OPTIONAL SEE TEXT 4430 F02b Figure 2b. Flyback Converter with Preregulator Bias 4430fb 12 LT4430 APPLICATIONS INFORMATION Generate a bias supply for a forward converter using similar techniques to that of the flyback converter. Figure 3a to 3c detail the three common bias circuits for the synchronous single-switch forward converter. In the flyback converter of Figure 1d, the bias supply is proportional to VIN and VOUT. However, in the forward converter, L1’s presence decouples the bias supply from VOUT. In Figure 3a, the bias supply equals (VIN • N – VF). In Figure 3b, the bias supply equals (VIN • N1/N – VF). In Figure 3c, the bias supply equals (VZ1 – VF). D1 R1* LT4430 VBIAS C1 VOUT COUT T1 VIN L1 • • 1:N Q1 FG Q2 CG *OPTIONAL SEE TEXT 4430 F03a Figure 3a. Typical Single-Switch Synchronous Forward Converter with Bias Generator D1 D1 R1* LT4430 VBIAS C1 VOUT R1* R2 R3* QBS C1 Z1 LT4430 VBIAS C2 T1 L1 • N2 VIN COUT • T1 L1 • N1 VIN • • VOUT COUT 1:N Q1 N = N1 + N2 FG Q2 CG *OPTIONAL SEE TEXT 4430 F03b 1:N Q1 FG Q2 CG *OPTIONAL SEE TEXT 4430 F03c Figure 3b. Single-Switch Synchronous Forward Converter with Tapped Secondary Bias Generator Figure 3c. Single-Switch Synchronous Forward Converter with Preregulator Bias Generator 4430fb 13 LT4430 APPLICATIONS INFORMATION Figures 4a to 4d demonstrate bias supply circuits for the fully-synchronous push-pull topology. Biasing for fullbridge schemes is identical to the push-pull circuits with the obvious difference in the primary-side drive. In Figure 4a, the bias supply equals (VIN • N – VF). In Figure 4b and 4d, the bias supply equals (2 • VIN • N – VF). In Figure 4c and 4e, the bias supply equals (VZ1 – VF). In general, one of the simple, low-cost biasing schemes suffices for LT4430 applications. However, design conT1 Q2 straints such as a very wide input voltage range may force employment of other biasing circuits. Other methods of generating the bias supply may include an additional transformer or output inductor winding, low-cost linear regulators, discrete or monolithic charge pumps and buck/boost regulators. However, if the bias supply gets this complicated, a quick chat with your local LTC applications engineer may result in a simpler solution. D1 R1* • • VIN ME L1 LT4430 VBIAS C1 VOUT • • 1:N MF *OPTIONAL SEE TEXT Q1 COUT 4430 F04a Figure 4a. Typical Synchronous Push-Pull Converter with Bias Generator D1 T1 Q2 R1* • • VIN ME L1 LT4430 VBIAS C1 VOUT • • 1:N MF *OPTIONAL SEE TEXT Q1 COUT 4430 F04b Figure 4b. Typical Synchronous Push-Pull Converter with 2x Bias Generator 4430fb 14 LT4430 APPLICATIONS INFORMATION D1 R1* R2 R3* QBS C1 Z1 LT4430 VBIAS C2 VIN T1 Q2 T1 D1 R1* L2 Q2 ME LT4430 VBIAS C1 • • VOUT • • L1 Q1 MF COUT • • VIN ME L1 VOUT COUT Q1 1:N *OPTIONAL SEE TEXT 4430 F04d • • 1:N MF *OPTIONAL SEE TEXT Figure 4d. Typical Synchronous Push-Pull Current-Doubler Converter with Bias Generator 4430 F04c Figure 4c. Typical Synchronous Push-Pull Converter with Preregulator Bias D1 R1* R2 R3* QBS C1 Z1 LT4430 VBIAS C2 T1 L2 • Q2 ME • VIN VOUT • • 1:N Q1 MF L1 COUT *OPTIONAL SEE TEXT 4430 F04e Figure 4e. Typical Synchronous Push-Pull Current-Doubler Converter with Preregulator Bias 4430fb 15 LT4430 APPLICATIONS INFORMATION Setting Output Voltage Figure 5 shows how to program the power supply output voltage with a resistor divider feedback network. Connect the top of R1 to VOUT, the tap point of R1/R2 to FB and the bottom of R2 directly to GND of the LT4430. The FB pin regulates to 600mV and has a typical input pin bias current of 75nA flowing out of the pin. The output voltage is set by the formula: VOUT = 0.6V • (1 + R1/R2) – (75nA) • R1 VOUT 75nA FB R2 4430 F05 circuitry resides on the primary-side. Coupling this signal requires an element that withstands the isolation potentials and still transfers the loop error signal. Opto-couplers remain in prevalent use because of their ability to couple DC signals. Opto-couplers typically consist of an input infrared light emitting diode (LED) and an output phototransistor separated by an insulating gap. Most opto-coupler data sheets loosely specify the gain, or current transfer ratio (CTR), between the input diode and the output transistor. CTR is a strong function of the input diode current, temperature and time (aging). Aging degrades the LED’s brightness and accelerates with higher operating current. CTR variation directly affects the overall system loop gain and the design must account for total variation. To make an effective optical detector, the output transistor design maximizes the base area to collect light energy. This constraint yields a transistor with a large collector-to-base capacitance. This capacitance can influence the circuit’s performance based on the output transistor’s hookup. The two most common topologies for the output transistor of the opto-coupler are the common-emitter and common-collector configurations. Figure 6a illustrates the common-emitter design with the output transistor’s collector connected to the output of the primary-side controller’s error amplifier. R1 Figure 5. Setting Output Voltage Opto-Coupler Feedback and Frequency Compensation An isolated power supply with good line and load regulation generally employs the following strategy. Sense and compare the output voltage with an accurate reference potential. Amplify and feed back the error signal to the supply’s control circuitry to correct the sensed error. Have the error signal cross the isolation barrier if the control ISOLATION BARRIER PRIMARY-SIDE ERROR AMP VREF FB VCC RC OPTO RK CK LT4430 VOUT + OPTO DRIVER R5 90k 1.1V R4 15k COMP + ERROR AMP 0.6V R1 FB C1 – + – VC – R2 CC OPTO C3 C2 4430 F06a R3 Figure 6a. Frequency Compensation with Opto-Coupler Common-Emitter Configuration 4430fb 16 LT4430 APPLICATIONS INFORMATION In this example, the error amplifier is typically a transconductance amplifier with high output impedance and RC dominates the impedance at the VC node. Frequency compensation for this feedback loop is directly affected by the output transistor’s collector-to-base capacitance as it introduces a pole into the feedback loop. This pole varies considerably with the transistor’s operating conditions. In many cases, this pole limits the achievable loop bandwidth. Cascoding the output transistor significantly reduces the effects of this capacitance and increases achievable loop bandwidth. However, not all designs have the voltage headroom required for the cascode connection or can tolerate the additional circuit complexity. The open loop transfer function from the output voltage to the primaryside error amplifier’s output is: VC VOUT ⎛ R2 ⎞ –A • ⎜ ⎟ • (1 + s • R1• C1)• (1 + s • R3 • C 3) ⎝ R1 + R2⎠ = • ⎛ (C 2 • C 3) ⎞ [s • A • R1• (C 2 + C 3)]• ⎜ 1 + s • R3 • ⎟ ⎝ (C 2 + C 3)⎠ (1 + s • RK • C K ) CTR • RC • • 6• ⎛ ⎞ (RK + RD ) (RK • RD ) • CK⎟ ⎜1+ s • (RK + RD ) ⎝ ⎠ 1 • ⎛ ⎡ (CTR • RC ) ⎤⎞ ⎜ 1 + s • rπ • ⎢ (R + R ) • C CB + C BE ⎥⎟ ⎝ D ⎣K ⎦⎠ 1 (1+ s • RC • C C ) ISOLATION BARRIER PRIMARY-SIDE ERROR AMP VCC VREF FB OPTO C3 RC CC RE C2 4430 F06b where: A = LT4430 open loop DC Gain RD = Opto-coupler diode equivalent small-signal resistance CTR = Opto-coupler AC current transfer ratio CCB = Opto-coupler nonlinear collector-to-base capacitor CBE = Opto-coupler nonlinear base-to-emitter capacitor rπ = Opto-coupler small-signal base-to-emitter resistor Figure 6a and its transfer function illustrate most of the possible poles and zeroes that can be set and are shown for the sake of completeness. In a practical application, the transfer function simplifies considerably because not all the poles and zeroes are used. Also, different combinations of poles and zeroes can result in the same small signal gain-phase characteristics but demonstrate dramatically different large-signal behavior. The common-collector configuration eliminates the miller effect of the output transistor’s collector-to-base capacitance and generally increases achievable loop bandwidth. Figure 6b illustrates the common-collector design with the output transistor’s emitter connected to the inverting input of the primary-side controller’s error amplifier. LT4430 OPTO RK CK VOUT + OPTO DRIVER R5 90k 1.1V R4 15k COMP + ERROR AMP 0.6V R1 FB C1 VC + – – – R2 R3 Figure 6b. Frequency Compensation with Opto-Coupler Common-Collector Configuration 4430fb 17 LT4430 APPLICATIONS INFORMATION In this example, the error amplifier is typically a voltage error amplifier configured as a transimpedance amplifier. The opto-coupler transistor’s emitter provides feedback information directly to the FB pin and the resistor RE from FB to GND sets the DC bias condition for the opto-coupler. The open loop transfer function from the output voltage to the primary-side error amplifier’s output is: VC VOUT ⎛ R2 ⎞ –A • ⎜ ⎟ • (1 + s • R1• C1)• (1 + s • R3 • C 3) ⎝ R1 + R2⎠ = • ⎛ (C 2 • C 3) ⎞ [s • A • R1• (C 2 + C 3)]• ⎜ 1 + s • R3 • ⎟ ⎝ (C 2 + C 3)⎠ (1 + s • RK • C K ) CTR • RC • • 6• ⎛ ⎞ (RK + RD ) (RK • RD ) • CK⎟ ⎜1+ s • (RK + RD ) ⎝ ⎠ 1 1 • (1+ s • rπ • C BE ) (1+ s • RC • C C ) This frequency compensation discussion only addresses the transfer function from the output back to the control node on the primary-side. Compensation of the entire feedback loop must combine this transfer function with the transfer function of the power processing circuitry, commonly referred to as the modulator. In an isolated power supply, the modulator’s transfer function depends on topology (flyback, forward, push-pull, bridge), current or voltage mode control, operation in discontinuous or continuous mode, input/output voltage, transformer turns ratio and output load current. It is beyond this data sheet’s scope to detail the transfer functions for all of the various combinations. However, the power supply designer must fully characterize and understand the modulator’s transfer function to successfully frequency compensate the feedback loop for all operating conditions. Opto-Couplers Opto-couplers are available in a wide variety of package styles and performance criteria including isolation rating, CTR, output transistor breakdown voltage, output transistor current capability, and response time. Table 1 lists several manufacturers of opto-coupler devices, although this is by no means a complete list. Table 1. Opto-Coupler Vendors VENDOR Agilent Technologies Fairchild Semiconductor Isocom Kodenshi Korea Corp. NEC Sharp Microelectronics Toshiba Vishay PHONE 800-235-0312 207-775-8100 214-495-0755 82-63-839-2111 81-44-435-1588 877-343-2181 949-455-2000 402-563-6866 URL www.agilent.com www.fairchildsemi.com www.isocom.com www.kodenshi.co.kr www.ncsd.necel.com www.sharpsma.com www.toshiba.com www.vishay.com Figure 6b and its transfer function illustrate most of the possible poles and zeroes that can be set and are shown for the sake of completeness. In a practical application, the transfer function simplifies considerably because not all the poles and zeroes are used. In both configurations, the terms RD, CTR, rπ, CCB and CBE. vary from part to part and also change with bias current. For most opto-couplers, RD is 50Ω at a DC bias of 1mA, and 25Ω at a DC bias of 2mA. CTR is the small signal AC current transfer ratio. As an example, the Fairchild MOC207 opto-coupler has an AC CTR around 1, even though the DC CTR is much lower when biased at 1mA or 2mA. Most opto-coupler data sheets do not specify the terms CCB, CBE and rπ and values must be obtained from empirical measurements. 4430fb 18 LT4430 APPLICATIONS INFORMATION Setting Overshoot Control Time Figure 7 shows how to calculate the overshoot time by connecting a capacitor from the OC pin to GND. The overshoot control time, tOC, is set by the formula: tOC = (COC • 0.6V)/8.5μA The OC pin requires a minimum capacitor of 100pF due to stability requirements with the overshoot control amplifier. This yields a minimum time of 7μs which is generally on the order of a few cycles of the switching regulator. Using the minimum capacitor value results in no influence on start-up characteristics. Larger OC capacitor values increase the overshoot control time and only increase the amplifier stability. Do not modulate the overshoot control time by externally increasing the OC charging current or by externally driving the OC pin. VIN IOC 8.5μA OC COC 4430 F07 output load characteristics heavily influence power supply behavior as it attempts to bring the output voltage into regulation. Frequency compensation values that provide stable response under normal operating conditions can allow severe output voltage overshoot to occur during start-up and short-circuit recovery conditions. Large overshoot often results in damage or destruction to the load circuitry being powered, not a desirable trait. The LT4430’s overshoot control circuitry plus one external capacitor (COC) provide independent control of start-up and short-circuit recovery response without compromising small-signal frequency compensation. Choosing the optimum COC value is a straightforward laboratory procedure. The following description and set of pictures explain this procedure. Before choosing a value for the OC pin capacitor, complete the remainder of the power supply design. This process includes evaluating the chosen VIN bias generator topology (please consult prior applications information section) and optimizing frequency compensation under all normal operating conditions. During this design phase, set COC to its minimum value of 100pF This ensures negligible . interaction from the overshoot control circuitry. Once these steps are complete, construct a test setup that monitors start-up and short-circuit recovery waveforms. Perform this testing with the output lightly loaded. Light load, following full slew operation, is the worst-case as the feedback loop transitions from full to minimal power delivery. As an example, refer to the schematic on the last page illustrating the 5V, 2A isolated flyback converter. All of the following photos are taken with VIN = 48V and ILD = 20mA. Figure 8a demonstrates the power supply start-up and short-circuit recovery behavior with no overshoot control compensation (COC = 100pF minimum). The 5V output overshoots by several volts on both start-up and short-circuit recovery due to the conservative nature of the small-signal frequency compensation values. Figure 7. Setting Overshoot Control Time Choosing the Overshoot Control (OC) Capacitor Value As discussed in the frequency compensation section, the designer enjoys considerable freedom in setting the feedback loop’s pole and zero locations for stability. Different pole and zero combinations can produce the same gain-phase characteristics, but result in noticeably different large-signal responses. Choosing frequency compensation values that optimize both small-signal and large-signal responses is difficult. Compromise values often result. Power supply start-up and short-circuit recovery are the worst-case large signal conditions. Input voltage and 4430fb 19 LT4430 APPLICATIONS INFORMATION Next, increase COC’s value. Either use a capacitor substitution box or solder each new value into the circuit. Monitor the start-up and short-circuit recovery waveforms. Note any changes. Figures 8b to 8e illustrate what happens as COC increases. In general, overshoot decreases as COC increases. COC = 0.0168μF in Figure 8b begins to affect loop dynamics, but start-up still exhibits about 1.5V of overshoot. Short-circuit recovery is considerably more damped. COC = 0.022μF in Figure 8c damps start-up overshoot to 0.5V and short-circuit recovery remains similar to that of Figure 8b. COC = 0.033μF in Figure 8d provides under 100mV of overshoot and short-circuit recovery is slightly more damped. COC = 0.047μF in Figure 8e achieves zero overshoot at the expense of additional damping and delay time in short-circuit recovery. In this example, COC = 0.033μF provides the best value for both start-up and short-circuit recovery. Figure 8f provides an expanded scale of the waveforms. After a COC value is selected, check start-up and short-circuit recovery over the VIN supply range and with higher output load conditions. Modify the value as necessary. Start-up and short-circuit recovery waveforms for various designs will differ from the photos shown in this example. Factors affecting these waveforms include the isolated topology chosen, the primary-side and secondary-side bias circuitry and input/output conditions. For instance, in many isolated power supplies, a winding on the main power transformer bootstraps the supply voltage for the primary-side control circuitry. Under short-circuit conditions, the primary-side control circuitry’s supply voltage collapses, generating a restart cycle. Recovery from short-circuit is therefore identical to start-up. In the flyback example discussed, the primary-side control circuitry is always active. Switching never stops in short-circuit. The LT4430 error amplifier COMP pin changes from its low clamp level to its higher regulating value during start-up and changes from its high clamp level to its lower regulating point during short-circuit recovery. This large-signal behavior explains the observed difference in the start-up versus short-circuit recovery waveforms. A final point of discussion involves the chosen COC value. LTC recommends that the designer use a value that controls overshoot to the acceptable level, but is not made overly large. The temptation arises to use the overshoot control function as a power supply “soft-start” feature. Larger values of COC, above what is required to control overshoot, do result in smaller dV/dt rates and longer start-up times. However, large values of COC may stall the feedback loop during start-up or short-circuit recovery, resulting in an extended period of time that the output voltage “flatspots”. This voltage shelf may occur at an intermediate value of output voltage, promoting anomalous behavior with the powered load circuitry. If this situation occurs with the desired COC value, solutions may require circuit modifications. In particular, bias supply holdup times are a prime point of concern as switching stops during these output voltage flatspots. As a reminder, the purpose of this LT4430 circuitry is to control and prevent excessive output voltage overshoot that would otherwise induce damage or destruction, not to control power supply timing, sequencing, etc. It is ultimately the user’s responsibility to define the acceptance criteria for any waveforms generated by the power supply relative to overall system requirements. 4430fb 20 LT4430 APPLICATIONS INFORMATION START-UP VOUT 5V/DIV START-UP VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV t = 5ms/DIV COC = 100pF 4430 F08a t = 5ms/DIV COC = 0.0168μF = 0.01μF + 6.8nF 4430 F08b Figure 8a. Start-Up and Short-Circuit Recovery Waveforms Figure 8b. Start-Up and Short-Circuit Recovery Waveforms START-UP VOUT 5V/DIV START-UP VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV t = 5ms/DIV COC = 0.022μF 4430 F08c t = 5ms/DIV COC = 0.033μF 4430 F08d Figure 8c. Start-Up and Short-Circuit Recovery Waveforms Figure 8d. Start-Up and Short-Circuit Recovery Waveforms START-UP VOUT 5V/DIV START-UP VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV SHORT-CIRCUIT RECOVERY VOUT 5V/DIV t = 5ms/DIV COC = 0.047μF 4430 F08e t = 5ms/DIV COC = 0.033μF 4430 F08f Figure 8e. Start-Up and Short-Circuit Recovery Waveforms Figure 8f. Zoom In of Waveforms with Selected COC = 0.033μF 4430fb 21 200W, 26V, 95% Efficient Base Station Converter C8 6.8nF 100V D6 B0540W R16 1k C9 10nF 100V D7 8.2V L1 10μH VBS C10 1μF Q3 BCX55 LT4430 TYPICAL APPLICATIONS 22 R15 2.2Ω D3 BAS516 R26 10Ω R1 82k C1 2.2μF 100V D1 12V 2 4 D2 18V VU1 C2 1μF PA0741 T1 Q1 BCX55 D5 B0540W R2 47k ISOLATION BARRIER 36V TO 72V VIN • • 7, 10 • 8, 11 26V 8A COUT 22μF 50V X7R 2 4 SD_VSEC 14 15 C4 1nF FG VCC CG CS LTC3900 6 T2 GND SYNC 8 R21 330Ω CS– CS TIMER 2 7 + R4 13.2k SOUT VIN GND 8 13 R12 39k VBS 4 C11 1μF R14 0.008Ω C7 220pF 12 11 R13 680Ω 10 5 C3 2.2μF D4 BAT760 VU1 Q4 PH20100 Q5 PH20100 Q2 PH21NQ15 x2 R3 370k R5 114k ROSC BLANK SS_MAXDC PGND LT1952 DELAY VREF COMP FB SYNC SOUT 16 ISENSE OC 7 R6 33k 3 R17 10k C5 0.47μF 9 5 3 1 R7 33k R8 33k R18 10k R24 26.1k 1% R19 10k VBS R20 15k R9 33k 6 C6 0.1μF 1 2 NC • • 4 C12 1nF C16 10pF VU1 R22 330Ω NEC PS2701 VBS C13 1μF C14 33nF 1 VIN OPTO LT4430 2 3 GND OC COMP FB COUT = TDK D1, D2, D7 = PHILIPS Q1, Q2 = PHILIPS L1 = PULSE ENGINEERING PB2020.103 T1 = PULSE ENGINEERING T2 = COILCRAFT Q4470-B 6 R10 22k C15 R23 2.2nF 8.2k 5 4 R25 6.04k 1% C17 2200pF 250V 4430 TA03a R11 1.2k 4430fb LTC3723-1 240W 42VIN to 56VIN to 12V/20A Isolated 1/4 Brick (2.3" × 1.45") VF VIN 12V D3 T1 4T:6T(65μHMIN):6T:2T:2T VE L6 1.25μH VE 2 1 3 L5 0.56μH D4 1nF 100V 10 1W +VIN 42V TO 56V 1μF 100V –VIN 1μF 100V x3 12V 1 3 A • • 11 9 B • VF D1 1k 1/4W VOUT TYPICAL APPLICATIONS 2 0.1μF 5 A B VF 1.5k ISNS 12V L4 1mH D5 1 D6 866Ω 12 CSF– 14 15 MF MF2 6 CSE+ 6 11 CSF+ 9 SYNC 100Ω 220pF A B 6 3 SDRA CS COMP SPRG RLEB SS DPRG VREF 1 243k 330pF 0.47μF 750Ω 22nF 5 2 6 C4 2.2nF 250V OPTO 16 9 150k 68nF 270pF 10k 33k 12 14 11 10 MOC207 6 1 5 COMP VIN LT4430ES6 GND 2 OC 22nF –VOUT 4430 TA03b 4 0.1μF 1μF 100V Si7370DP x2 VE 6.19k 1/4W 1% 1k 1% 6.19k 1/4W 1% 1k 1% 866Ω 5 CSE– LTC3901EGN GND PGND GND2 PGND2 8 4 10 13 2 Si7370DP x2 2 4 3 • VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND TS Si7852DP Si7852DP 4 • VCC 6 INP BOOST LTC4440ES6 5 4.7Ω TG GND TS 7 + C1, C2 47μF 16V x2 1μF 12V/20A 97 Si7852DP Si7852DP 42VIN 96 48VIN –VOUT 1k 1/4W VOUT 100Ω 3 16 ME ME2 VCC 1 PV CC TIMER 7 470pF VOUT 1.1k 1 15nF 1.5k 4 FB 3 604Ω 1% 11.5k 1% 4.7nF 470pF –VOUT 1μF 1μF MMBT3904 D7 10V 42.2k 1k 56VIN R1 0.03Ω 1.5W R2 0.03Ω 1.5W EFFICIENCY (%) 95 + C3 68μF 20V T2 1(1.5mH):0.5 1 4 94 93 6 0.1μF 22Ω 8 5 8 16 10 12 14 LOAD CURRENT (A) 18 20 VIN ISNS 12V 200Ω 1/4W 4 DRVB SDRB LTC3723EGN-1 UVLO FB GND CT 13 7 8 2 DRVA VCC 30k 1/4W 5 464k 15 1.5nF 1μF 66.5k • • • 1μF 100V TDK C3225X7R2A105M , C1, C2: SANYO 16TQC47M C3: AVX TPSE686M020R0150 C4: MURATA GHM3045X7R222K-GC D1: DIODES INC. ES1B D3-D6: BAS21 D7: MMBZ5240B L4: COILCRAFT DO1608C-105 L5: COILCRAFT DO1813P-561HC L6: PULSE PA1294.132 OR PANASONIC ETQP1H1R0BFA R1, R2: IRC LRC2512-R03G T1: PULSE PA0805.004 T2: PULSE PA0785 LT4430 23 4430fb LT4430 PACKAGE DESCRIPTION S6 Package 6-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1636) 0.62 MAX 0.95 REF 2.90 BSC (NOTE 4) 1.22 REF 3.85 MAX 2.62 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.95 BSC 0.30 – 0.45 6 PLCS (NOTE 3) 0.80 – 0.90 0.20 BSC 1.00 MAX DATUM ‘A’ 0.01 – 0.10 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 0.09 – 0.20 (NOTE 3) 1.90 BSC S6 TSOT-23 0302 REV B 4430fb 24 LT4430 REVISION HISTORY REV B DATE 5/11 DESCRIPTION H-Grade and MP-Grade parts added. Reflected throughout the data sheet. (Revision history begins at Rev B) PAGE NUMBER 1-26 4430fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 25 LT4430 TYPICAL APPLICATION 5V, 2A Isolated Flyback Telecom Converter Start-Up Waveforms with and without Overshoot Control Implemented ISOLATION BARRIER 36V TO 72V VIN C1 1μF 100V –VIN R1 220k D1 PDZ-9.1B 9.1V R2 100k CTX-02-15242 T1 2 4 Q1 FDC2512 5V 2A Q2 MMBTA42 8.5V D2 BAS516 • 9, 10 • 11, 12 D4 UPS840 CO1 100μF 6.3V CO2 100μF 6.3V CO3 100μF 6.3V ITH/SHDN ITH/RUN GND FB LTC3803 NGATE VCC SENSE R3 4.7k C2 1μF 10V R4 220Ω C3 150pF 200V D5 MBR0530 R7 11k 1% RCS 0.068Ω 8.5V R5 6.8k C8 0.047μF C5 1μF C6 0.033μF MOC207 VIN GND OC LT4430 OPTO COMP FB R8 1500Ω 1% 4430 TA02 D3 BAS516 R10 680Ω C7 R9 0.1μF 1k C1 = TDK, X7R CO1, C02, C03 = TDK, X5R D1, D2, D3 = PHILIPS D4 = MICROSEMI Q1 = FAIRCHILD Q2 = DIODES, INC. T1 = COOPER MOC207 = FAIRCHILD R6 470k C4 2200pF 250V RELATED PARTS PART NUMBER LT1952/LT1952-1 LTC3725/LTC3726 DESCRIPTION Isolated Synchronous Forward Controllers COMMENTS Ideal for Medium Power 24V and 48V Input Applications High Efficiency with On-Chip MOSFET Drivers Minimizes External Components, On-Chip MOSFET Drivers Ideal for High Power 24V and 48V Input Applications Programmable Timeout, Synchronization Sequencer, Reverse Inductor Current Sense Isolated Synchronous No-Opto Forward Controller Chip Set Ideal for Medium Power 24V and 48V Input Applications LTC3723-1/LTC3723-2 Synchronous Push-Pull and Full-Bridge Controllers LTC3721-1/LTC3721-2 Non-Synchronous Push-Pull and Full-Bridge Controllers LTC3722/LTC2722-2 LTC3900 LTC3901 LTC3803/LTC3803-3/ LTC3803-5 LTC3805/LTC3805-5 LT3748 LT3758 Synchronous Isolated Full Bridge Controllers Synchronous Rectifier Driver for Forward Converters Synchronous Rectifier Driver for Push-Pull and Full-Bridge Programmable Timeout, Synchronization Sequencer, Reverse Inductor Current Sense Flyback DC/DC Controller with Fixed 200kHz or 300kHz Operating Frequency Adjustable Constant Frequency (70KHz to 700kHz) Frequency Flyback DC/DC Controller 100V No Opto Flyback Controller Boost, Flyback, SEPIC and Inverting Controller VIN and VOUT Limited by External Components, 6-pin ThinSoT Package VIN and VOUT Limited by External Components, MSOP-10E and 3mm × 3mm DFN-10 Packages 5V ≤ VIN ≤ 100V, Boundary Mode Operation, MSOP-16 with Extra High Voltage Pin Spacing 5.5V ≤ VIN ≤ 100V, 100kHz to 1MHz Fixed Frequency, 3mm × 3mm DFN-10 and MSOP-10E Package 4430fb 26 Linear Technology Corporation (408) 432-1900 ● FAX: (408) 434-0507 ● LT 0511 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2004