LTC6910-1CTS8

LTC6910-1 LTC6910-2/LTC6910-3 Digitally Controlled Programmable Gain Amplifiers in SOT-23 FEATURES s s s s s s s s s DESCRIPTIO 3-Bit Digital Gain Control in Three Gain-Code Options Rail-to-Rail Input Range Rail-to-Rail Output Swing Single or Dual Supply: 2.7V to 10.5V Total 11MHz Gain Bandwidth Product Input Noise Down to 8nV/√Hz System Dynamic Range to 120dB Input Offset Voltage: 1.5mV 8-Pin Low Profile (1mm) SOT-23 (ThinSOT™) Package The LTC®6910 family are low noise digitally programmable gain amplifiers (PGAs) that are easy to use and occupy very little PC board space. The inverting gain is adjustable using a 3-bit digital input to select gains of 0, 1, 2, 5, 10, 20, 50 and 100V/V in the LTC6910-1; 0, 1, 2, 4, 8, 16, 32 and 64V/V in the LTC6910-2; and 0, 1, 2, 3, 4, 5,6 and 7V/V in the LTC6910-3. The LTC6910-Xs are inverting amplifiers with rail-to-rail output. When operated with unity gain, they will also process rail-to-rail input signals. A half-supply reference generated internally at the AGND pin supports single power supply applications. Operating from single or split supplies from 2.7V to 10.5V, the LTC6910-X family is offered in an 8-lead SOT-23 package. , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. U.S. Patent Number 6121908. APPLICATIO S s s s s Data Acquisition Systems Dynamic Gain Changing Automatic Ranging Circuits Automatic Gain Control TYPICAL APPLICATIO Single Supply Programmable Amplifier V+ 2.7V TO 10.5V 0.1µF DIGITAL INPUTS GAIN IN VOLTS/VOLT G2 G1 G0 6910-1 6910-2 6910-3 0 0 0 0 0 0 0 –1 0 –1 1 –1 0 –2 1 –2 0 –2 0 –5 1 –4 1 –3 1 –10 0 –8 0 –4 1 –20 0 –16 1 –5 1 –50 1 –32 0 –6 1 –100 1 –64 1 –7 50 40 4 VIN 3 LTC6910-X 5 7 6 1 2 AGND 1µF OR LARGER 6910 TA01 GAIN (dB) 8 VOUT = GAIN • VIN 30 GAIN OF 50 (DIGITAL INPUT 110) GAIN OF 20 (DIGITAL INPUT 101) 20 GAIN OF 10 (DIGITAL INPUT 100) 10 GAIN OF 5 (DIGITAL INPUT 011) GAIN OF 2 (DIGITAL INPUT 010) 0 GAIN OF 1 (DIGITAL INPUT 001) 1k 10k 100k FREQUENCY (Hz) 1M 10M 6910 TA01b G2 G1 G0 PIN 2 (AGND) PROVIDES BUILT-IN HALF-SUPPLY REFERENCE WITH INTERNAL RESISTANCE OF 5k. AGND CAN ALSO BE DRIVEN BY A SYSTEM ANALOG GROUND REFERENCE NEAR HALF SUPPLY –10 100 U Frequency Response (LTC6910-1) VS = 10V, VIN = 5mVRMS GAIN OF 100 (DIGITAL INPUT 111) 6910123fa U U 1 LTC6910-1 LTC6910-2/LTC6910-3 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO Total Supply Voltage (V+ to V–) ............................. 11V Input Current ..................................................... ±25mA Operating Temperature Range (Note 2) LTC6910-1C, -2C, -3C ........................ – 40°C to 85°C LTC6910-1I, -2I, -3I ........................... – 40°C to 85°C LTC6910-1H, -2H, -3H .................... – 40°C to 125°C Specified Temperature Range (Note 3) LTC6910-1C, -2C, -3C ........................ – 40°C to 85°C LTC6910-1I, -2I, -3I ........................... – 40°C to 85°C LTC6910-1H, -2H, -3H .................... – 40°C to 125°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER LTC6910-1CTS8 LTC6910-1ITS8 LTC6910-1HTS8 LTC6910-2CTS8 LTC6910-2ITS8 LTC6910-2HTS8 LTC6910-3CTS8 LTC6910-3ITS8 LTC6910-3HTS8 TS8 PART MARKING* LTB5 (6910-1) LTACQ (6910-2) LTACS (6910-3) Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades are identified by a label on the shipping container. TOP VIEW OUT 1 AGND 2 IN 3 V– 4 8 V+ 7 G2 6 G1 5 G0 TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 150°C, θJA = 230°C/W GAI SETTI GS A D PROPERTIES Table 1. LTC6910-1 NOMINAL VOLTAGE GAIN Volts/Volt (dB) 0 –120 –1 0 –2 6 –5 14 –10 20 –20 26 –50 34 –100 40 NOMINAL LINEAR INPUT RANGE (VP-P) Dual 5V Single 5V Single 3V Supply Supply Supply 10 5 3 10 5 3 5 2.5 1.5 2 1 0.6 1 0.5 0.3 0.5 0.25 0.15 0.2 0.1 0.06 0.1 0.05 0.03 NOMINAL INPUT IMPEDANCE (kΩ) (Open) 10 5 2 1 1 1 1 G2 0 0 0 0 1 1 1 1 G1 0 0 1 1 0 0 1 1 G0 0 1 0 1 0 1 0 1 6910123fa 2 U W U U WW U W U U LTC6910-1 LTC6910-2/LTC6910-3 GAI SETTI GS A D PROPERTIES Table 2. LTC6910-2 NOMINAL VOLTAGE GAIN Volts/Volt (dB) 0 –120 –1 0 –2 6 –4 12 –8 18.1 –16 24.1 –32 30.1 –64 36.1 NOMINAL LINEAR INPUT RANGE (VP-P) Dual 5V Single 5V Single 3V Supply Supply Supply 10 5 3 10 5 3 5 2.5 1.5 2.5 1.25 0.75 1.25 0.625 0.375 0.625 0.313 0.188 0.313 0.156 0.094 0.156 0.078 0.047 NOMINAL INPUT IMPEDANCE (kΩ) (Open) 10 5 2.5 1.25 1.25 1.25 1.25 G2 0 0 0 0 1 1 1 1 G1 0 0 1 1 0 0 1 1 G0 0 1 0 1 0 1 0 1 Table 3. LTC6910-3 NOMINAL VOLTAGE GAIN Volts/Volt (dB) 0 –120 –1 0 –2 6 –3 9.5 –4 12 –5 14 –6 15.6 –7 16.9 NOMINAL LINEAR INPUT RANGE (VP-P) Dual 5V Single 5V Single 3V Supply Supply Supply 10 5 3 10 5 3 5 2.5 1.5 3.33 1.67 1 2.5 1.25 0.75 2 1 0.6 1.67 0.83 0.5 1.43 0.71 0.43 NOMINAL INPUT IMPEDANCE (kΩ) (Open) 10 5 3.3 2.5 2 1.7 1.4 G2 0 0 0 0 1 1 1 1 G1 0 0 1 1 0 0 1 1 G0 0 1 0 1 0 1 0 1 U U U 6910123fa 3 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Total Supply Voltage Supply Current CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. C, I SUFFIXES MIN TYP MAX q MIN 2.7 H SUFFIX TYP MAX 10.5 2 2.4 3 3.5 12 50 20 90 30 180 10 50 10 80 20 180 ± 27 ± 35 3 3.5 4.5 4.9 30 100 40 160 50 270 20 85 30 150 40 250 UNIT V mA mA mA mA mV mV mV mV mV mV mV mV mV mV mV mV mA mA Specifications for the LTC6910-1, LTC6910-2 and LTC6910-3 2.7 2 2.4 3 3.5 12 50 20 90 30 180 10 50 10 80 20 180 ± 27 ± 35 q 10.5 3 3.5 4.5 4.9 30 100 40 160 50 250 20 80 30 150 40 250 VS = 2.7V, VIN = 1.35V VS = 5V, VIN = 2.5V VS = ±5V, VIN = 0V, Pins 5, 6, 7 = – 5V or 5V VS = ±5V, VIN = 0V, Pin 5 = 4.5V, Pins 6, 7 = 0.5V (Note 4) VS = 2.7V, RL = 10k to Midsupply Point VS = 2.7V, RL = 500Ω to Midsupply Point VS = 5V, RL = 10k to Midsupply Point VS = 5V, RL = 500Ω to Midsupply Point VS = ±5V, RL = 10k to 0V VS = ±5V, RL = 500Ω to 0V q q q q q q q q q q q q q q q q Output Voltage Swing LOW (Note 5) Output Voltage Swing HIGH (Note 5) VS = 2.7V, RL = 10k to Midsupply Point VS = 2.7V, RL = 500Ω to Midsupply Point VS = 5V, RL = 10k to Midsupply Point VS = 5V, RL = 500Ω to Midsupply Point VS = ±5V, RL = 10k to 0V VS = ±5V, RL = 500Ω to 0V Output Short-Circuit Current (Note 6) AGND Open-Circuit Voltage AGND Rejection (i.e., Common Mode Rejection or CMRR) Power Supply Rejection Ratio (PSRR) Signal Attenuation at Gain = 0 Setting Slew Rate Digital Input “High” Voltage VS = 2.7V VS = ±5V VS = 5V 2.45 55 55 60 VS = 2.7V, VAGND = 1.1V to Upper AGND Limit q q VS = ±5V, VAGND = –2.5V to 2.5V VS = 2.7V to ±5V Gain = 0 (Digital Inputs 000), f = 20kHz VS = 5V, VOUT = 2.8VP-P VS = ± 5V, VOUT = 2.8VP-P VS = 2.7V VS = 5V VS = ±5V VS = 2.7V VS = 5V VS = ±5V V– ≤ (Digital Input) ≤ V+ q q q q q q q q 2.5 80 75 80 – 122 12 16 2.55 2.45 50 50 60 2.5 80 75 80 – 122 12 16 2.55 V dB dB dB dB V/µs V/µs V V V 2.43 4.5 4.5 0.27 0.5 0.5 2 2.43 4.5 4.5 0.27 0.5 0.5 2 Digital Input “Low” Voltage V V V µA Digital Input Leakage Current Magnitude 6910123fa 4 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-1 Only Voltage Gain (Note 7) CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. LTC6910-1C/LTC6910-1I LTC6910-1H MIN TYP MAX MIN TYP MAX q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q UNIT dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB mV µV/°C VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500Ω VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 5, RL = 10k VS = 2.7V, Gain = 10, RL = 10k VS = 2.7V, Gain = 10, RL = 500Ω VS = 2.7V, Gain = 20, RL = 10k VS = 2.7V, Gain = 50, RL = 10k VS = 2.7V, Gain = 100, RL = 10k VS = 2.7V, Gain = 100, RL = 500Ω VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500Ω VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 10, RL = 10k VS = 5V, Gain = 10, RL = 500Ω VS = 5V, Gain = 20, RL = 10k VS = 5V, Gain = 50, RL = 10k VS = 5V, Gain = 100, RL = 10k VS = 5V, Gain = 100, RL = 500Ω VS = ±5V, Gain = 1, RL = 10k VS = ±5V, Gain = 1, RL = 500Ω VS = ±5V, Gain = 2, RL = 10k VS = ±5V, Gain = 5, RL = 10k VS = ±5V, Gain = 10, RL = 10k VS = ±5V, Gain = 10, RL = 500Ω VS = ±5V, Gain = 20, RL = 10k VS = ±5V, Gain = 50, RL = 10k VS = ±5V, Gain = 100, RL = 10k VS = ±5V, Gain = 100, RL = 500Ω – 0.05 0 0.07 – 0.1 – 0.02 0.06 5.96 6.02 6.08 13.85 13.95 14.05 19.7 19.9 20.1 19.6 19.85 20.1 25.7 33.5 39 37.4 25.9 33.8 39.6 39 26.1 34.1 40.2 40.1 – 0.06 0 0.07 – 0.12 – 0.02 0.08 5.96 6.02 6.08 13.83 13.95 14.05 19.7 19.9 20.1 19.4 19.85 20.1 25.65 25.9 33.4 33.8 38.7 39.6 36.4 39 26.1 34.1 40.2 40.1 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 6.02 6.08 13.8 13.95 14.1 19.8 19.9 20.1 19.6 19.85 20.1 25.8 33.5 39.3 38 25.9 33.8 39.7 39.2 26.1 34.1 40.1 40.1 – 0.05 0 0.07 – 0.11 – 0.01 0.08 5.955 6.02 6.08 13.75 13.95 14.1 19.75 19.9 20.1 19.45 19.85 20.1 25.70 25.9 33.4 39.1 37 33.8 26.1 34.1 39.7 40.1 39.2 40.1 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 19.8 19.7 6.02 19.9 19.9 6.08 20.1 20.1 34 40.2 40.1 9 13.80 13.95 14.1 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 6.02 6.08 20.1 20.1 34 40.2 40.1 11 13.80 13.95 14.1 19.75 19.9 19.6 19.9 33.6 33.85 39.25 39.8 38 39.6 1.5 8 25.8 25.95 26.1 33.7 33.85 39.4 38.8 39.8 39.6 1.5 6 25.75 25.95 26.1 Offset Voltage Magnitude (Internal Op Amp) (VOS(OA)) (Note 8) Offset Voltage Drift (Internal Op Amp) (Note 8) Offset Voltage Magnitude (Referred to “IN” Pin) (VOS(IN)) DC Input Resistance (Note 9) Gain = 1 Gain = 10 DC VIN = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 5 Gain = 10, 20, 50, 100 q q 3 1.7 >100 10 5 2 1 15 10 3 1.7 >100 10 5 2 1 18 12 mV mV MΩ kΩ kΩ kΩ kΩ q q q q 6910123fa 5 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-1 Only DC Small-Signal Output Resistance Gain = 0 Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 Gain = 100, fIN = 200kHz q The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. CONDITIONS LTC6910-1C/LTC6910-1I LTC6910-1H MIN TYP MAX MIN TYP MAX 0.4 0.7 1 1.9 3.4 6.4 15 30 8 6 11 11 3.8 10.7 7.3 5.2 4.5 4.2 3.9 3.4 24 16 12 10 9.4 8.7 7.6 –90 0.003 –77 0.014 q q q UNIT Ω Ω Ω Ω Ω Ω Ω Ω 0.4 0.7 1 1.9 3.4 6.4 15 30 14 16 8 5 11 11 3.8 10.7 7.3 5.2 4.5 4.2 3.9 3.4 24 16 12 10 9.4 8.7 7.6 –90 0.003 –77 0.014 1.6 3.65 3.5 0.7 1 – 4.3 1.5 3.25 3.35 14 16 Gain-Bandwidth Product Wideband Noise (Referred to Input) MHz MHz µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz dB % dB % V V V f = 1kHz to 200kHz Gain = 0 Output Noise Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 f = 50kHz Gain = 1 Gain = 2 Gain = 5 Gain = 10 Gain = 20 Gain = 50 Gain = 100 Gain = 10, fIN = 10kHz, VOUT = 1VRMS Gain = 10, fIN = 100kHz, VOUT = 1VRMS Voltage Noise Density (Referred to Input) Total Harmonic Distortion AGND (Common Mode) Input Voltage Range (Note 10) VS = 2.7V VS = 5V VS = ± 5V 0.55 0.7 – 4.3 6910123fa 6 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-2 Only Voltage Gain (Note 7) CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. LTC6910-2C/LTC6910-2I LTC6910-2H MIN TYP MAX MIN TYP MAX q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q UNIT dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB mV µV/°C VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500Ω VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 4, RL = 10k VS = 2.7V, Gain = 8, RL = 10k VS = 2.7V, Gain = 8, RL = 500Ω VS = 2.7V, Gain = 16, RL = 10k VS = 2.7V, Gain = 32, RL = 10k VS = 2.7V, Gain = 64, RL = 10k VS = 2.7V, Gain = 64, RL = 500Ω VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500Ω VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 8, RL = 10k VS = 5V, Gain = 8, RL = 500Ω VS = 5V, Gain = 16, RL = 10k VS = 5V, Gain = 32, RL = 10k VS = 5V, Gain = 64, RL = 10k VS = 5V, Gain = 64, RL = 500Ω VS = ±5V, Gain = 1, RL = 10k VS = ±5V, Gain = 1, RL = 500Ω VS = ±5V, Gain = 2, RL = 10k VS = ±5V, Gain = 4, RL = 10k VS = ±5V, Gain = 8, RL = 10k VS = ±5V, Gain = 8, RL = 500Ω VS = ±5V, Gain = 16, RL = 10k VS = ±5V, Gain = 32, RL = 10k VS = ±5V, Gain = 64, RL = 10k VS = ±5V, Gain = 64, RL = 500Ω – 0.06 0 0.08 – 0.1 – 0.02 0.06 5.96 6.02 6.1 11.9 12.02 12.12 17.8 17.98 18.15 17.65 17.95 18.15 23.75 29.7 24 30 24.2 30.2 – 0.07 0 0.08 – 0.11 – 0.02 0.06 5.95 6.02 6.1 11.9 12.02 12.12 17.8 17.98 18.15 17.55 17.95 18.15 23.75 29.65 24 30 24.2 30.2 35.3 35.75 36.2 34.2 35.3 36.2 – 0.06 0 0.08 – 0.1 – 0.01 0.08 5.96 6.02 6.1 11.85 12.02 12.15 17.85 18 18.15 17.65 17.9 18.15 23.85 29.7 35.6 34.8 24 30 35.9 35.5 24.15 30.2 36.2 36 35.2 35.75 36.2 33.7 35.3 36.2 – 0.06 0 0.08 – 0.11 – 0.01 0.08 5.96 6.02 6.1 11.85 12.02 12.15 17.85 18 18.15 17.6 17.9 18.15 23.78 29.7 24 30 24.15 30.2 35.5 35.9 36.2 34.2 35.5 36 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 6.02 6.1 11.9 12.02 12.15 17.85 18 18.15 17.72 17.95 18.1 23.8 29.78 24 30 24.15 30.15 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 6.02 6.1 11.9 12.02 12.15 17.85 18 18.15 17.80 17.95 18.1 23.85 29.85 24 30 24.15 30.15 35.7 35.95 36.2 35.2 35.8 36.2 1.5 6 3 2 >100 10 5 2.5 1.25 15 10 9 35.7 35.95 36.2 34.8 35.8 36.2 1.5 8 3 2 >100 10 5 2.5 1.25 17 12 11 Offset Voltage Magnitude (Internal Op Amp) (VOS(OA)) (Note 8) Offset Voltage Drift (Internal Op Amp) (Note 8) Offset Voltage Magnitude (Referred to “IN” Pin) (VOS(IN)) DC Input Resistance (Note 9) Gain = 1 Gain = 8 DC VIN = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 4 Gain = 8, 16, 32, 64 q q mV mV MΩ kΩ kΩ kΩ kΩ q q q q 6910123fa 7 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-2 Only DC Small-Signal Output Resistance Gain = 0 Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. LTC6910-2C/LTC6910-2I LTC6910-2H MIN TYP MAX MIN TYP MAX 0.4 0.7 1 1.6 2.8 5 10 20 q UNIT Ω Ω Ω Ω Ω Ω Ω Ω 0.4 0.7 1 1.6 2.8 5 10 20 16 19 9 7 13 13 3.8 10.7 7.3 5.3 4.6 4.2 4 3.6 24 16 12 10.3 9.4 9 8.1 –90 0.003 –77 0.014 1.55 3.6 3.4 0.85 0.7 – 4.3 1.55 3.6 3.4 16 19 Gain-Bandwidth Product Wideband Noise (Referred to Input) Gain = 64, fIN = 200kHz f = 1kHz to 200kHz Gain = 0 Output Noise Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 f = 50kHz Gain = 1 Gain = 2 Gain = 4 Gain = 8 Gain = 16 Gain = 32 Gain = 64 Gain = 8, fIN = 10kHz, VOUT = 1VRMS Gain = 8, fIN = 100kHz, VOUT = 1VRMS 9 7 13 13 3.8 10.7 7.3 5.3 4.6 4.2 4 3.6 24 16 12 10.3 9.4 9 8.1 –90 0.003 –77 0.014 MHz MHz µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz dB % dB % V V V Voltage Noise Density (Referred to Input) Total Harmonic Distortion AGND (Common Mode) Input Voltage Range (Note 10) VS = 2.7V VS = 5V VS = ± 5V q q q 0.85 0.7 – 4.3 6910123fa 8 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-3 Only Voltage Gain (Note 7) CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. LTC6910-3C/LTC6910-3I LTC6910-3H MIN TYP MAX MIN TYP MAX q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q q UNIT dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB mV µV/°C VS = 2.7V, Gain = 1, RL = 10k VS = 2.7V, Gain = 1, RL = 500Ω VS = 2.7V, Gain = 2, RL = 10k VS = 2.7V, Gain = 3, RL = 10k VS = 2.7V, Gain = 4, RL = 10k VS = 2.7V, Gain = 4, RL = 500Ω VS = 2.7V, Gain = 5, RL = 10k VS = 2.7V, Gain = 6, RL = 10k VS = 2.7V, Gain = 7, RL = 10k VS = 2.7V, Gain = 7, RL = 500Ω VS = 5V, Gain = 1, RL = 10k VS = 5V, Gain = 1, RL = 500Ω VS = 5V, Gain = 2, RL = 10k VS = 5V, Gain = 3, RL = 10k VS = 5V, Gain = 4, RL = 10k VS = 5V, Gain = 4, RL = 500Ω VS = 5V, Gain = 5, RL = 10k VS = 5V, Gain = 6, RL = 10k VS = 5V, Gain = 7, RL = 10k VS = 5V, Gain = 7, RL = 500Ω VS = ±5V, Gain = 1, RL = 10k VS = ±5V, Gain = 1, RL = 500Ω VS = ±5V, Gain = 2, RL = 10k VS = ±5V, Gain = 3, RL = 10k VS = ±5V, Gain = 4, RL = 10k VS = ±5V, Gain = 4, RL = 500Ω VS = ±5V, Gain = 5, RL = 10k VS = ±5V, Gain = 6, RL = 10k VS = ±5V, Gain = 7, RL = 10k VS = ±5V, Gain = 7, RL = 500Ω – 0.05 0 0.07 – 0.1 – 0.02 0.06 5.93 9.35 6.02 9.5 6.08 9.7 – 0.05 0 0.09 – 0.11 – 0.02 0.06 5.93 9.35 6.02 9.5 6.09 9.75 11.9 11.98 12.2 11.8 11.98 12.2 13.85 13.92 14.05 15.4 15.5 15.6 17 17 16.7 16.85 16.55 16.8 11.9 11.98 12.2 11.75 11.98 12.2 13.8 13.92 14.05 15.4 15.5 15.6 17 17 16.7 16.85 16.47 16.8 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 9.45 6.02 9.54 6.08 9.65 – 0.05 0 0.07 – 0.1 – 0.01 0.08 5.96 9.45 6.02 9.54 6.08 9.65 11.85 12.02 12.15 11.8 11.95 12.15 13.8 13.95 14.05 15.35 15.5 15.65 16.7 16.85 16.6 16.8 17 17 11.85 12.02 12.15 11.75 11.95 12.15 13.8 13.95 14.05 15.35 15.5 15.65 16.7 16.85 16.5 16.8 17 17 – 0.06 0 0.07 – 0.1 – 0.01 0.08 5.96 9.4 11.85 11.8 6.02 9.54 12 12 6.08 9.65 12.2 12.2 15.7 – 0.06 0 0.07 – 0.12 – 0.01 0.08 5.96 9.4 11.85 11.8 6.02 9.54 12 12 6.08 9.65 12.2 12.2 15.7 13.8 13.95 14.1 15.35 15.5 16.7 16.85 17.05 16.65 16.8 17 1.5 6 3 1.9 >100 10 5 3.3 2.5 2 1.7 1.4 15 10 8 13.8 13.95 14.1 15.35 15.5 16.7 16.85 17.05 16.6 16.8 17 1.5 8 3 1.9 >100 10 5 3.3 2.5 2 1.7 1.4 15 10 8 Offset Voltage Magnitude (Internal Op Amp) (VOS(OA)) (Note 8) Offset Voltage Drift (Internal Op Amp) (Note 8) Offset Voltage Magnitude (Referred to “IN” Pin) (VOS(IN)) DC Input Resistance (Note 9) Gain = 1 Gain = 4 DC VIN = 0V Gain = 0 Gain = 1 Gain = 2 Gain = 3 Gain = 4 Gain = 5 Gain = 6 Gain = 7 q q mV mV MΩ kΩ kΩ kΩ kΩ kΩ kΩ kΩ 6910123fa q q q q q q q 9 LTC6910-1 LTC6910-2/LTC6910-3 ELECTRICAL CHARACTERISTICS PARAMETER Specifications for LTC6910-3 Only DC Small-Signal Output Resistance Gain = 0 Gain = 1 Gain = 2 Gain = 3 Gain = 4 Gain = 5 Gain = 6 Gain = 7 CONDITIONS The q denotes the specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k to midsupply point, unless otherwise noted. LTC6910-3C/LTC6910-3I LTC6910-3H MIN TYP MAX MIN TYP MAX 0.4 0.7 1 1.3 1.6 1.9 2.2 2.5 q UNIT Ω Ω Ω Ω Ω Ω Ω Ω MHz µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS µVRMS nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz nV/√Hz dB % dB % 0.4 0.7 1 1.3 1.6 1.9 2.2 2.5 11 3.8 10.7 7.3 6.1 5.3 5.2 4.9 4.7 24 16 14 12 11.6 11.2 10.5 – 90 0.003 – 80 0.01 1.55 3.6 3.4 0.85 0.7 – 4.3 1.55 3.6 3.4 Gain-Bandwidth Product Wideband Noise (Referred to Input) Gain = 7, fIN = 200kHz f = 1kHz to 200kHz Gain = 0 Output Noise Gain = 1 Gain = 2 Gain = 3 Gain = 4 Gain = 5 Gain = 6 Gain = 7 f = 50kHz Gain = 1 Gain = 2 Gain = 3 Gain = 4 Gain = 5 Gain = 6 Gain = 7 Gain = 4, fIN = 10kHz, VOUT = 1VRMS Gain = 4, fIN = 100kHz, VOUT = 1VRMS 11 3.8 10.7 7.3 6.1 5.3 5.2 4.9 4.7 24 16 14 12 11.6 11.2 10.5 – 90 0.003 – 80 0.01 Voltage Noise Density (Referred to Input) Total Harmonic Distortion AGND (Common Mode) Input Voltage Range (Note 10) VS = 2.7V VS = 5V VS = ± 5V q q q 0.85 0.7 – 4.3 V V V Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The LTC6910-XC and LTC6910-XI are guaranteed functional over the operating temperature range of – 40°C to 85°C. The LTC6910-XH are guaranteed functional over the operating temperature range of –40°C to 125°C. Note 3: The LTC6910-XC are guaranteed to meet specified performance from 0°C to 70°C. The LTC6910-XC are designed, characterized and expected to meet specified performance from – 40°C to 85°C but are not tested or QA sampled at these temperatures. LTC6910-XI are guaranteed to meet specified performance from – 40°C to 85°C. The LTC6910-XH are guaranteed to meet specified performance from – 40°C to 125°C. Note 4: Operating all three logic inputs at 0.5V causes the supply current to increase typically 0.1mA from this specification. Note 5: Output voltage swings are measured as differences between the output and the respective supply rail. Note 6: Extended operation with output shorted may cause junction temperature to exceed the 150°C limit and is not recommended. Note 7: Gain is measured with a DC large-signal test using an output excursion between approximately 30% and 70% of supply voltage. Note 8: Offset voltage referred to “IN” pin is (1 + 1/G) times offset voltage of the internal op amp, where G is nominal gain magnitude. See Applications Information. Note 9: Input resistance can vary by approximately ±30% part-to-part at a given gain setting. Note 10: At limits of AGND input range, open-loop gain of internal op amp may be greater than, or as much as 15dB below, its value at nominal AGND value. 6910123fa 10 LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-1) LTC6910-1 Gain Shift vs Temperature 0.2 VS = ± 2.5V OUTPUT UNLOADED –3dB FREQUENCY (MHz) 0.1 GAIN CHANGE (dB) GAIN = 100 GAIN (dB) GAIN = 10 0 GAIN = 1 –0.1 –0.2 –50 0 50 100 TEMPERATURE (°C) LTC6910-1 Output Voltage Swing vs Load Current +VS OUTPUT VOTLAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) SOURCE 70 +VS – 1.0 +VS – 1.5 +VS – 2.0 –VS + 2.0 –VS + 1.5 –VS + 1.0 VOLTAGE NOISE DENSITY (nV/√Hz) +VS – 0.5 VS = ± 2.5V 125°C 25°C –40°C REJECTION (dB) –VS + 0.5 –VS 0.01 0.1 1 10 OUTPUT CURRENT (mA) 100 6910 G04 LTC6910-1 Distortion with Light Loading (RL = 10k) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) –30 VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) –40 THD MEASURES HD2 AND HD3 –50 –60 GAIN = 100 –70 –80 –90 –100 0 50 100 FREQUENCY (kHz) 6910 G07 (THD + NOISE)/SIGNAL (dB) GAIN = 10 GAIN = 1 150 UW 6910 G01 LTC6910-1 Frequency Response 50 40 30 20 GAIN OF 100 GAIN OF 50 GAIN OF 20 GAIN OF 10 GAIN OF 5 10 GAIN OF 2 0 GAIN OF 1 VS = ±5V, VIN = 5mVRMS 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 LTC6910-1 –3dB Bandwidth vs Gain Setting • • • • • • VIN = 5mVRMS • VS = 2.7V • VS = ± 5V • • 10 GAIN • • 150 –10 100 • • 100 6910 G03 1k 10k 100k FREQUENCY (Hz) 1M 10M 6910 G02 1 LTC6910-1 Power Supply Rejection vs Frequency 90 80 VS = ± 2.5V GAIN = 1 100 LTC6910-1 Noise Density vs Frequency INPUT-REFERRED VS = ± 2.5V TA = 25°C GAIN = 1 60 –SUPPLY 50 40 30 20 +SUPPLY 10 GAIN = 10 GAIN = 100 SINK 10 0 0.1 1 10 100 FREQUENCY (kHz) 1000 6910 G05 1 1 10 FREQUENCY (kHz) 100 6910 G06 LTC6910-1 Distortion with Heavy Loading (RL = 500Ω) 3 1 0.3 LTC6910-1 THD + Noise vs Input Voltage 3 –20 –30 –40 –50 –60 –70 –80 –90 GAIN SETTING = 1 GAIN SETTING = 100 GAIN SETTING = 10 –30 –40 –50 –60 –70 GAIN = 1 –80 –90 VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) THD MEASURES HD2 AND HD3 –100 50 100 0 150 FREQUENCY (kHz) GAIN = 100 GAIN = 10 1 0.3 THD (%) fIN = 1kHz VS = ± 5V NOISE BW = 22kHz THD (%) 0.1 0.03 0.01 0.1 0.03 0.01 0.003 0.001 200 0.003 0.001 200 6910 G08 –100 –110 0.01 0.1 1 INPUT VOLTAGE (VP-P) 10 6910 G09 6910123fa 11 LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-2) LTC6910-2 Gain Shift vs Temperature 0.2 VS = ± 2.5V OUTPUT UNLOADED GAIN CHANGE (dB) GAIN = 64 GAIN = 8 0 GAIN = 1 30 GAIN (dB) GAIN OF 32 GAIN OF 16 –3dB FREQUENCY (MHz) 0.1 –0.1 –0.2 –50 0 50 100 TEMPERATURE (°C) LTC6910-2 Output Voltage Swing vs Load Current +VS SOURCE +VS – 1.0 +VS – 1.5 +VS – 2.0 –VS + 2.0 –VS + 1.5 –VS + 1.0 70 VOLTAGE NOISE DENSITY (nV/√Hz) OUTPUT VOTLAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) +VS – 0.5 VS = ± 2.5V 125°C 25°C –40°C REJECTION (dB) –VS + 0.5 –VS 0.01 0.1 1 10 OUTPUT CURRENT (mA) 100 6910 G13 LTC6910-2 Distortion with Light Loading (RL = 10k) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) –40 THD MEASURES HD2 AND HD3 –50 –60 GAIN = 64 –70 GAIN = 8 –80 –90 –100 0 50 100 FREQUENCY (kHz) 6910 G16 THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) –30 (THD + NOISE)/SIGNAL (dB) GAIN = 1 150 12 UW 6910 G10 LTC6910-2 Frequency Response 50 VS = ± 5V VIN = 10mVRMS 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 LTC6910-2 –3dB Bandwidth vs Gain Setting • • • • • • • • 1 10 GAIN VIN = 10mVRMS • VS = 2.7V • VS = ± 5V 40 GAIN OF 64 20 GAIN OF 8 GAIN OF 4 10 GAIN OF 2 GAIN OF 1 0 –10 100 • • • • 100 6910 G12 150 1k 100k 10k FREQUENCY (Hz) 1M 10M 6910 G11 LTC6910-2 Power Supply Rejection vs Frequency 90 80 +SUPPLY VS = ± 2.5V GAIN = 1 LTC6910-2 Noise Density vs Frequency 100 INPUT-REFERRED VS = ± 2.5V TA = 25°C GAIN = 1 GAIN = 8 10 GAIN = 64 60 –SUPPLY 50 40 30 20 SINK 10 0 0.1 1 10 100 FREQUENCY (kHz) 1000 6910 G14 1 1 10 FREQUENCY (kHz) 100 6910 G15 LTC6910-2 Distortion with Heavy Loading (RL = 500Ω) 3 1 0.3 –30 –40 GAIN = 64 –50 GAIN = 8 –60 –70 –80 GAIN = 1 0.3 3 1 –20 –30 –40 –50 –60 –70 –80 –90 LTC6910-2 THD + Noise vs Input Voltage GAIN SETTING = 64 THD (%) THD (%) 0.1 0.03 0.01 0.1 0.03 0.01 GAIN SETTING = 8 0.003 0.001 200 –90 VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) THD MEASURES HD2 AND HD3 –100 50 100 0 150 FREQUENCY (kHz) 0.003 0.001 200 6910 G17 fIN = 1kHz –100 VS = ± 5V NOISE BW = 22kHz GAIN SETTING = 1 –110 0.1 1 10 0.01 INPUT VOLTAGE (VP-P) 6910 G18 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-3) LTC6910-3 Gain Shift vs Temperature 0.02 VS = ± 2.5V OUTPUT UNLOADED GAIN CHANGE (dB) GAIN = 7 GAIN (dB) 10 –3dB FREQUENCY (MHz) 0.01 0 GAIN = 4 GAIN = 1 –0.01 –0.02 –50 0 50 100 TEMPERATURE (°C) LTC6910-3 Output Voltage Swing vs Load Current +VS OUTPUT VOTLAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) SOURCE 70 +VS – 1.0 +VS – 1.5 +VS – 2.0 –VS + 2.0 –VS + 1.5 –VS + 1.0 VOLTAGE NOISE DENSITY (nV/√Hz) +VS – 0.5 VS = ± 2.5V 125°C 25°C –40°C REJECTION (dB) –VS + 0.5 –VS 0.01 0.1 1 10 OUTPUT CURRENT (mA) 100 6910 G22 LTC6910-3 Distortion with Light Loading (RL = 10k) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) THD (AMPLITUDE BELOW FUNDAMENTAL) (dB) –30 VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) –40 THD MEASURES HD2 AND HD3 –50 –60 GAIN = 4 –70 –80 –90 –100 0 50 100 FREQUENCY (kHz) 6910 G25 0.3 –50 GAIN = 4 –60 –70 –80 GAIN = 7 0.3 THD (%) GAIN = 7 0.1 0.03 0.1 0.03 0.01 (THD + NOISE)/SIGNAL (dB) 150 UW 6910 G19 LTC6910-3 Frequency Response 20 GAIN OF 7 15 GAIN OF 5 GAIN OF 4 GAIN OF 3 5 GAIN OF 2 0 –5 GAIN OF 1 GAIN OF 6 7.0 6.0 5.0 4.0 3.0 2.0 1.0 8.0 LTC6910-3 –3dB Bandwidth vs Gain Setting • • • • • • • • •• ••• • 5 6 7 8 9 10 6910 G21 VIN = 10mVRMS • VS = 2.7V • VS = ± 5V 150 –10 100 VS = ± 5V VIN = 10mVRMS 1k 10k 100k FREQUENCY (Hz) 1M 10M 6910 G20 0 1 2 3 4 GAIN LTC6910-3 Power Supply Rejection vs Frequency 90 +SUPPLY 80 VS = ± 2.5V GAIN = 1 100 LTC6910-3 Noise Density vs Frequency INPUT-REFERRED VS = ± 2.5V TA = 25°C GAIN = 1 GAIN = 4 10 GAIN = 7 60 50 40 30 20 –SUPPLY SINK 10 0 0.1 1 10 100 FREQUENCY (kHz) 1000 6910 G23 1 1 10 FREQUENCY (kHz) 100 6910 G24 LTC6910-3 Distortion with Heavy Loading (RL = 500Ω) 3 1 LTC6910-3 THD + Noise vs Input Voltage 3 1 –20 fIN = 1kHz –30 VS = ± 5V NOISE BW = 22kHz –40 GAIN SETTING = 7 –50 GAIN SETTING = 4 –60 –70 –80 –90 GAIN SETTING = 1 0.1 1 INPUT VOLTAGE (VP-P) 10 6910 G27 –30 –40 THD (%) GAIN = 1 GAIN = 1 0.01 0.003 0.001 200 –90 VS = ± 2.5V VOUT = 1VRMS (2.83VP-P) THD MEASURES HD2 AND HD3 –100 50 100 0 150 FREQUENCY (kHz) 0.003 0.001 200 6910 G26 –100 –110 0.01 6910123fa 13 LTC6910-1 LTC6910-2/LTC6910-3 PI FU CTIO S OUT (Pin 1): Analog Output. This is the output of an internal operational amplifier and swings to near the power supply rails (V+ and V–) as specified in the Electrical Characteristics table. The internal op amp remains active at all times, including the zero gain setting (digital input 000). As with other amplifier circuits, loading the output as lightly as possible will minimize signal distortion and gain error. The Electrical Characteristics table shows performance at output currents up to 10mA and current limits that occur when the output is shorted to midsupply at 2.7V and ± 5V supplies. Signal outputs above 10mA are possible but current-limiting circuitry will begin to affect amplifier performance at approximately 20mA. Long-term operation above 20mA output is not recommended. Do not exceed maximum junction temperature of 150°C. The output will drive capacitive loads up to 50pF. Capacitances higher than 50pF should be isolated by a series resistor to preserve AC stability. AGND (Pin 2): Analog Ground. The AGND pin is at the midpoint of an internal resistive voltage divider, developing a potential halfway between the V+ and V– pins, with an equivalent series resistance to the pin of nominally 5kΩ (Figure 4). AGND is also the noninverting input of the internal op amp, which makes it the ground reference voltage for the IN and OUT pins. Because of this, very “clean” grounding is important, including an analog ground plane surrounding the package. V+ 0.1µF 8 7 6 5 LTC6910-X 1 ANALOG GROUND PLANE 2 SINGLE-POINT SYSTEM GROUND DIGITAL GROUND PLANE (IF ANY) 6910 F01 Figure 1. Single Supply Ground Plane Connection 14 U U U Recommended analog ground plane connection depends on how power is applied to the LTC6910-X (Figures 1, 2, and 3). Single power supply applications typically use V– for the system signal ground. The analog ground plane in single-supply applications should therefore tie to V–, and the AGND pin should be bypassed to this ground plane by a high quality capacitor of at least 1µF (Figure 1). The AGND pin then provides an internal analog reference voltage at half the supply voltage (with internal resistance of approximately 5kΩ) which is the center of the swing range for both input and output. Dual supply applications with symmetrical supplies (such as ±5V) have a natural system ground at zero volts, which can drive the analog ground plane; AGND then connects directly to the ground plane, making zero volts the input and output reference voltage for the LTC6910-X (Figure 2). Finally, if a dual power supply is asymmetrical, the supply ground is still the natural ground plane voltage. To maximize signal swing capability with an asymmetrical supply, however, it is often desirable to refer the LTC6910-X’s analog input and output to a voltage equidistant from the two supply rails V+ and V–. The AGND pin will provide such a potential when open-circuited and bypassed with a capacitor (Figure 3), just as with a single power supply, but now the ground plane connection is different and the LTC6910-X’s V+ and V– pins are both isolated from this ground plane. V+ 0.1µF 8 7 6 5 V+ 0.1µF 8 7 6 5 LTC6910-X LTC6910-X 3 4 V+ REFERENCE 2 1 ANALOG GROUND PLANE 2 3 4 0.1µF 1 ANALOG GROUND PLANE 2 3 1µF 4 MID-SUPPLY REFERENCE 0.1µF 1µF V– SINGLE-POINT SYSTEM GROUND SINGLE-POINT SYSTEM GROUND V– DIGITAL GROUND PLANE (IF ANY) 6910 F02 DIGITAL GROUND PLANE (IF ANY) 6910 F03 Figure 2. Symmetrical Dual Supply Ground Plane Connection Figure 3. Asymmetrical Dual Supply Ground Plane Connection 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 PI FU CTIO S Where AGND does not connect to a ground plane, as in Figures 1 and 3, it is important to AC-bypass the AGND pin. This is especially true when AGND is used as a reference voltage for other circuitry. Also, without a bypass capacitor, wideband noise will enter the signal path from the internal voltage divider resistors that set the DC voltage on AGND. This noise can reduce SNR by 3dB at high gain settings. The resistors present a Thévenin equivalent of approximately 5k to the AGND pin. An external capacitor from AGND to the ground plane, whose impedance is well below 5k at frequencies of interest, will suppress this noise. A 1µF high quality capacitor is effective in suppressing resistor noise for frequencies down to 1kHz. Larger capacitors extend this suppression to proportionately lower frequencies. This issue does not arise in symmetrical dual supply applications (Figure 2) because AGND goes directly to ground. In applications requiring an analog ground reference other than halfway between the supply rails, the user can override the built-in analog ground reference by tying the AGND pin to a reference voltage within the AGND voltage range specified in the Electrical Characteristics table. The AGND pin will load the external reference with approximately 5k returned to the mid-supply potential. AGND should still be capacitively bypassed to a ground plane as noted above. Do not connect the AGND pin to the V – pin. IN (Pin 3): Analog Input. The input signal to the amplifier in the LTC6910-X is the voltage difference between the IN and AGND pins. The IN pin connects internally to a digitally controlled resistance whose other end is a current summing point at the same potential as the AGND pin (Figure 4). At unity gain (digital input 001), the value of this input resistance is approximately 10kΩ and the IN voltage range is rail-to-rail (V+ to V–). At gain settings above unity (digital input 010 or higher), the input resistance falls. Also, the linear input voltage range falls in inverse proportion to gain. (The higher gains are designed to boost lower level signals with good noise performance.) Tables 1, 2, and 3 summarize this behavior. In the “zero” gain state (digital input 000), analog switches disconnect the IN pin internally and this pin presents a very high input resistance. The input may vary from rail to rail in the “zero” gain setting but the output is insensitive to it and remains at the AGND potential. Circuitry driving the IN pin must consider the LTC6910-X’s input resistance and the variation of this resistance when used at multiple gain settings. Signal sources with significant output resistance may introduce a gain error as the source’s output resistance and the LTC6910-X’s input resistance form a voltage divider. This is especially true at the higher gain settings where the input resistance is lowest. In single supply voltage applications at elevated gain settings (digital input 010 or higher), it is important to remember that the LTC6910-X’s DC ground reference for both input and output is AGND, not V–. With increasing gains, the LTC6910-X’s input voltage range for unclipped output is no longer rail-to-rail but shrinks toward AGND. The OUT pin also swings positive or negative with respect to AGND. At unity gain (digital input 001), both IN and OUT voltages can swing from rail to rail (Tables 1, 2, 3). G2 7 G1 6 G0 5 MOS-INPUT OP AMP V+ 8 V+ 10k 2 AGND Figure 4. Block Diagram + – U U U CMOS LOGIC IN 3 INPUT R ARRAY FEEDBACK R ARRAY 1 OUT 10k V– 4 V– 6910 F04 6910123fa 15 LTC6910-1 LTC6910-2/LTC6910-3 PI FU CTIO S V–, V+ (Pins 4, 8): Power Supply Pins. The V+ and V– pins should be bypassed with 0.1µF capacitors to an adequate analog ground plane using the shortest possible wiring. Electrically clean supplies and a low impedance ground are important for the high dynamic range available from the LTC6910-X (see further details under AGND). Low noise linear power supplies are recommended. Switching power supplies require special care to prevent switching noise coupling into the signal path, reducing dynamic range. G0, G1, G2 (Pins 5, 6, 7): CMOS-Level Digital GainControl Inputs. G2 is the most significant bit (MSB). These pins control the voltage gain from IN to OUT pins (see Table 1, Table 2 and Table 3). Digital input code 000 causes a “zero” gain with very low output noise. In this “zero” gain state the IN pin is disconnected internally, but the OUT pin remains active and forced by the internal op amp to the voltage present on the AGND pin. Note that the voltage gain from IN to OUT is inverting: OUT and IN pins always swing on opposite sides of the AGND potential. The G pins are high impedance CMOS logic inputs and must be connected (they will float to unpredictable voltages if open circuited). No speed limitation is associated with the digital logic because it is memoryless and much faster than the analog signal path. 16 U U U 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 APPLICATIO S I FOR ATIO Functional Description The LTC6910 family are small outline, wideband inverting DC amplifiers whose voltage gain is digitally programmable. Each delivers a choice of eight voltage gains, controlled by the 3-bit digital inputs to the G pins, which accept CMOS logic levels. The gain code is always monotonic; an increase in the 3-bit binary number (G2 G1 G0) causes an increase in the gain. Table 1, Table 2 and Table 3 list the nominal voltage gains for LTC6910-1, LTC6910-2 and LTC6910-3 respectively. Gain control within each amplifier occurs by switching resistors from a matched array in or out of a closed-loop op amp circuit using MOS analog switches (Figure 4). Bandwidth depends on gain setting. Curves in the Typical Performance Characteristics section show measured frequency responses. Digital Control Logic levels for the LTC6910-X digital gain control inputs (Pins 5, 6, 7) are nominally rail-to-rail CMOS. Logic 1 is V+, logic 0 is V – or alternatively 0V when using ±5V supplies. The part is tested with the values listed in the Electrical Characteristics table (Digital Input “High” and “Low” Voltages), which are 10% and 90% of full excursion on the inputs. That is, the tested logic levels are 0.27V and 2.43V with a 2.7V supply, 0.5V and 4.5V levels with 0V and 5V supply rails, and 0.5V and 4.5V logic levels at ±5V supplies. Do not attempt to drive the digital inputs with TTL logic levels (such as HCT or LS logic), which normally do not swing near +5V. TTL sources should be adapted with CMOS drivers or suitable pull-up resistors to 5V so that they will swing to the positive rail. Timing Constraints Settling time in the CMOS gain-control logic is typically several nanoseconds and faster than the analog signal path. When amplifier gain changes, the limiting timing is analog, not digital, because the effects of digital input changes are observed only through the analog output (Figure 4). The LTC6910-X’s logic is static (not latched) and therefore lacks bus timing requirements. However, as with any programmable-gain amplifier, each gain change causes an output transient as the amplifier’s output moves, U with finite speed, toward a differently scaled version of the input signal. Varying the gain faster than the output can settle produces a garbled output signal. The LTC6910-X analog path settles with a characteristic time constant or time scale, τ, that is roughly the standard value for a first order band limited response: τ = 1 / (2 π f-3dB), where f-3dB is the –3dB bandwidth of the amplifier. For example, when the upper –3dB frequency is 1MHz, τ is about 160ns. The bandwidth, and therefore τ, varies with gain (see Frequency Response and –3dB Bandwidth curves in Typical Performance Characteristics). After a gain change it is the new gain value that determines the settling time constant. Exact settling timing depends on the gain change, the input signal and the possibility of slew limiting at the output. However as a basic guideline, the range of τ is 20ns to 1400ns for the LTC6910-1, 20ns to 900ns for the LTC6910-2 and 20ns to 120ns for the LTC6910-3. These numbers correspond to the ranges of –3dB Bandwidth in the plots of that title under Typical Performance Characteristics. Offset Voltage vs Gain Setting The electrical tables list DC offset (error) voltage at the inputs of the internal op-amp in Figure 4, VOS(OA), which is the source of DC offsets in the LTC6910-X. The tables also show the resulting, gain dependent offset voltage referred to the IN pin, VOS(IN). These two measures are related through the feedback/input resistor ratio, which equals the nominal gain-magnitude setting, G: VOS(IN) = (1 + 1/G) VOS(OA) Offset voltages at any gain setting can be inferred from this relationship. For example, an internal offset VOS(OA) of 1mV will appear referred to the IN pin as 2mV at a gain setting G of 1, or 1.5mV at a gain setting of 2. At high gains, VOS(IN) approaches VOS(OA). (Offset voltage can be of either polarity; it is a statistical parameter centered on zero.) The MOS input circuitry of the internal op amp in Figure 4 draws negligible input currents (unlike some op amps), so only VOS(OA) and G affect the overall amplifier’s offset. 6910123fa W UU 17 LTC6910-1 LTC6910-2/LTC6910-3 APPLICATIO S I FOR ATIO Offset Nulling and Drift Because internal op amp offset voltage VOS(OA) is gain independent as noted above, offset trimming can be readily added at the AGND pin, which drives the noninverting input of the internal op amp. Such a trim shifts the AGND voltage slightly from the system’s analog ground reference, where AGND would otherwise connect directly. This is convenient when a low resistance analog ground potential or analog ground reference exists, for the return of a voltage divider as in Figure 5a. When adjusted for zero DC output voltage when the LTC6910-X has zero DC input voltage, this DC nulling will hold at other gain settings also. Figure 5a shows the basic arrangement for dual-supply applications. A voltage divider (R1 and R2) scales external reference voltages +VREF and –VREF to a range equaling or slightly exceeding the approximately ±10mV op amp offset-voltage range. Resistor R1 is chosen to drop the ±10mV maximum trim voltage when the potentiometer is set to either end. Thus if VREF is 5V, R1 should be about 100Ω. Note also that the two internal 10k resistors in Figure 4 tend to bias AGND toward the mid-point of V+ and V–. The external voltage divider will swamp this effect if R1 is much less than 5kΩ. When considering the effect of the internal 10k resistors, note that they form a Thévenin equivalent of 5k in series with an open-circuit voltage at the halfway potential (V+ + V–)/ 2. (Although tightly matched, +VREF LTC6910-X R2 49.9k 20k R1 –VREF 2 17.4k 2 1µF 17.4k 6910 F05a AGND 500Ω C1 ≥1µF ANALOG GROUND REFERENCE Figure 5a. Offset Nulling (Dual Supplies) Figure 5b. Offset Nulling (Single Supply, Half Supply Reference) 18 U these internal 10k resistors also have an absolute tolerance of up to ±30% and a temperature coefficient of typically –30ppm/°C.) Also, as described under Pin Functions for AGND, a bypass capacitor C1 is always advisable when AGND is not connected directly to a ground plane. With this trim technique in place, the remaining DC offset sources are drifts with temperature (typically 6µV/°C referred to VOS(OA)), shifts in the LTC6910-X’s supply voltage divided by the PSRR factors, supply voltage shifts coupling through the two 10k internal resistors of Figure 4, and of course any shifts in the reference voltages that supply +VREF and –VREF in Figure 5a. Figure 5b illustrates how to make an offset voltage adjustment relative to the mid-supply potential in single supply applications. Resistor values shown provide at least a ±10mV adjustment range assuming the minimum values for the internal resistors at pin 2 and a supply potential of 5V. For single supply systems where all circuitry is DC referenced to some other fixed bias potential, an offset adjustment scheme is shown in Figure 5c. A low value for R1 overrides the internal resistors at pin 2 and applies the system DC bias to the LTC6910. Actual values for the adjustment components depend on the magnitude of the DC bias voltage. Offset adjustment component values shown are an example with a single 5V VCC supply and a 1.25V system DC reference voltage. VCC 5V 8 LTC6910-X W UU 1.25V SYSTEM DC REFERENCE VOLTAGE VCC 5V 4.64k 500Ω 1µF 976Ω R1 100Ω 2 VCC 5V 8 LTC6910-X AGND AGND 4 6910 F05b 4 6910 F05c Figure 5c. Offset Nulling (Single Supply, External Reference) 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 APPLICATIO S I FOR ATIO Analog Input and DC Levels As described in Tables 1, 2 and 3 and under Pin Functions, the IN pin presents a variable input resistance returned internally to a potential equal to that at the AGND pin (within a small offset-voltage error). This input resistance varies with digital gain setting, becoming infinite (open circuit) at “zero” gain (digital input 000), and as low as 1kΩ at high gain settings. It is important to allow for this input-resistance variation with gain, when driving the LTC6910-X from other circuitry. Also, as the gain increases above unity, the DC linear input-voltage range (corresponding to rail-to-rail swing at the OUT pin) shrinks toward the AGND potential. The output swings positive or negative around the AGND potential (in the opposite direction from the input, because the gain is inverting). AC-Coupled Operation Adding a capacitor in series with the IN pin makes the LTC6910-X into an AC-coupled amplifier, suppressing the source’s DC level (and even minimizing the offset voltage from the LTC6910-X itself). No further components are required because the input of the LTC6910-X biases itself correctly when a series capacitor is added. The IN pin connects to an internal variable resistor (and floats when DC open-circuited to a well defined voltage equal to the AGND input voltage at nonzero gain settings). The value of this internal input resistor varies with gain setting over a total range of about 1k to 10k, depending on version (the rightmost columns of Table 1, Table 2 and Table 3). Therefore, with a series input capacitor the low frequency cutoff will also vary with gain. For example, for a low frequency corner of 1kHz or lower, use a series capacitor of 0.16µF or larger. A 0.16µF capacitor has a reactance of 1kΩ at 1kHz, giving a 1kHz lower –3dB frequency for gain settings of 10V/V through 100V/V in the LTC6910-1. If the LTC6910-1 is operated at lower gain settings with an 0.16µF input capacitor, the higher input resistance will reduce the lower corner frequency down to 100Hz at a gain setting of 1V/V. These frequencies scale inversely with the value of the input capacitor. Note that operating the LTC6910-X in zero gain mode (digital inputs 000) open circuits the IN pin and this U demands some care if employed with a series input capacitor. When the chip enters the zero gain mode, the opened IN pin tends to freeze the voltage across the capacitor to the value it held just before the zero gain state. This can place the IN pin at or near the DC potential of a supply rail (the IN pin may also drift to a supply potential in this state due to small junction leakage currents). To prevent driving the IN pin outside the supply limit and potentially damaging the chip, avoid AC input signals in the zero gain state with a series capacitor. Also, switching later to a nonzero gain value will cause a transient pulse at the output of the LTC6910-X (with a time constant set by the capacitor value and the new LTC6910-X input resistance value). This occurs because the IN pin returns to the AGND potential and transient current flows to charge the capacitor to a new DC drop. SNR and Dynamic Range The term “dynamic range” is much used (and abused) with signal paths. Signal-to-noise ratio (SNR) is an unambiguous comparison of signal and noise levels, measured in the same way and under the same operating conditions. In a variable gain amplifier, however, further characterization is useful because both noise and maximum signal level in the amplifier will vary with the gain setting, in general. In the LTC6910-X, maximum output signal is independent of gain (and is near the full power supply voltage, as detailed in the Swing sections of the Electrical Characteristics table). The maximum input level falls with increasing gain, and the input-referred noise falls as well (as listed also in the table). To summarize the useful signal range in such an amplifier, we define Dynamic Range (DR) as the ratio of maximum input (at unity gain) to minimum input-referred noise (at maximum gain). (These two numbers are measured commensurately, in RMS Volts. For deterministic signals such as sinusoids, 1VRMS = 2.828VP-P.) This DR has a physical interpretation as the range of signal levels that will experience an SNR above unity V/V or 0dB. At a 10V total power supply, DR in the LTC6910-1 (gains 0V to 100V/V) is typically 120dB (the ratio of a nominal 9.9VP-P, or 3.5VRMS, maximum input to the 3.4µVRMS high gain input noise). The corresponding DR for the LTC6910-2 (gains 0V to 64V) is also 120dB; for 6910123fa W UU 19 LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL APPLICATIO S the LTC6910-3 (gains 0V to 7V/V) it is 117dB. The SNR from an amplifier is the ratio of input level to inputreferred noise, and can be 110dB with the LTC6910 family at unity gain. Construction and Instrumentation Cautions Electrically clean construction is important in applications seeking the full dynamic range of the LTC6910-X amplifier. Short, direct wiring will minimize parasitic capacitance and inductance. High quality supply bypass capacitors of 0.1µF near the chip provide good decoupling from a clean, low inductance power source. But several cm of wire (i.e., a few microhenrys of inductance) from the power supplies, unless decoupled by substantial capacitance (≥ 10µF) near the chip, can cause a high-Q LC resonance in the hundreds of kHz in the chip’s supplies or ground reference. This may impair circuit performance at those frequencies. A compact, carefully laid out printed circuit board with a good ground plane makes a significant difference in minimizing distortion. Finally, equipment to measure amplifier performance can itself introduce distortion or noise floors. Checking for these limits with a wire replacing the chip is a prudent routine procedure. Expanding an ADC’s Dynamic Range Figure 6 shows a compact data acquisition system for wide ranging input levels. This figure combines an LTC6910-X programmable amplifier (8-lead TSOT-23) with an LTC1864 analog-to-digital converter (ADC) in an 5V 0.1µF LTC1864 4 VIN 3 LTC6910-X 6 2 AGND 1µF GAIN CONTROL ADC CONTROL 7 1 499Ω 5 270pF VREF IN+ IN– VCC SCK SDO 20 U 8-lead MSOP. This ADC has 16-bit resolution and a maximum sampling rate of 250ksps. An LTC6910-1, for example, expands the ADC’s input amplitude range by 40dB while operating from the same single 5V supply. The 499Ω resistor and 270pF capacitor couple cleanly between the LTC6910-X’s output and the switched-capacitor input of the LTC1864. The 270pF capacitor should be an NPO or X7R type, and lead length and inductance in the connections to the LTC1864 inputs must be minimized, to achieve the full performance capability of this circuit. (See LTC 1864 data sheet for further general information.) At a gain setting of 10V/V in an LTC6910-1 (digital input 100) and a 250ksps sampling rate in the LTC1864, a 10kHz input signal at 60% of full scale shows a THD of –87dB at the digital output of the ADC. 100kHz input signals under the same conditions produce THD values around – 75dB. Noise effects (both random and quantization) in the ADC are divided by the gain of the amplifier when referred to VIN in Figure 4. Because of this, the circuit can acquire a signal that is 40dB down from full scale of 5VP-P with an SNR of over 70dB. Such performance from an ADC alone (70 + 40 = 110dB of useful dynamic range at 250ksps), if available, would be far more expensive. Low Noise AC Amplifier with Programmable Gain and Bandwidth Analog data acquisition can exploit band limiting as well as gain to suppress unwanted signals or noise. Tailoring an analog front end to both the level and bandwidth of each source maximizes the resulting SNR. 1µF 5V 8 GND CONV 6910 F04 Figure 6. Expanding an ADC’s Dynamic Range 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL APPLICATIO Figure 7 shows a block diagram and Figure 8 the practical circuit for a low noise amplifier with gain and bandwidth independently programmable over 100:1 ranges. One LTC6910-X controls the gain and another controls the bandwidth. An LT1884 dual op amp forms an integrating lowpass loop with capacitor C2 to set the programmable upper corner frequency. The LT1884 also supports rail-torail output swings over the total supply voltage range of 2.7V to 10.5V. AC coupling through capacitor C1 estabR2 C2 VIN BANDWIDTH CONTROL PGA (GAIN B) VOUT = (GAIN A)VIN 1 ≤ BANDWIDTH ≤ 2πR1C1 1 R2 2π C2 (GAIN B) Figure 7. Block Diagram of an AC Amplifier with Programmable Gain and Bandwidth + + GAIN CONTROL PGA (GAIN A) – – + – U lishes a fixed low frequency corner of 1Hz, which can be adjusted by changing C1. Alternatively, shorting C1 makes the amplifier DC coupled. (If DC gain is not needed, however, the AC coupling suppresses several error sources: any shifts in DC levels, low frequency noise and all amplifier DC offset voltages other than the low internally trimmed LT1884 offset in the integrating amplifier. If desired, another coupling capacitor in series with the input can relax the requirements on DC input level as well.) C1 R1 VOUT 6910 F05 + – GAIN = –1 6910123fa 21 LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL APPLICATIO S Measured frequency responses in Figure 8 with LTC6910-1 PGAs demonstrate bandwidth settings of 10Hz, 100Hz and 1kHz, with digital codes at the BW inputs of respectively 001, 100 and 111, and unity gain in each case. By scaling C2, this circuit can serve other bandwidths, V+ V – 0.1µF 0.1µF R2 15.8k C2 1µF 1 2 3 4 0.1µF GAIN CONTROL GN2 0 0 0 1 1 1 1 GN1 GN0 01 10 11 00 01 10 11 GAIN = 1 GAIN = 2 GAIN = 5 GAIN = 10 GAIN = 20 GAIN = 50 GAIN = 100 V– BANDWIDTH CONTROL BANDWIDTH 1Hz TO 10Hz BANDWIDTH 1Hz TO 20Hz BANDWIDTH 1Hz TO 50Hz BANDWIDTH 1Hz TO 100Hz BANDWIDTH 1Hz TO 200Hz BANDWIDTH 1Hz TO 500Hz BANDWIDTH 1Hz TO 1000Hz BW2 BW1BW0 0 01 0 10 0 11 1 00 1 01 1 10 1 11 LT1884 V+ 8 4 VIN 3 LTC6910-1 6 2 7 V– Gain vs Frequency 10 0 –10 –20 GAIN (dB) GN2 GN1 GN0 = 001 BW2 BW1 BW0 1 1 1 BW2 BW1 BW0 0 0 1 BW2 BW1 BW0 1 0 0 –30 –40 –50 –60 –70 –80 1 10 100 1k FREQUENCY (Hz) Figure 8. Low Noise AC Amplifier with Programmable Gain and Bandwidth 22 + – 5 + – U such as a maximum of 10kHz with 0.1µF using LT1884 (gain-bandwidth product around 1MHz). Noise floor from internal sources yields an output SNR of 76dB with 10mVPP input, gain of 100 and 100Hz bandwidth; for 100mVP-P input, gain of 10 and 1000Hz bandwidth it is 64dB. V+ V – 0.1µF 0.1µF VOUT V+ 8 7 6 5 R3 15.8k R4 15.8k C1 10µF R1 15.8k 1 0.1µF 3 8 4 LTC6910-1 6 2 7 1 5 10k 100k 6910 F06b 6910123fa LTC6910-1 LTC6910-2/LTC6910-3 PACKAGE DESCRIPTIO U TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 0.65 REF 2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID 0.65 BSC 0.80 – 0.90 0.20 BSC DATUM ‘A’ 0.30 – 0.50 REF NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 0.09 – 0.20 (NOTE 3) 1.00 MAX 0.01 – 0.10 0.22 – 0.36 8 PLCS (NOTE 3) 1.95 BSC 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 TS8 TSOT-23 0802 3.85 MAX 2.62 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 6910123fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC6910-1 LTC6910-2/LTC6910-3 TYPICAL APPLICATIO U AC-Coupled Single Supply Amplifiers V+ 2.7V TO 10.5V 0.1µF 0 –1 –2 –4 –8 –16 –32 –64 — 16Hz 32Hz 64Hz 127Hz 127Hz 127Hz 127Hz 0 –1 –2 –3 –4 –5 –6 –7 — 16Hz 32Hz 48Hz 64Hz 80Hz 95Hz 111Hz 8 C1 VIN 3 4 LTC6910-X 5 7 6 1 2 AGND 1µF OR LARGER 6910 TA02 LTC6910-1 LTC6910-2 LTC6910-3 DIGITAL INPUTS PASSBAND LOWER –3dB PASSBAND LOWER –3dB PASSBAND LOWER –3dB G2 G1 G0 GAIN FREQ (C1 = 1µF) GAIN FREQ (C1 = 1µF) GAIN FREQ (C1 = 1µF) 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 –1 –2 –5 –10 –20 –50 –100 — 16Hz 32Hz 80Hz 160Hz 160Hz 160Hz 160Hz VOUT = GAIN • VIN G2 G1 G0 C1 VALUE SETS LOWER CORNER FREQUENCY. THE TABLE SHOWS THIS FREQUENCY WITH C1 = 1µF. THIS FREQUENCY SCALES INVERSELY WITH C1 PIN 2 (AGND) SETS DC OUTPUT VOLTAGE AND HAS BUILT-IN HALF-SUPPLY REFERENCE WITH INTERNAL RESISTANCE OF 5k. AGND CAN ALSO BE DRIVEN BY A SYSTEM ANALOG GROUND REFERENCE NEAR HALF SUPPLY Frequency Response, LTC6910-1 50 40 30 G2, G1, G0 = 111 G2, G1, G0 = 110 G2, G1, G0 = 101 GAIN (dB) 30 40 Frequency Response, LTC6910-2 G2, G1, G0 = 111 G2, G1, G0 = 110 G2, G1, G0 = 101 Frequency Response, LTC6910-3 20 G2, G1, G0 = 111 15 10 GAIN (dB) G2, G1, G0 = 101 G2, G1, G0 = 100 G2, G1, G0 = 011 5 0 –5 G2, G1, G0 = 010 G2, G1, G0 = 110 GAIN (dB) 20 G2, G1, G0 = 100 G2, G1, G0 = 011 20 10 0 –10 100 G2, G1, G0 = 100 G2, G1, G0 = 011 G2, G1, G0 = 010 G2, G1, G0 = 001 VS = 10V, VIN = 5mVRMS C1 = 1µF 1k 10k 100k FREQUENCY (Hz) 1M 6910 TA03 10 G2, G1, G0 = 010 G2, G1, G0 = 001 VS = 10V, VIN = 5mVRMS C1 = 1µF 1k 10k 100k FREQUENCY (Hz) 1M 6910 TA04 G2, G1, G0 = 001 VS = 10V VIN = 10mVRMS C1 = 1µF 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 0 –10 100 –10 6910 TA05 RELATED PARTS PART NUMBER LT®1228 LT1251/LT1256 LTC1564 LTC6911 LTC6915 DESCRIPTION 100MHz Gain Controlled Transconductance Amplifier 40MHz Video Fader and Gain Controlled Amplifier 10kHz to 150kHz Digitally Controlled Filter and PGA Dual Matched Programmable Gain Amplifier COMMENTS Differential Input, Continuous Analog Gain Control Two Input, One Output, Continuous Analog Gain Control Continuous Time, Low Noise 8th Order Filter and 4-Bit PGA Dual 6910 in a 10 Lead MSOP Zero Drift Instrumentation Amplifier with Programmable Gain Zero Drift, Digitally Programmable Gain Up to 4096 V/V 6910123fa 24 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q LT/TP 0404 1K REV A • PRINTED IN USA www.linear.com © LINEAR TECHNOLOGY CORPORATION 2002