LX1725

LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET DESCRIPTION KEY FEATURES 12Wx2 @ 4Ω THD+N 3*V5V/4 Master, Normal mode GAIN SELECTION/MUTE The channel gain can be programmed between 26dB and 20dB by setting the HIGAIN pin to V5V or to GND. The MUTE pin is a Tri-level control pin for test purposes. When this pin is set to greater than V5V/2, the audio signal path is muted. For voltages between V5V/4 and V5V/2, the audio gain will be reduced by 6dB. This allows the “Low Gain” mode to be tested. For voltages less than V5V/4, the normal gain is in place (Figure 4). V5V MUTE 14dB SYNC LX1725 (Slave) Cosc Master Figure 2 – Two Devices Synchronized Block Diagram POWER ON RESET (POR) At start up or upon recovery from a fault condition, an internal “hiccup” counter counts 65536 clock cycles before allowing the outputs to begin switching. See the POR timing sequence in Figure 3. DESCRIPTION DESCRIPTION 2R 14dB MUTE LX1725 (Master) R 20dB Figure 4 – Gain Selection Block Diagram Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 9 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET FUNCTION DESCRIPTION(CONTINUED) WWW . Microsemi . C OM THERMAL PROTECTION When the junction temperature exceeds 125°C, the gain is reduced by 6dB (gain fold back) to reduce the output power and on-chip power dissipation., when the temperature drops below 110°C the gain will returns to normal. When the temperature exceeds 155°C OVER CURRENT LIMIT the outputs are shut off to force the output current to zero. Again, The LX1725 has built-in over circuit protection. The circuit works when the temperature drops below 130°C the outputs are allowed by monitoring the voltage drop across whichever power FET is to switch and normal operation resumes. active. When this voltage is greater than a certain threshold, an over-current condition is assumed. If this condition occurs during AUDIO INPUT five consecutive clock cycles, then the output transistors are For a high common mode rejection ratio and a maximum immediately disabled. The hiccup counter then counts 65536 clock flexibility in the application, the audio inputs are fully differential. cycles before allowing the outputs to begin switching again. By connecting the inputs anti-parallel the phase of one of the During this period the FLAG pin goes to HIGH to indicate a channels can be inverted, so that a load can be connected between system fault. A “hiccup” condition will be clearly audible if a the two output filters. In this case the system operates as a mono speaker is connected to the outputs. The threshold for the over- BTL amplifier and with the same loudspeaker impedance an current condition is set to 3.75A. approximately four times higher output power can be obtained. The over current circuit hiccup protection can be disabled by The input configuration for a mono BTL application is illustrated pulling the RILIM pin to V5V. in Figure 6. In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. UNDER VOLTAGE LOCK-OUT (UVLO) This has advantages for the current handling of the power supply at If the voltage drops below ±5V under dual supply operation or 10V low signal frequencies. under single supply operation, the under voltage lock out circuit is Vref activated and the LX1725 will enter the standby mode. This switch-off will be silent and without pop noise. It will be recovered IN1+ when the supply voltage rises above the threshold level. OUT1 The FLAG pin will go logic HIGH to indicate the system fault. A IN1similar circuit monitors V5V with a threshold of 4V. STAND BY Forcing the STBY pin high puts the LX1725 into a zero current sleep mode. The outputs enter a high impedance mode and all internal bias circuits are disabled. Vref IN2+ OUT2 IN2- LX1725 Figure 6 – Audio Input Block Diagram DESCRIPTION DESCRIPTION Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 10 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET TEST CIRCUIT SCHEMATIC WWW . Microsemi . C OM V5V V5V C6 0.1µF 35V C7 1µF 35V IN1IN1+ C8 1µF 35V R100 0 OUTREF1 HIGAIN VCOM N.C. IN1P N.C. IN1N V5V STBY VPOS VPOS VPOSA VCOMA C100 0.1µF 35V SYNC FLAG R1 25K + C12 1µF 35V C11 220pF STBY VPOS1 OUT1 JP1 C14 0.1µF + C103 35V 10µF 35V L1 47µH C18 0.68µF 50V VNEG L2 47µH C19 0.68µF 50V OUT2+ OUT2OUT1+ OUT1- SYNC FLAG RILIM VREF COSC OUTREF2 VNEGA VNEGA IN2N IN2P N.C. N.C. VGND MUTE LX1725 VNEG1 VNEG2 OUT2 VPOS2 MASTER C106 C15 + 10µF 35V 0.1µF 35V JP2 C101 0.1µF 35V VNEG VPOS MASTER C9 1µF 35V IN2IN2+ C10 1µF 35V V5V VNEGA V5V R104 5K 1% V5V V5V AGND + C5 10µF 35V R103 6K 1% Master VPOS VPOS PGND V5V VNEG C2 470µF 35V C4 0.1µF 35V VNEG R107 6K 1% R102 10K STBY FLAG SYNC C1 470µF 35V C3 0.1µF 35V R105 4K 1% R101 10K V5 R106 3K 1% Master MUTE Figure 7 – Test Circuit Schematic (Stereo, Split Supply) APPLICATIONS APPLICATIONS Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 11 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET TEST SYSTEM SET-UP WWW . Microsemi . C OM NORM STBY VCOM CTR GND TB4 +5V TB3 Power Supply GND +5V AGND JP5 Single JP3 JP4 Dual VPOS GND VNEG TB1 +V GND -V Power Supply OUT1- J1 IN1IN1+ OUT1+ Audio Precision OUT1+ GND OUT2OUT2+ IN1+ RL IN1IN2RL IN2+ OUT1- LX1725 IN2IN2+ J2 OUT2OUT2+ TB2 System One Audio Precision System One JP7 14dB 20dB MNOR MQUK SNOR MUTE SQUK JP6 LX1725 Evaluation Module Oscilloscope Figure 8 – System Test Set-up TEST SYSTEM CONFIGURATION VPOS VPOS1 VPOS VCOM VPOS1 VCOMA VCOM BTL & Logic VNEG1 VNEG2 RL & Logic VNEG2 VNEG VNEG Filterless BTL VCOMA VGND 1k VGND Driver LX1725 VPOS VPOS2 1k Filterless Filterless RL Driver VNEG1 RL APPLICATIONS APPLICATIONS RL Filterless RL RL LX1725 VPOS2 VPOS Figure 9 – System Test Configuration Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 12 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET THD+N VS POWER 100 100 THD+N VS. POWER WWW . Microsemi . C OM 10 8OHM Load, Fin=1KHz 10Hz~22KHz BPF 18V 24V 10 8OHM Load, Fin=1KHz 10Hz~22KHz BPF ±9V ±12V 1 0.21647 0.1 0.059 0.01 1 0.21647 0.1 0.059 0.01 ±14.5V % 29V % 0.001 0.001 0.0001 60m 100m 200m 500m 1.025 1 W 2 4.181 5 10 20 50 0.0001 60m 100m 200m 500m 1.025 1 W 2 4.181 5 10 20 50 THD+N VS POWER 100 50 10 10.9991 THD+N VS. POWER 100 50 4OHM Load, Fin=1KHz 10Hz~22KHz BPF 24V 10 10.9991 4OHM Load, Fin=1KHz 10Hz~22KHz BPF ±9V ±12V 1 0.59672 % 0.1 18V 1 0.59672 ± 14.5V 29V % 0.1 0.01 0.01 0.001 0.001 0.0001 60m 100m 200m 500m 1 W 2 5 10.23 13.76 20 10 0.0001 50 60m 100m 200m 500m 1 W 2 5 10.23 13.76 20 10 50 THD+N VS POWER 100 100 THD+N VS. POWER 8OHM Load, Fin=1KHz 10Hz~22KHz BPF, BTL 10 ±12V 10 8OHM Load , Fin=1KHz 10Hz~22KHz BPF , BTL 20V 24V ±10V 1 % 0.1 1 30V ±15V % 0.1 CHARTS CHARTS 0.01 0.01 0. 001 60m 200m 500m 1 2 W 5 10 20 50 100 0 . 001 60m 200m 500m 1 2 W 5 10 20 50 100 Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 13 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET THD+N VS. FREQUENCY dx=0.00000 Hz 100 100 THD+N VS. FREQUENCY WWW . Microsemi . C OM 8OHM Load, Po=1W 10Hz~22KHz BPF 10 10 8OHM Load , Po=1W 10Hz~22KHz BPF 20V 24V 30V 1 % 0.1 ±10V ±12V ±15V % 1 0.1 0. 01 0. 01 0. 001 20 0. 001 20 50 100 200 500 Hz 1k 2k 5k 10k 20k 50 100 200 500 Hz 1k 2k 5k 10k 20k THD+N VS. FREQUENCY 100 50 10 THD+N VS. FREQUENCY 100 dx=-4.0228 kHz 4OHM Load , Po=1W 10Hz~22KHz BPF 4OHM Load, Po=1W 10Hz~22KHz BPF 20V 24V 30V 10 1 % 0.1 ±10V ±12V ±15V % 1 0.1 0. 01 0. 01 0. 001 20 50 100 200 500 Hz 1k 2k 5k 10k 20k 0 . 001 20 50 100 200 500 Hz 1k 2k 5k 10k 20k THD+N VS. FREQUENCY 100 THD+N VS. FREQUENCY 100 10 8OHM Load, Po=1W 10Hz~22KHz BPF , BTL ±10V ±12V % 10 8OHM Load , Po=1W 10Hz~22KHz BPF , BTL 20V 24V 1 % 0.1 1 0.1 CHARTS CHARTS ±15V 0. 01 30V 0. 01 0. 001 20 50 100 200 500 Hz 1k 2k 5k 10k 20k 0. 001 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 14 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET GAIN @ 20 – 20KHZ +30 +28 +26 +24 +22 +20 +18 d +16 B +14 r +12 +10 +8 +6 +4 +2 -0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k GAIN @ 20 – 20KHZ + 30 8OHM Load , Vin=200mVrms 10Hz~80KHz BPF , +/-12V WWW . Microsemi . C OM 26dB + 28 + 26 + 24 + 22 4OHM Load , Vin=200mVrms 10Hz~80KHz BPF , +/-12V 26dB Note 1 20dB + 20 + 18 20dB 14dB d + 16 B + 14 r + 12 + 10 +8 +6 +4 +2 -0 20 50 100 200 500 1k Hz 14dB 2k 5k 10k 20k 80k GAIN @ 20 – 20KHZ + 30 + 28 + 26 + 24 + 22 + 20 + 18 d + 16 B + 14 r + 12 + 10 +8 +6 +4 +2 0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k GAIN @ 20 – 20KHZ +30 +27.5 +25 +22.5 8OHM Load , Vin=200mVrms 10Hz~80KHz BPF , 24V 26dB 4OHM Load, Vin=200mVrms 10Hz~80KHz BPF, 24V 26dB 20dB +20 +17.5 20dB 14dB d B r +15 +12.5 +10 14dB Note 2 +7.5 +5 +2.5 +0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k Note 1 – The output LC filter are based on 8OHM design, L=47uH, C=0.68uF, the 4OHM load LC filter design please refer to the application notes. Note 2 – At single supply mode, the output AC coupling capacitor value based on 470uF, for lower cut-off frequency, please refer to the application notes. CHARTS CHARTS Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 15 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET IQQ VS. SUPPLY VOLTAGE 20 18 16 14 12 10 8 6 6 7 8 9 10 11 12 13 14 15 Supply (+/-V) 90 70 50 30 10 -10 Offset -30 -50 -70 -90 -110 -130 -150 6 DC OFFSET @SUPPLY WWW . Microsemi . C OM Iqq (mA) 8 10 12 14 16 Supply Voltage (+/-V) CH1 CH2 IPOS INEG IQQ (POS) VS. SW FREQUENCY 30 IQQ (NEG) VS. SW FREQUENCY 30 25 25 Iqq(mA) 15 +12 V +10 V +8V Iqq(mA) 20 +15 V 20 15 +15V +12V +10 V +8V 10 +6V 5 100 10 150 200 250 300 350 400 450 500 5 100 +6V 150 200 250 300 350 400 450 500 SW Frequency(Khz) SW Frequency(Khz) EFFICIENCY @8OHM LOAD 1200 1000 Current (mA) 800 600 400 200 0 0.1 0.5 1 23 IPOS 4 5 67 INEG 8 9 10 11 12 13 EFFICIENCY Power (W) 100.00% 90.00% 80.00% 70.00% 60.00% 50.00% 40.00% 30.00% 20.00% 10.00% 0.00% EFFICIENCY @4OHM LOAD 1600 1400 1200 Current (mA) 1000 800 40.00% 600 400 200 0 0.1 0.5 1 2 3 IPOS 90.00% 80.00% 70.00% 60.00% 50.00% 30.00% 20.00% 10.00% 0.00% 4 5678 Power (W) INEG 9 10 11 12 13 CHARTS CHARTS EFFICIENY Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 16 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET POWER VS. SUPPLY @8OHM 16 14 12 Power (W) Power (W) POWER VS. SUPPLY @4OHM 25 WWW . Microsemi . C OM 20 10 8 6 4 15 10 5 2 0 6 7 8 9 10 11 12 13 14 15 Supply (+/-V) 1%THD 10%THD 0 6 7 8 9 10 11 12 13 14 15 Supply (+/-V) 1%THD 10%THD POWER VS. SUPPLY @8OHM BTL 50 45 40 35 Power (W) 25 20 15 10 5 0 6 7 8 9 10 11 12 13 14 15 SW Freq (Khz) SW FREQUENCY VS. COSC 500 450 400 350 300 250 200 150 100 100 30 150 200 250 CAP Value (pF) 300 350 400 Supply (+/-V) 1%THD 10%THD NOISE FLOOR @20-20KHZ +0 -20 -40 d -60 B V -80 -100 +/-12V, Gain =20dB, input shorted 10~22KHz BPF , non A-Weighted @8OHM, Noise V N= 400uVrms @4OHM, Noise V N= 290uVrms 8OHM CHARTS -120 - 140 20 50 100 200 500 Hz 1k 2k 5k 4OHM 10k 20k Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 17 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET APPLICATION SCHEMATICS WWW . Microsemi . C OM HIGAIN +5V IN1P 1µF IN1N 1µF 32 IN1P 31 30 29 28 27 26 25 VCOM 4.7µF 35V VCOM HIGAIN IN1M N.C. N.C. VPOS VCOM Sychronize FLAG 1µF 35V 50K 1 2 3 4 5 6 7 OUTREF1 V5V STBY 24 VPOSA STBY VPOS 23 22 21 20 19 18 17 VCOMA SYNC FLAG RILIM VREF VPOS1 OUT1 22µH VNEG LX1725 OUTREF2 VNEG1 VNEG2 OUT2 820nF 820nF 22µH VPOS 150 - 220pF VNEG IN2M 8 VGND 15 N.C. N.C. VNEGA IN2P VNEGA COSC VPOS2 MASTER MUTE 16 9 10 11 12 13 14 IN2P 1µF Master / Slave 1µF MUTE / GAIN VNEGA IN2N VPOS APPLICATIONS APPLICATIONS 0.1µF 50V 470µF 35V Note: This design for Typical 4Ω load, other than 4Ω. Please refer to application notes AN-35 to change L.C. value 0.1µF 50V 470µF 35V VNEG Figure 17 – Application Schematic (Stereo, Split Supply) Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 18 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET APPLICATION SCHEMATICS (CONTINUED) WWW . Microsemi . C OM HIGAIN VCOM +5V IN1P 1µF IN1N 1µF STBY IN1P 32 IN1P 31 30 29 28 27 26 25 VCOM +5V IN1P 4.7µF 35V VCOM IN1N 4.7µF 35V VCOM 32 31 30 29 28 27 26 25 VCOM IN1M OUTREF1 N.C. N.C. HIGAIN V5V STBY 24 N.C. IN1M N.C. HIGAIN OUTREF1 V5V VPOS 24 23 22 21 20 19 18 17 VPOS VCOM 820nF 1 2 3 4 VPOSA STBY 23 22 21 20 19 18 17 VPOS VPOS VCOM Sychronize FLAG 1µF 35V 50K 1 2 3 4 5 6 7 VPOSA VCOMA SYNC FLAG RILIM VREF VPOS1 OUT1 STBY VCOMA SYNC FLAG RILIM VREF VPOS1 OUT1 Sychronize FLAG 50K 1µF 35V 22µH VNEG 5 6 7 LX1725 OUTREF2 VNEG1 VNEG2 OUT2 VPOS2 VNEG LX1725 OUTREF2 VNEG1 VNEG2 OUT2 COSC IN2M N.C. N.C. VNEGA IN2P VNEGA 22µH 820nF 150 - 220pF VNEG 8 VGND 150 - 220pF VNEG IN2M 8 VGND N.C. N.C. VNEGA IN2P VNEGA MASTER MUTE VPOS 9 10 11 12 13 14 15 16 9 10 11 12 13 14 15 16 IN2P Master / Slave MUTE / GAIN MUTE COSC VPOS2 MASTER VPOS IN2P 1µF Master / Slave MUTE / GAIN IN2N IN2N VCOM 1µF VNEGA VPOS VNEGA VCOM Note: This design for Typical 4 Ω load, other than 4 Ω. Please refer to application notes AN-35 to change L.C. value 1.2K VPOS 0.1µF 50V 1000µF 35V 1K VNEG 0.1µF 50V 470µF 35V 0.1µF 50V 470µF 35V VNEG Figure 18 – Application Schematic (Stereo, Single Supply) Figure 19 – Application Schematic (BTL, Split Supply) HIGAIN VCOM +5V IN1P 4.7µF 35V VCOM IN1N 32 IN1P 31 30 29 28 27 26 VCOM 25 N.C. N.C. REFOUT1 HIGAIN IN1M V5V STBY 24 VPOS VCOM Sychronize FLAG 1µF 35V 50K 1 2 3 4 5 6 7 VPOSA STBY VPOS 23 22 21 20 19 18 17 VCOMA SYNC FLAG RILIM VREF VPOS1 OUT1 LX1725 REFOUT2 VNEG1 VNEG2 OUT2 VNEG 150 - 220pF VNEG VNEGA COSC IN2M N.C. N.C. VNEGA IN2P VPOS2 VGND MASTER MUTE 8 VPOS 9 10 11 12 13 14 15 16 IN2P Master / Slave MUTE / GAIN APPLICATIONS APPLICATIONS IN2N VCOM VNEGA 1.2 K VPOS VCOM 1K 0.1µF 50V 1000µF 35V VNEG Figure 20 – Application Schematic (BTL, Single Supply) Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 19 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET PCB DESIGN GUIDELINES WWW . Microsemi . C OM PCB DESIGN GUIDELINES One of the key efforts in implementing the MLP package on a pc board is the design of the land pattern. The MLP has rectangular metallized terminals exposed on the bottom surface of the package body. Electrical and mechanical connection between the component and the pc board is made by screen printing solder paste on the pc board and then reflowing the paste after placement. To guarantee reliable solder joints it is essential to design the land pattern to the MLP terminal pattern, exposed PAD, and Thermal PAD via. There are two basic designs for PCB land pads for the MLP: Copper Defined style (also known as Non Solder Mask Defined (NSMD)) and the Solder Mask Defined style (SMD). The industry has had some debate on the merits of both styles and although Microsemi recommends the Copper Defined style land pad (NSMD), both styles are acceptable for use with the MLP package. NSMD pads are recommended over SMD pads due to the tighter tolerance on copper etching than solder masking. NSDM by definition also provides a larger copper pad area and allows the solder to anchor to the edges of the copper pads thus providing improved solder joint reliability. DESIGN OF PCB LAND PATTERN FOR PACKAGE TERMINALS As a general rule, the PCB lead finger pad (Y) should be designed 0.2-0.5mm longer than the package terminal length for good filleting. The pad length should extend 0.05mm towards the centerline of the package. The pad width (X) should be a minimum 0.05mm wider than the package terminal width (0.025mm per side), refer to figure 21. However, the pad width is reduced to the width of the component terminal for lead pitches below 0.65mm. This is done to minimize the risk of solder bridging. EXPOSED PAD PCB DESIGN The construction of the Exposed Pad MLP enables enhanced thermal and electrical characteristics. In order to take full advantage of this feature the exposed pad must be physically connected to the PCB substrate with solder. The exposed pad is internally connected to the die substrate potential which is VNEG so it is very important that the PCB substrate potential be connected to VNEG as well. The thermal pad (D2th) should be greater than D2 of the MLP whenever possible; however adequate clearance (Cpl > 0.15mm) must be met to prevent solder bridging. If this clearance cannot be met, then D2th should be reduced in area. The formula would be: D2TH >D2 only if D2TH < Gmin - (2 x Cpl). THERMAL PAD VIA DESIGN There are two types of on-board thermal PAD designs: one is using thermal vias to sink the heat to the other layer with metal traces. Based on the Jedec Specification (JESD 51-5) the thermal vias should be designed like Figure 22. Another one is the no via thermal PAD which is using the same side copper PAD as heat sink, this type of thermal PAD is good for a two layer board, since the bottom side is filled with all other kinds of trace also, it’s hard to use the whole plane for the heat sink. But you still can use vias to sink the heat to the bottom layer by the metal traces, then layout a NMSD on which a metal heat sink is put to sink the heat to the air. Part Part Lead Solder PCB Pad PCB Micro Lead Quad Package Land Pattern (X1) Min: 0.025mm Per side for lead pitches > 0.65mm Land Pattern for Four Layer Board with Vias APPLICATIONS APPLICATIONS 0.05mm Y2 0.20mm Y1 Figure 22 – Comparison of land pattern theory Figure 21 – PC Board Land Pattern Geometry for MLP Terminals Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 20 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET PCB DESIGN GUIDELINES (CONTINUED) The LX1725 is supplied in an MLPQ-7mmx7mm, 32 pin package. θJA =29.3°C/W for the package by itself in still air. When running at a continuous 20W output power, the on-chip power dissipation will be 3.5W assuming 85% efficiency. With no reduction in the thermal resistance, the die temperature will rise 103 above ambient. θJC is about 4°C/W. If the exposed pad is properly connected to a heat sink, then the temperature rise will be reduced to around 16°C under these condition. So the non-via type thermal PAD is suggested. ~0.85mm Zmin= D + aaa + 2(0.2) (where pkg body tolerance aaa=0.15) (where 0.2 is outer pad extension) Gmin= D-2(Lmax)-2(0.05) (where 0.05 is inner pad extension) (Lmax=0.50 for this example) D2th max = Gmin-2(CpL) (where CpL=0.2) WWW . Microsemi . C OM ~0.025mm Zmin ~7.45mm D2th ~5.15mm ~0.355mm 0.305mm 1.2mm Gmin ~6.00mm Ø 0.3mm 5.00mm Figure 23 – Recommended Land Pad with Vias for LQ32 (7mm²) APPLICATIONS Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 21 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET PACKAGE DIMENSIONS WWW . Microsemi . C OM LQ 32-Pin Package Description (Micro Lead Quad Package) D b E2 L E D2 e A1 A3 A Dim A A1 A3 b D D2 E E2 e L MILLIMETERS MIN MAX 0.80 1.00 0 0.05 0.25 REF 0.23 0.38 7.00 BSC 5.00 5.25 7.00 BSC 5.00 5.25 0.65 BSC 0.45 0.65 INCHES MIN MAX 0.031 0.039 0 0.002 0.010 0.009 0.015 0.276 BSC 0.197 0.207 0.276 BSC 0.197 0.207 0.026 0.018 0.026 Note: Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006”) on any side. Lead dimension shall not include solder coverage. MECHANICALS MECHANICALS Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 22 LX1725 TM ® 15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL P RODUCTION D ATA S HEET NOTES WWW . Microsemi . C OM NOTES NOTES PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. Copyright © 2004 Rev. 1.2, 2005-12-06 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 23