M37702M2LXXXHP

MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER DESCRIPTION The M37702M2LXXXGP is a single-chip 16-bit microcomputer designed with high-performance CMOS silicon gate technology. This is housed in a small 80-pin plastic molded QFP. This singlechip microcomputer has a large 16 M bytes address space, three instruction queue buffers, and two data buffers for high-speed instruction execution. The CPU is a 16-bit parallel processor that can also be switched to perform 8-bit parallel processing. This microcomputer is suitable for communication, office, business and industrial equipment controller that require high-speed processing of large data. The strong points of the M37702M2LXXXGP, M37702S1LGP, M37702M2LXXXHP and M37702S1LHP are the low supply voltage and small package. The differences between M37702M2LXXXGP, M37702S1LGP, M37702M2LXXXHP and M37702S1LHP are the ROM size and the package as shown below. Therefore, the following descriptions will be for the M37702M2LXXXGP unless otherwise noted. Type name ROM size Package M37702M2LXXXGP 16 K bytes 80-pin plastic molded QFP (80P6S-A) M37702S1LGP External 80-pin plastic molded QFP (80P6S-A) M37702M2LXXXHP 16 K bytes 80-pin plastic molded fine-pitch QFP (80P6D-A) M37702S1LHP External 80-pin plastic molded fine-pitch QFP (80P6D-A) APPLICATION Control devices for communication equipment such as cellular radio telephones, cordless telephones, and radio communications Control devices for office equipment such as copiers, printers, typewriters, facsimiles, word processors, and personal computers Control devices for industrial equipments such as ME, NC, and measuring instruments NOTE Refer to “Chapter 5 PRECAUTIONS” when using this microcomputer. FEATURES • Number of basic instructions ..................................................103 • Memory size ROM ................................................ 16 K bytes RAM ................................................. 512 bytes • Instruction execution time The fastest instruction at 8 MHz frequency ....................... 500 ns • Single low supply voltage ........................................... 2.7 – 5.5 V • Low power dissipation (At 3 V supply voltage, 8 MHz frequency) .............. 12 mW (Typ.) (At 5 V supply voltage, 8 MHz frequency) .............. 30 mW (Typ.) • Wide operating temperature range ............................. –40 – 80°C • Interrupts ............................................................ 19 types 7 levels • Multiple function 16-bit timer ................................................ 5 + 3 • UART (may also be synchronous) .............................................. 2 • 8-bit A-D converter ............................................. 8-channel inputs • 12-bit watchdog timer • Programmable input/output (ports P0, P1, P2, P3, P4, P5, P6, P7, P8) .............................. 68 • Small package M37702M2LXXXGP, M37702S1LGP .................................................. 80-pin QFP (0.65 mm lead pitch) M37702M2LXXXHP, M37702S1LHP .................................... 80-pin fine-pitch QFP (0.5 mm lead pitch) MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER PIN CONFIGURATION (TOP VIEW) P86/RXD1 P87/TXD1 P00/A0 P01/A1 P02/A2 P03/A3 P04/A4 P05/A5 P06/A6 P07/A7 P10/A8/D8 P11/A9/D9 P12/A10/D10 P13/A11/D11 P14/A12/D12 P15/A13/D13 P16/A14/D14 P17/A15/D15 P20/A16/D0 P21/A17/D1 60 58 55 49 56 53 59 57 54 45 44 43 52 50 46 42 48 P85/CLK1 P84/CTS1/RTS1 P83/TXD0 P82/RXD0 P81/CLK0 P80/CTS0/RTS0 VCC AVCC VREF AVSS VSS P77/AN7/ADTRG P76/AN6 P75/AN5 P74/AN4 P73/AN3 P72/AN2 P71/AN1 P70/AN0 P67/TB2IN 51 47 41 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 40 39 38 37 36 35 M37702M2LXXXGP or M37702S1LGP or M37702M2LXXXHP or M37702S1LHP 34 33 32 31 30 29 28 27 26 25 24 23 22 21 P22/A18/D2 P23/A19/D3 P24/A20/D4 P25/A21/D5 P26/A22/D6 P27/A23/D7 P30/R/W P31/BHE P32/ALE P33/HLDA Vss E XOUT XIN RESET CNVSS BYTE P40/HOLD P41/RDY P42/φ1 11 12 15 16 14 13 17 18 Outline M37702M2LXXXGP, M37702S1LGP••••••80P6S-A M37702M2LXXXHP, M37702S1LHP••••••80P6D-A V : Used in the evaluation chip mode only 2 P66/TB1IN P65/TB0IN P64/INT2 P63/INT1 P62/INT0 P61/TA4IN P60/TA4OUT P57/TA3IN P56/TA3OUT P55/TA2IN P54/TA2OUT P53/TA1IN P52/TA1OUT P51/TA0IN P50/TA0OUT P47/DBCV P46/VPAV P45/VDAV P44/QCLV P43/MXV 10 19 1 4 2 5 6 7 8 9 20 3 M37702M2LXXXGP BLOCK DIAGRAM Reset input RESET 26 30 71 25 70 24 68 69 67 Enable output Clock input Clock output XOUT XIN E (5V) VCC (5V) AVCC (0V) VSS (0V) CNVss (0V) AVSS Reference voltage input VREF Bus width selection input BYTE 27 28 29 Clock Generating Circuit Instruction Register(8) Incrementer(24) Stack Pointer S(16) Program Address Register PA(24) Processor Status Register PS(11) Program Counter PC(16) Direct Page Register DPR(16) Instruction Queue Buffer Q2(8) Data Address Register DA(24) Program Bank Register PG(8) Instruction Queue Buffer Q1(8) Instruction Queue Buffer Q0(8) Timer TA4(16) Watchdog Timer Timer TB2(16) Timer TB1(16) Timer TB0(16) UART0(9) UART1(9) A-D Converter(8) Timer TA3(16) Address Bus ROM RAM Timer TA2(16) Data Bus(Odd) 16K Bytes 512 Bytes Timer TA1(16) Data Bus(Even) Timer TA0(16) Index Register X(16) Index Register Y(16) Data Bank Register DT(8) Data Buffer DBH(8) Incrementer/Decrementer(24) Input Buffer Register IB(16) Accumulator A(16) Accumulator B(16) Data Buffer DBL(8) Arithmetic Logic Unit(16) P8(8) P6(8) P5(8) P7(8) P4(8) P3(4) P2(8) P1(8) P0(8) 59 60 61 62 63 64 65 66 72 73 74 75 76 77 78 79 80 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Input/Output port P8 Input/Output port P7 Input/Output port P6 Input/Output port P5 Input/Output port P4 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP Input/Output port P3 Input/Output port P2 Input/Output port P1 Input/Output port P0 3 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FUNCTIONS OF M37702M2LXXXGP Parameter Number of basic instructions Instruction execution time Memory size Input/Output ports Multi-function timers Serial I/O A-D converter Watchdog timer Interrupts Clock generating circuit Supply voltage Power dissipation Input/Output characteristic Memory expansion Operating temperature range Device structure Package M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP Input/Output voltage Output current ROM RAM P0 – P2, P4 – P8 P3 TA0, TA1, TA2, TA3, TA4 TB0, TB1, TB2 103 500 ns (the fastest instruction at external clock 8 MHz frequency) 16 K bytes 512 bytes 8-bit ! 8 4-bit ! 1 16-bit ! 5 16-bit ! 3 (UART or clock synchronous serial I/O) ! 2 8-bit ! 1 (8 channels) 12-bit ! 1 3 external types, 16 internal types (Each interrupt can be set the priority levels to 0 – 7.) Built-in (externally connected to a ceramic resonator or quartz crystal resonator) 2.7 – 5.5 V 12 mW (at 3 V supply voltage, external clock 8 MHz frequency) 30 mW (at 5 V supply voltage, external clock 8 MHz frequency) 5V 5 mA Maximum 16 M bytes –40 – 85°C CMOS high-performance silicon gate process 80-pin plastic molded QFP (80P6S-A: 0.65 mm lead pitch) 80-pin plastic molded fine-pitch QFP (80P6D-A: 0.5 mm lead pitch) Functions 4 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER PIN DESCRIPTION Pin VCC, VSS CNVSS ______ Name Power supply CNVSS input Reset input Clock input Clock output Enable output Bus width selection input Analog supply input Reference voltage input I/O port P0 Input/Output Functions Supply 2.7 – 5.5 V to VCC and 0 V to VSS. Input Input Input Output Output Input This pin controls the processor mode. Connect to VSS for single-chip mode, and to VCC for external ROM types. To enter the reset state, this pin must be kept at a “L” condition which should be maintained for the required time. These are I/O pins of internal clock generating circuit. Connect a ceramic or quartz crystal resonator between XIN and XOUT. When an external clock is used, the clock source should be connected to the XIN pin and the XOUT pin should be left open. Data or instruction read and data write are performed when output from this pin is “L”. In memory expansion mode or microprocessor mode, this pin determines whether the external data bus is 8-bit width or 16-bit width. The width is 16 bits when “L” signal inputs and 8 bits when “H” signal inputs. Power supply for the A-D converter. Connect AVCC t o V CC a nd AV SS t o V SS externally. RESET XIN XOUT _ E BYTE AVCC, AVSS VREF P00 – P07 Input I/O This is reference voltage input pin for the A-D converter. In single-chip mode, port P0 becomes an 8-bit I/O port. An I/O direction register is available so that each pin can be programmed for input or output. These ports are in input mode when reset. Address (A7 – A0) is output in memory expansion mode or microprocessor mode. In single-chip mode, these pins have the same functions as port P0. When the BYTE pin is set to “L” in memory expansion mode or microprocessor mode and external data bus is 16-bit width, high-order data (D15 – D8) is input or output _ _ when E output is “L” and an address (A15 – A8) is output when E output is “H”. If the BYTE pin is “H” that is an external data bus is 8-bit width, only address (A15 – A8) is output. In single-chip mode, these pins have the same functions as port P0. In memory expansion mode or microprocessor mode low-order data (D7 – D0) is _ input or _ output when E output is “L” and an address (A23 – A16) is output when E output is “H”. In single-chip mode, these pins have the same functions as port P0. In memory __ ____ _____ expansion mode or microprocessor mode, R/W, BHE, ALE and HLDA signals are output. In single-chip mode, these pins have the same functions as port_____ memory P0. In ____ expansion mode or microprocessor mode, P40 and P41 become HOLD and RDY input pin respectively. Functions of other pins are the same as in single-chip mode. In single-chip mode or memory expansion mode, port P4 2 can be programmed for φ 1 output pin divided the clock to XIN pin by 2. In microprocessor mode. P42 always has the function as φ1 output pin. In addition to having the same functions as port P0 in single-chip mode, these pins also function as I/O pins for timer A0, timer A1, timer A2 and timer A3. In addition to having the same functions as port P0 in single-chip mode, these ____ ____ pins also function as I/O pins for timer A4, external interrupt input INT0, INT1 and INT2 pins, and input pins for timer B0, timer B1 and timer B2. P10 – P17 I/O port P1 I/O P20 – P27 I/O port P2 I/O P30 – P33 I/O port P3 I/O P40 – P47 I/O port P4 I/O P50 – P57 P60 – P67 I/O port P5 I/O port P6 I/O I/O ____ P70 – P77 I/O port P7 I/O In addition to having the same functions as port P0 in single-chip mode, these pins also function as analog input AN0 – AN7 input pins. P7 7 also has an A-D conversion trigger input function. In addition to having the same functions as port P0 in single-chip mode, these ____ ____ pins also function as RXD, TXD, CLK, CTS/RTS pins for UART 0 and UART 1. P80 – P87 I/O port P8 I/O 5 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER BASIC FUNCTION BLOCKS The M37702M2LXXXGP has the same functions as the M37702M2BXXXFP except for the reset circuit. Refer to the section on the M37702M2BXXXFP. Figure 1 shows the status of the internal registers when a reset occurs. Figure 2 shows an example of a reset circuit. The reset input voltage must be held 0.55 V or lower when the power voltage reaches 2.7 V. RESET CIRCUIT ______ Reset occurs when the RESET pin is returned to “H” level after holding it at “L” level when the power voltage is at 2.7 – 5.5 V. Program execution starts at the address formed by setting the address pins A23 – A16 to 0016, A15 – A8 to the contents of address FFFF16, and A7 – A0 to the contents of address FFFE16. Address (1) Port P0 data direction register (2) Port P1 data direction register (3) Port P2 data direction register (4) Port P3 data direction register (5) Port P4 data direction register (6) Port P5 data direction register (7) Port P6 data direction register (8) Port P7 data direction register (9) Port P8 data direction register (10) A-D control register (11) A-D sweep pin selection register (12) UART 0 transmit/receive mode register (13) UART 1 transmit/receive mode register (14) UART 0 transmit/receive control register 0 (15) UART 1 transmit/receive control register 0 (16) UART 0 transmit/receive control register 1 (17) UART 1 transmit/receive control register 1 (18) Count start flag (19) One- shot start flag (20) Up-down flag (21) Timer A0 mode register (22) Timer A1 mode register (23) Timer A2 mode register (24) Timer A3 mode register (25) Timer A4 mode register (26) Timer B0 mode register (27) Timer B1 mode register (28) Timer B2 mode register Address (0416)••• (0516)••• (0816)••• (0916)••• (0C16)••• (0D16)••• (1016)••• (1116)••• (1416)••• 0016 0016 0016 0000 0016 0016 0016 0016 0016 (29) Processor mode register (30) Watchdog timer (5E16)••• (6016)••• 0016 FFF16 0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 000000 000000 000000 (31) Watchdog timer frequency selection (6116)••• flag (32) A-D conversion interrupt control register (7016)••• (33) UART 0 transmission interrupt control (7116)••• register (34) UART 0 receive interrupt control register (7216)••• (35) UART 1 transmission interrupt control (7316)••• register (36) UART 1 receive interrupt control register (7416)••• (37) Timer A0 interrupt control register (38) Timer A1 interrupt control register (39) Timer A2 interrupt control register (40) Timer A3 interrupt control register (41) Timer A4 interrupt control register (42) Timer B0 interrupt control register (43) Timer B1 interrupt control register (44) Timer B2 interrupt control register (45) INT0 interrupt control register (46) INT1 interrupt control register (47) INT2 interrupt control register (48) Processor status register PS (49) Program bank register PG (50) Program counter PC H (51) Program counter PC L (52) Direct page register DPR (53) Data bank register DT (7516)••• (7616)••• (7716)••• (7816)••• (7916)••• (7A16)••• (7B16)••• (7C16)••• (7D16)••• (7E16)••• (7F16)••• (1E16)••• 0 0 0 0 0 ? ? ? (1F16)••• (3016)••• (3816)••• (3416)••• (3C16)••• 0016 0016 1000 1000 11 (3516)••• 0 0 0 0 0 0 1 0 (3D16)••• 0 0 0 0 0 0 1 0 (4016)••• (4216)••• (4416)••• (5616)••• (5716)••• (5816)••• (5916)••• (5A16)••• (5B16)••• 0 0 1 (5C16)••• 0 0 1 (5D16)••• 0 0 1 0016 00000 0016 0016 0016 0016 0016 0016 0000 0000 0000 000??0001?? 0016 Content of FFFF 16 Content of FFFE 16 000016 0016 Contents of other registers and RAM are not initialized and should be initialized by software. Fig. 1 Microcomputer internal status during reset 6 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER ADDRESSING MODES Power on M37702M2LXXXGP The M37702M2LXXXGP has 28 powerful addressing modes. Refer to the 7700 Family addressing mode description for the details of each addressing mode. VCC RESET 2.7V VCC 67 0V RESET MACHINE INSTRUCTION LIST The M37702M2LXXXGP has 103 machine instructions. Refer to the 7700 Family machine instruction list for details. 0.55V 26 0V DATA REQUIRED FOR MASK ORDERING Fig. 2 Example of a reset circuit (perform careful evaluation at the system design level before using) Please send the following data for mask orders. M37702M2LXXXGP; (1) M37702M2LXXXGP mask ROM order confirmation form (2) 80P6S mark specification form (3) ROM data (EPROM 3 sets) M37702M2LXXXHP; (1) M37702M2LXXXHP mask ROM order confirmation form (2) 80P6D mark specification form (3) ROM data (EPROM 3 sets) MEMORY The memory map is shown in Figure 3. 00000016 Bank 0 16 00FFFF16 01000016 00000016 00007F 16 00008016 Internal RAM 512 bytes 00000016 Peripheral devices control registers 00007F 16 00027F 16 Bank 1 16 00FFD6 16 01FFFF16 •••••••••• Interrupt vector table A-D conversion UART1 transmission UART1 receive UART0 transmission UART0 receive Timer B2 Timer B1 Timer B0 Timer A4 Timer A3 Timer A2 FE000016 Bank FE 16 FEFFFF 16 FF000016 Bank FF 16 FFFFFF 16 00C00016 Timer A1 Timer A0 INT2 INT1 INT0 Internal ROM 16K bytes Watchdog timer 00FFD616 DBC BRK instruction Zero divide 00FFFF 16 00FFFE16 RESET Fig. 3 Memory map 7 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER ABSOLUTE MAXIMUM RATINGS Symbol VCC AVCC VI VI Supply voltage Analog supply voltage ______ Parameter Conditions Ratings –0.3 to 7 –0.3 to 7 –0.3 to 12 –0.3 to VCC+0.3 Unit V V V V Input voltage Input voltage RESET, CNVSS, BYTE P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87, VREF, XIN VO Output voltage P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, _ P80–P87, XOUT, E Power dissipation Operating temperature Storage temperature Ta = 25 °C –0.3 to VCC+0.3 V 300 (Note 1) –40 to 85 –65 to 150 mW °C °C Pd Topr Tstg Note 1. In the case of M37702M2LXXXHP and M37702S1LHP, the rating of power dissipation is 200 mW. RECOMMENDED OPERATING CONDITIONS Symbol VCC AVCC VSS AVSS VIH Supply voltage Analog supply voltage Supply voltage Analog supply voltage High-level input voltage Parameter (VCC = 2.7 to 5.5 V, Ta = –40 to 85 °C, unless otherwise noted) Limits Min. 2.7 VCC 0 0 Typ. Max. 5.5 Unit V V V V VCC V 0.8VCC 0.5VCC VCC VCC V 0 0.2VCC V 0 0 0.2VCC 0.16VCC V –10 mA –5 mA 10 mA 5 mA 8 MHz V V P00–P07, P30–P33, P40–P47, P50–P57, ______ P60–P67, P70–P77, P80–P87, XIN, RESET, CNVSS, BYTE P10–P17, P20–P27 (in single-chip mode) P10–P17, P20–P27 (in memory expansion mode and microprocessor mode) P00–P07, P30–P33, P40–P47, P50–P57, ______ P60–P67, P70–P77, P80–P87, XIN, RESET, CNVSS, BYTE P10–P17, P20–P27 (in single-chip mode) P10–P17, P20–P27 (in memory expansion mode and microprocessor mode) P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87 0.8VCC VIH VIH High-level input voltage High-level input voltage VIL Low-level input voltage VIL VIL Low-level input voltage Low-level input voltage IOH(peak) High-level peak output current IOH(avg) High-level average output current P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87 Low-level peak output current P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87 P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87 IOL(peak) IOL(avg) Low-level average output current f(XIN) External clock frequency input Note 2. Average output current is the average value of a 100 ms interval. 3. The sum of IOL(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOH(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 80 mA or less, and the sum of IOH(peak) for ports P4, P5, P6, and P7 must be 80 mA or less. 8 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER ELECTRICAL CHARACTERISTICS (VCC = 5 V, VSS = 0 V, Ta = 25 °C, f(XIN) = 8 MHz, unless otherwise noted) Symbol VOH Parameter High-level output voltage P00–P07, P10–P17, P20–P27, P30, P31, P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87 High-level output voltage P00–P07, P10–P17, P20–P27, P30, P31, P33 High-level output voltage P32 Test conditions VCC = 5 V, IOH = –10 mA VCC = 3 V, IOH = –1 mA VCC = 5 V, IOH = –400 µA VCC = 5 V, IOH = VCC = 5 V, IOH = VCC = 3 V, IOH = VCC = 5 V, IOH = VCC = 5 V, IOH = VCC = 3 V, IOH = –10 mA –400 µA –1 mA –10 mA –400 µA –1 mA Limits Min. 3 2.5 4.7 3.1 4.8 2.6 3.4 4.8 2.6 2 0.5 0.45 1.9 0.43 0.4 1.6 0.4 0.4 0.4 0.1 0.2 0.1 0.1 0.06 1 0.7 0.5 0.4 0.3 0.2 5 4 –5 –4 2 6 4 12 8 1 20 V mA µA V V V V Typ. Max. Unit V VOH VOH V _ VOH High-level output voltage E V VOL Low-level output voltage P00–P07, P10–P17, P20–P27, VCC = 5 V, IOL = 10 mA P30, P31, P33, P40–P47, P50–P57, VCC = 3 V, IOL = 1 mA P60–P67, P70–P77, P80–P87 Low-level output voltage P00–P07, P10–P17, P20–P27, VCC = 5 V, IOL = 2 mA P30, P31, P33 Low-level output voltage P32 VCC = 5 V, VCC = 5 V, VCC = 3 V, VCC = 5 V, IOL = 10 mA IOL = 2 mA IOL = 1 mA VOL VOL V _ VOL Low-level output voltage E _____ ____ VT+ – VT– VT+ – VT– VT+ – VT– IIH Hysteresis ____ ____ _____ –TA4IN____ IN–TB2____ HOLD, RDY, TA0IN ____ , TB0 ____ IN, INT0–INT2, ADTRG, CTS0, CTS1, CLK0, CLK1 VCC = 3 V ______ VCC = 5 V Hysteresis RESET VCC = 3 V VCC = 5 V Hysteresis XIN VCC = 3 V High-level input current P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87, ______ XIN, RESET, CNVSS, BYTE P00–P07, P10–P17, P20–P27, P30–P33, P40–P47, P50–P57, P60–P67, P70–P77, P80–P87, ______ XIN, RESET, CNVSS, BYTE IOL = 10 mA VCC = 5 V, IOL = 2 mA VCC = 3 V, IOL = 1 mA VCC = 5 V V V V VCC = 5 V, VI = 5 V VCC = 3 V, VI = 3 V VCC = 5 V, VI = 0 V VCC = 3 V, VI = 0 V When clock is stopped. In singleVCC = 5 V f(XIN) = 8 MHz, chip mode square waveform VCC = 3 V output only Ta = 25 °C when clock pin is open is stopped. and other pins are VSS Ta = 85 °C when clock during reset. is stopped. µA IIL Low-level input current VRAM ICC RAM hold voltage Power supply current µA A-D CONVERTER CHARACTERISTICS (VCC = 5 V, VSS = 0 V, Ta = 25 °C, f(XIN) = 8 MHz, unless otherwise noted) Symbol — — RLADDER tCONV VREF VIA Resolution Absolute accuracy Ladder resistance Conversion time Reference voltage Analog input voltage Parameter Test conditions VREF = VCC VREF = VCC VREF = VCC 2 28.5 2.7 0 VCC VREF Limits Min. Typ. Max. 8 ±3 10 Unit Bits LSB kΩ µs V V 9 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER TIMING REQUIREMENTS External clock input Symbol tC tW(H) tW(L) tr tf (VCC = 2.7 to 5.5 V, VSS = 0 V, Ta = 25 °C, f(XIN) = 8 MHz, unless otherwise noted) Parameter External clock input cycle time External clock input high-level pulse width External clock input low-level pulse width External clock rise time External clock fall time Limits Min. 125 50 50 20 20 Max. Unit ns ns ns ns ns Single-chip mode Symbol tsu(P0D–E) tsu(P1D–E) tsu(P2D–E) tsu(P3D–E) tsu(P4D–E) tsu(P5D–E) tsu(P6D–E) tsu(P7D–E) tsu(P8D–E) th(E–P0D) th(E–P1D) th(E–P2D) th(E–P3D) th(E–P4D) th(E–P5D) th(E–P6D) th(E–P7D) th(E–P8D) Port P0 input setup time Port P1 input setup time Port P2 input setup time Port P3 input setup time Port P4 input setup time Port P5 input setup time Port P6 input setup time Port P7 input setup time Port P8 input setup time Port P0 input hold time Port P1 input hold time Port P2 input hold time Port P3 input hold time Port P4 input hold time Port P5 input hold time Port P6 input hold time Port P7 input hold time Port P8 input hold time Parameter Limits Min. 300 300 300 300 300 300 300 300 300 0 0 0 0 0 0 0 0 0 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Memory expansion mode and microprocessor mode Symbol tsu(P1D–E) tsu(P2D–E) tsu(RDY–φ1) tsu(HOLD–φ1) th(E–P1D) th(E–P2D) th(φ1–RDY) th(φ1–HOLD) Port P1 input setup time Port P2 input setup time ____ Parameter Limits Min. 80 80 90 90 0 0 0 0 Max. Unit ns ns ns ns ns ns ns ns RDY input setup time _____ HOLD input setup time Port P1 input hold time Port P2 input hold time ____ RDY input hold time _____ HOLD input hold time 10 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Timer A input (Count input in event counter mode) Symbol tC(TA) tW(TAH) tW(TAL) TAiIN input cycle time TAiIN input high-level pulse width TAiIN input low-level pulse width Parameter Limits Min. 250 125 125 Max. Unit ns ns ns Timer A input (Gating input in timer mode) Symbol tC(TA) tW(TAH) tW(TAL) TAiIN input cycle time TAiIN input high-level pulse width TAiIN input low-level pulse width Parameter Limits Min. 1000 500 500 Max. Unit ns ns ns Timer A input (External trigger input in one-shot pulse mode) Symbol tC(TA) tW(TAH) tW(TAL) TAiIN input cycle time TAiIN input high-level pulse width TAiIN input low-level pulse width Parameter Limits Min. 500 250 250 Max. Unit ns ns ns Timer A input (External trigger input in pulse width modulation mode) Symbol tW(TAH) tW(TAL) TAiIN input high-level pulse width TAiIN input low-level pulse width Parameter Limits Min. 250 250 Max. Unit ns ns Timer A input (Up-down input in event counter mode) Symbol tC(UP) tW(UPH) tW(UPL) tsu(UP-TIN) th(TIN-UP) TAiOUT input cycle time TAiOUT input high-level pulse width TAiOUT input low-level pulse width TAiOUT input setup time TAiOUT input hold time Parameter Limits Min. 5000 2500 2500 1000 1000 Max. Unit ns ns ns ns ns 11 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Timer B input (Count input in event counter mode) Symbol tC(TB) tW(TBH) tW(TBL) tC(TB) tW(TBH) tW(TBL) TBiIN input cycle time (one edge count) TBiIN input high-level pulse width (one edge count) TBiIN input low-level pulse width (one edge count) TBiIN input cycle time (both edges count) TBiIN input high-level pulse width (both edges count) TBiIN input low-level pulse width (both edges count) Parameter Limits Min. 250 125 125 500 250 250 Max. Unit ns ns ns ns ns ns Timer B input (Pulse period measurement mode) Symbol tC(TB) tW(TBH) tW(TBL) TBiIN input cycle time TBiIN input high-level pulse width TBiIN input low-level pulse width Parameter Limits Min. 1000 500 500 Max. Unit ns ns ns Timer B input (Pulse width measurement mode) Symbol tC(TB) tW(TBH) tW(TBL) TBiIN input cycle time TBiIN input high-level pulse width TBiIN input low-level pulse width Parameter Limits Min. 1000 500 500 Max. Unit ns ns ns A-D trigger input Symbol ______ Parameter ADTRG input cycle time (minimum allowable trigger) _____ Limits Min. 2000 250 Max. Unit ns ns tC(AD) tW(ADL) ADTRG input low-level pulse width Serial I/O Symbol tC(CK) tW(CKH) tW(CKL) td(C–Q) th(C–Q) tsu(D–C) th(C–D) CLKi input cycle time CLKi input high-level pulse width CLKi input low-level pulse width TxDi output delay time TxDi hold time RxDi input setup time RxDi input hold time _____ Parameter Limits Min. 500 250 250 170 0 80 100 Max. Unit ns ns ns ns ns ns ns External interrupt INTi input Symbol ____ Parameter INTi input high-level pulse width ____ Limits Min. 250 250 Max. Unit ns ns tW(INH) tW(INL) INTi input low-level pulse width 12 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER SWITCHING CHARACTERISTICS Single-chip mode Symbol td(E–P0Q) td(E–P1Q) td(E–P2Q) td(E–P3Q) td(E–P4Q) td(E–P5Q) td(E–P6Q) td(E–P7Q) td(E–P8Q) (VCC = 2.7 to 5.5 V, VSS = 0 V, Ta = 25 °C, f(XIN) = 8 MHz, unless otherwise noted) Parameter Port P0 data output delay time Port P1 data output delay time Port P2 data output delay time Port P3 data output delay time Port P4 data output delay time Port P5 data output delay time Port P6 data output delay time Port P7 data output delay time Port P8 data output delay time Test conditions Limits Min. Max. 300 300 300 300 Unit ns ns ns ns ns ns ns ns ns Fig. 4 300 300 300 300 300 Memory expansion mode and microprocessor mode (when wait bit = “0”, and external memory area is accessed) Symbol td(P0A–E) td(E–P1Q) tPXZ(E–P1Z) td(P1A–E) td(P1A–ALE) td(E–P2Q) tPXZ(E–P2Z) td(P2A–E) td(P2A–ALE) td(φ1–HLDA) td(ALE–E) tW(ALE) td(BHE–E) td(R/W–E) td(E–φ1) th(E–P0A) th(ALE–P1A) th(E–P1Q) tPZX(E–P1Z) th(E–P1A) th(ALE–P2A) th(E–P2Q) tPZX(E–P2Z) th(E–BHE) th(E–R/W) tW(EL) Parameter Port P0 address output delay time Port P1 data output delay time (BYTE = “L”) Port P1 floating start delay time (BYTE = “L”) Port P1 address output delay time Port P1 address output delay time Port P2 data output delay time Port P2 floating start delay time Port P2 address output delay time Port P2 address output delay time _____ Test conditions Limits Min. 50 130 10 50 40 130 10 50 40 120 4 60 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns HLDA output delay time ALE output delay time ALE pulse width ____ BHE output delay time __ Fig. 4 50 50 0 50 9 50 95 50 9 50 95 18 18 460 40 R/W output delay time φ1 output delay time Port P0 address hold time Port P1 address hold time (BYTE = “L”) Port P1 data hold time (BYTE = “L”) Port P1 floating release delay time (BYTE = “L”) Port P1 address hold time (BYTE = “H”) Port P2 address hold time Port P2 data hold time Port P2 floating release delay time ____ ns ns ns ns ns ns ns ns ns ns ns ns BHE hold time __ R/W hold time _ E pulse width 13 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode (when wait bit = “1”) Symbol td(P0A–E) td(E–P1Q) tPXZ(E–P1Z) td(P1A–E) td(P1A–ALE) td(E–P2Q) tPXZ(E–P2Z) td(P2A–E) td(P2A–ALE) td(φ1–HLDA) td(ALE–E) tW(ALE) td(BHE–E) td(R/W–E) td(E–φ1) th(E–P0A) th(ALE–P1A) th(E–P1Q) tPZX(E–P1Z) th(E–P1A) th(ALE–P2A) th(E–P2Q) tPZX(E–P2Z) th(E–BHE) th(E–R/W) tW(EL) Parameter Port P0 address output delay time Port P1 data output delay time (BYTE = “L”) Port P1 floating start delay time (BYTE = “L”) Port P1 address output delay time Port P1 address output delay time Port P2 data output delay time Port P2 floating start delay time Port P2 address output delay time Port P2 address output delay time _____ Test conditions Limits Min. 50 130 10 50 40 130 10 50 40 120 4 60 Max. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns HLDA output delay time ALE output delay time ALE pulse width ____ BHE output delay time __ Fig. 4 50 50 0 50 9 50 95 50 9 50 95 18 18 210 40 R/W output delay time φ1 output delay time Port P0 address hold time Port P1 address hold time (BYTE = “L”) Port P1 data hold time (BYTE = “L”) Port P1 floating release delay time (BYTE = “L”) Port P1 address hold time (BYTE = “H”) Port P2 address hold time Port P2 data hold time Port P2 floating release delay time ____ ns ns ns ns ns ns ns ns ns ns ns ns BHE hold time __ R/W hold time _ E pulse width P0 P1 P2 P3 P4 P5 P6 P7 P8 φ1 E 100 pF Fig. 4 Testing circuit for ports P0–P8, φ1 14 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER TIMING DIAGRAM Single-chip mode f(XIN) tr tf tc tw(H) tw(L) E td(E–P0Q) Port P0 output tsu(P0D–E) Port P0 input th(E–P0D) td(E–P1Q) Port P1 output tsu(P1D–E) Port P1 input th(E–P1D) td(E–P2Q) Port P2 output tsu(P2D–E) Port P2 input th(E–P2D) td(E–P3Q) Port P3 output tsu(P3D–E) Port P3 input th(E–P3D) td(E–P4Q) Port P4 output tsu(P4D–E) Port P4 input th(E–P4D) td(E–P5Q) Port P5 output tsu(P5D–E) Port P5 input th(E–P5D) td(E–P6Q) Port P6 output tsu(P6D–E) Port P6 input th(E–P6D) td(E–P7Q) Port P7 output tsu(P7D–E) Port P7 input th(E–P7D) td(E–P8Q) Port P8 output tsu(P8D–E) Port P8 input th(E–P8D) 15 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER tc(TA) tw(TAH) TAiIN input tw(TAL) tc(UP) tw(UPH) TAiOUT input tw(UPL) In Event counter mode TAiOUT input (Up-down input) TAiIN input (when count by falling) TAiIN input (when count by rising) th(TIN –UP) tsu(UP–TIN) tc(TB) tw(TBH) TBiIN input tw(TBL) tc(AD) tw(ADL) ADTRG input tc(CK) tw(CKH) CLKi tw(CKL) th(C–Q) TxDi td(C–Q) RxDi tsu(D–C) th(C–D) tw(INL) INTi input tw(INH) 16 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode (When wait bit = “1”) φ1 E RDY input tsu(RDY–φ1) th(φ1–RDY) ( When wait bit = “0”) φ1 E RDY input tsu(RDY–φ1) th(φ1–RDY) (When wait bit = “1” or “0” in common) φ1 tsu(HOLD–φ1) HOLD input th(φ1–HOLD) td(φ1–HLDA) HLDA output td(φ1–HLDA) Test conditions • VCC = 2.7 to 5.5 V • Input timing voltage : V IL = 0.2 VCC, VIH = 0.8 V CC • Output timing voltage : V OL = 0.8 V, VOH = 2.0 V 17 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode (When wait bit = “1”) tw(L) f(XIN) tw(H) tf tr tc φ1 td(E- φ1) tw(EL) E th(E-P0A) Port P0 output (A0 to A7) th(ALE-P1A) Port P1 output (A8 to A15/D8 to D15) (BYTE = “L”) Address td(P1A-ALE) Address th(E-P1Q) Data td(E-P1Q) th(E-P1A) Port P1 output (A8 to A15) (BYTE = “H”) Address td(P1A-E) Address tsu(P1D-E) Port P1 input th(ALE-P2A) Port P2 output (A16 to A23/D0 to D7) Address td(P2A-ALE) Port P2 input Data td(E-P2Q) th(E-P2Q) Address td(P2A-E) tsu(P2D-E) th(E-P2D) tpxz(E-P2Z) tpzx(E-P2Z) Address th(E-P1D) Address td(P0A-E) td(E- φ1) Address tpxz(E-P1Z) tpzx(E-P1Z) Address tw(ALE) Port P32 output (ALE) td(BHE-E) Port P31 output (BHE) td(R/W-E) Port P30 output (R/W) Test conditions • VCC = 2.7 to 5.5 V • Output timing voltage : VOL = 0.8 V, VOH = 2.0 V • Ports P1, P2 input : VIL = 0.16 VCC, VIH = 0.5 VCC th(E-R/W) th(E-BHE) td(ALE-E) 18 MITSUBISHI MICROCOMPUTERS M37702M2LXXXGP, M37702S1LGP M37702M2LXXXHP, M37702S1LHP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode (When wait bit = “0”, and external memory area is accessed) tc f(XIN) φ1 td(E- φ1) tw(EL) E th(E-P0A) Port P0 output (A0 to A7) th(ALE-P1A) Port P1 output (A8 to A15/D8 to D15) (BYTE = “L”) Address Address th(E-P1Q) Data td(E-P1Q) td(P1A-ALE) th(E-P1A) Port P1 output (A8 to A15) (BYTE = “H”) Address td(P1A-E) Address tsu(P1D-E) Port P1 input th(ALE-P2A) Port P2 output (A16 to A23/D0 to D7) Address th(E-P2Q) Data td(E-P2Q) td(P2A-ALE) Port P2 input tw(ALE) td(ALE-E) Port P32 output (ALE) td(BHE-E) th(E-BHE) Port P31 output (BHE) td(R/W-E) th(E-R/W) Address tsu(P2D-E) td(P2A-E) th(E-P2D) tpxz(E-P2Z) tpzx(E-P2Z) Address th(E-P1D) Address td(P0A-E) Address tpxz(E-P1Z) tpzx(E-P1Z) Address td(E- φ1) Port P30 output (R/W) Test conditions • VCC = 2.7 to 5.5 V • Output timing voltage : VOL = 0.8 V, VOH = 2.0 V • Ports P1, P2 input : VIL = 0.16 VCC, VIH = 0.5 VCC 19 MITSUBISHI DATA BOOK SINGLE-CHIP 16-BIT MICROCOMPUTERS Vol.1 Mar. First Edition 1996 Editioned by Committee of editing of Mitsubishi Semiconductor Data Book Published by Mitsubishi Electric Corp., Semiconductor Division This book, or parts thereof, may not be reproduced in any form without permission of Mitsubishi Electric Corporation. © 1996 MITSUBISHI ELECTRIC CORPORATION Printed in Japan