MPC860UMAD

Freescale Semiconductor, Inc. Addendum MPC860UMAD Rev. 2.4, 4/2004 Errata to the MPC860 PowerQUICC™ Family User’s Manual, Rev. 2 Freescale Semiconductor, Inc... This errata describes corrections to Revision 2 of the MPC860 PowerQUICC™ Family User’s Manual (Order No. MPC860UM, Rev. 2). The MPC860 is a PowerPC™ architecture-based quad integrated communications controller (PowerQUICC™). The CPU on the MPC860 is the MPC8xx core, a 32-bit microprocessor that implements the PowerPC architecture, incorporating memory management units (MMUs) and instruction and data caches. 1 . Document Revision History Table 1. Document Revision History Rev. No. 2.2 Substantive Change(s) Added new errata items from Section 12.5 (page 12-27), Section 27.8 (page 27-13, 27-14), Section 27.22 (page 27-29), Section 31.4.1.2 (page 30-9, 30-10), and Section 34.2.1 (page 34-4). Added new errata item from Section 32.4.3 (page 32-8). Added new errata items for Section 22 (page 22-1), Section 22.16 (page 22-15), Section 31.4.1.2 (page 30-9), and Section B.3.1 (page B-4) Table 1 provides a revision history for this document. 2.3 2.4 2 Document Errata Changes In the second row of Table 12-5, add a footnote at the end of the sentence that states: At power-on reset, port pin states are not defined in any particular state until CLKOUT is present for two clocks. The section and page numbers of new errata items added since the last errata addendum are boldfaced. Section/Page 12.5, 12-27 22, 22-1 22.16, 22-15 The last sentence in the last paragraph should be removed. In the RZS field (bit 7) of Table 22-9, for selection 1, the second sentence in the paragraph (making reference to V.14 applications) should be removed. For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Section, Page No. 27.8, 27-13 27.8, 27-14 Changes Add superscript number 2 after PADDR1_H, PADDR1_M, and PADDR1_L. Add superscript number 2 after TADDR_H, TADDR_M, and TADDR_L. At the end of Table 27-1, add a note with the following statement: The address should be written in little endian, not Motorola’s big-endian format (that is, physical address 112233445566 should be written PADDR_L = 6655, PADDR_M = 4433, and PADDR_H = 2211. The TADDR should be written in the same way as the PADDR). 27.22, 27-29 30.4.1.2, 30-9 Change the last sentence in step 26 to read, “Then write 0x000E to TxBD[Data...” In the last sentence of example 1, change the order of the string for REV = 1 to the following: first j_klmn__r_stuv last Also, on all three examples, tab last and lsb to the right so that they do not appear to be part of the string. 30.4.1.2, 30-10 In the last sentence of example 3, change the order of the string for REV = 1 to the following: first 32.4.3, 32-8 r_stuv_ghij_klmn last In Table 31-3, replace the text in the description with the following: Division ratio 0–7. Specifies the divide ratio of the BRG divider in the I2C clock generator. The output of the prescalar is divided by 2 × (DIV + 3 + (2 × FLT)), and the clock has a 50% duty cycle. The FLT bit is in the I2MOD register. The minimum value for DIV is 3 if the digital filter is disabled (FLT = 0) and 6 if the digital filter is enabled (FLT = 1). 33.1, 33-2 Add a footnote reference number at the end of the statement of the sixth bullet with the following footnote: At power-on reset, port pin states are not defined in any particular state until CLKOUT is present for two clocks. 34.2.1, 34-4 43.2.12, 43-10 B.3.1, B-4 The first bullet should reference SPS = 0, and the second bullet should reference SPS = 1. Change the term ‘60x’ in the first and fourth sentences to ‘external.’ In Table B-1, the row making reference to SCC in Profibus (seventeenth row) should be removed. Freescale Semiconductor, Inc... 2 Errata to the MPC860 PowerQUICC™ Family User’s Manual, Rev. 2 MOTOROLA For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. Section, Page No. Changes THIS PAGE INTENTIONALLY LEFT BLANK Freescale Semiconductor, Inc... MOTOROLA Errata to the MPC860 PowerQUICC™ Family User’s Manual, Rev. 2 3 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-480-768-2130 (800) 521-6274 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo 106-8573 Japan 81-3-3440-3569 Information in this document is provided solely to enable system and software implementers to use Motorola products. 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