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HFC0511GS

HFC0511GS

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC8

  • 描述:

    FIXED FREQUENCY FLYBACK CONTROLL

  • 数据手册
  • 价格&库存
HFC0511GS 数据手册
HFC0511 Fixed-Frequency Flyback Controller with Ultra-Low, No-Load Power Consumption DESCRIPTION FEATURES The HFC0511 is a fixed-frequency, currentmode controller with internal slope compensation specifically designed for medium-power, offline, flyback, switch-mode power supplies. The HFC0511 is a highly efficient green-mode controller. At light loads, the controller freezes the peak current and reduces its switching frequency down to 27kHz to achieve excellent light-load efficiency. At very light loads, the controller enters burst mode to achieve very low standby power consumption.  The HFC0511 offers frequency jittering to help dissipate energy generated by the conducted noise. The HFC0511 employs an over-power compensation function to narrow the difference of the over-power protection point between the low line and high line. The HFC0511 also has an X-cap discharge function to discharge the X-capacitor when the input is unplugged. This helps lower the power at no load. Full protection features include thermal shutdown, VCC under-voltage lockout (UVLO), overload protection (OLP), over-voltage protection (OVP), and brown-out protection. The HFC0511 is available in a SOIC8-7A package.                Fixed-Frequency, Current-Mode Control with Internal Slope Compensation Frequency Foldback down to 27kHz at Light Load Burst Mode for Low Standby Power Consumption, Meeting EuP Lot 6 Frequency Jitter to Reduce EMI Signature X-Cap Discharge Function Adjustable Over-Power Compensation Internal High-Voltage Current Source VCC Under-Voltage Lockout (UVLO) with Hysteresis Brown-Out Protection on HV Overload Protection with Programmable Delay Thermal Shutdown (Auto-Restart with Hysteresis) Latch-Off for External Over-Voltage Protection (OVP) and Over-Temperature Protection (OTP) on TIMER Latch-Off for VCC Over-Voltage Protection (OVP) Short-Circuit Protection (SCP) Programmable Soft Start (SS) Available in a SOIC8-7A Package APPLICATIONS     AC/DC Power for Small and Large Appliances AC/DC Adapters for Notebook Computers, Tablets, and Smart Phones Offline Battery Chargers LCD TVs and Monitors All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL APPLICATION T1 Output * Input 85~ 265 Vac * * TIMER FB CS GND 1 8 HV 2 VCC 3 6 4 5 DRV HFC0511 HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION ORDERING INFORMATION Part Number* HFC0511GS Package SOIC8-7A Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. HFC0511GS–Z) TOP MARKING HFC0511: First seven digits of the part number LLLLLLLL: Lot number MPS: MPS prefix Y: Year code WW: Week code PACKAGE REFERENCE TOP VIEW SOIC8-7A HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 3 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (4) HV ............................................... -0.7V to 700V VCC, DRV to GND......................... -0.3V to 30V FB, TIMER, CS to GND ................... -0.3V to 7V Continuous power dissipation (TA = +25°C) (2) ..................................................................1.3W Junction temperature ............................... 150°C Lead temperature .................................... 260°C Storage temperature ................ -60°C to +150°C ESD capability human body model (except HV and DRV) ................................................. 4.0kV ESD capability human body model (DRV) ................................................................. 3.5kV ESD capability human body model (HV) ... 1.0kV ESD capability for machine mode ..............400V SOIC8-7A.............................. 96 ....... 45 ... °C/W θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Recommended Operation Conditions (3) Operating junction temp. (TJ) ... -40°C to +125°C Operating VCC range ........................ 9V to 24V HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 4 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION ELECTRICAL CHARACTERICS VCC = 18V, TJ = -40°C ~ 125°C, min and max values are guaranteed by characterization, typical value is tested under 25°C, unless otherwise specified. Parameter Start-Up Current Source (HV) Supply current from HV Symbol IHV_400 IHV_120 ILK_400 Leakage current from HV ILK_200 Break-down voltage VBR Conditions Min Typ Max Unit VCC = 12V, VHV = 400V VCC = 12V, VHV = 120V VCC increases to 18V, then decreases to 14V, VHV = 400V VCC increases to 18V, then decreases to 14V, VHV = 200V TJ = 25°C 1.5 1.5 2.8 2.7 3.9 3.7 mA 1 16 28 μA 1 13 25 μA 700 790 12.5 15.5 18 V 10.5 12 13 V 1.35 3.5 7.3 8.5 5 7 4.9 5.5 Supply Voltage Management (VCC) VCC increasing level at which the VCCOFF current source turns off VCC decreasing level above which VCCSS soft start takes place if HV > HVON VCC hysteresis for brown-in VCCOFF detection VCCSS VCC decreasing level at which the VCCON current source turns on VCCOFF VCC UVLO hysteresis VCCON VCC recharge level when VCCPRO protection takes place VCC decreasing level at which the VCCLATCH latch-off phase ends Internal IC consumption Internal IC consumption, latch-off phase Voltage on the VCC above which the controller latches off (OVP) Blanking duration on the OVP comparator Brown-Out HV turn-on threshold voltage HV turn-off threshold voltage Brown-out hysteresis Timer duration for line cycle dropout Oscillator Oscillator frequency Frequency jittering amplitude, in percentage of fOSC Frequency jittering entry level Frequency jittering modulation period HFC0511 Rev. 1.0 5/3/2017 ICC ICCLATCH V 9.6 VFB = 2V, CL = 1nF, VCC = 12V VCC = VCCOFF - 1V, TJ = 25°C V V 6.2 2.5 VOVP V V 0.9 1.8 2.7 mA 520 700 880 μA 24 26.5 28.5 V TOVP HVON V μs 60 HV VHV going up, TJ = 25°C VHV going down, TJ = 25°C TJ = 25°C THV CTIMER = 47nF 40 fOSC VFB > 1.85V, TJ = 25°C 125 130 135 kHz Ajitter VFB > 1.85V, TJ = 25°C 5 6.5 8.3 % 1.95 V HVOFF 95 107 119 V 86 97 110 V 6.5 10 13.5 V ms VFB_JITTER Tjitter CTIMER = 47nF 3.7 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. ms 5 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION ELECTRICAL CHARACTERICS (continued) VCC = 18V, TJ = -40°C ~ 125°C, min and max values are guaranteed by characterization, typical value is tested under 25°C, unless otherwise specified. Parameter Symbol Current Sense Current-limit point Short-circuit protection point Current limitation when frequency folds back Current limitation when entering burst Current limitation when leaving burst Leading edge blanking for VILIM Leading edge blanking for VSCP Slope of the compensation ramp Feedback (FB) Internal pull-up resistor Internal pull-up voltage VFB to internal current set point division ratio VFB to internal current set point division ratio FB decreasing level at which the controller enters burst mode FB increasing level at which the controller leaves burst mode Overload Protection (OLP) FB level at which the controller enters the OLP after a dedicated time Time duration before OLP when FB reaches protection point Over-Power Compensation VHV to IOPC ratio Current out of CS FB voltage below which compensation is removed FB voltage above which compensation is applied fully Frequency Foldback FB voltage threshold below which frequency foldback starts Minimum switching frequency FB voltage threshold below which frequency foldback ends HFC0511 Rev. 1.0 5/3/2017 Conditions VILIM VSCP Min Typ Max Unit 0.93 1.3 1 1.47 1.07 1.63 V V 0.63 0.68 0.73 V VFOLD VFB = 1.85V VIBURL VFB = 0.7V 0.11 V VIBURH VFB = 0.8V 0.15 V 350 270 25 ns ns mV/μs TLEB1 TLEB2 SRAMP 18 RFB VDD 32 11.5 14 4.3 17 kΩ V KFB1 VFB = 2V 2.55 2.8 3.05 -- KFB2 VFB = 3V 2.8 3.1 3.4 -- VBURL 0.63 0.7 0.77 V VBURH 0.72 0.8 0.88 V VOLP TOLP 3.7 CTIMER = 47nF 40 KOPC IOPC VHV = 120V, VFB = 2.5V VHV = 155V, VFB = 2.5V VHV = 310V, VFB = 2.5V VHV = 380V, VFB = 2.5V, TJ = 25°C VOPC(OFF) ms 80 109 138 0.55 V 2.2 VFB(FOLD) VFB(FOLDE) μA/V μA 0.45 0 13 85 VOPC(ON) FOSC(min) V 1.8 TJ = 25°C 21 27 1.0 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. V V 33 kHz V 6 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION ELECTRICAL CHARACTERICS (continued) VCC = 18V, TJ = -40°C ~ 125°C, min and max values are guaranteed by characterization, typical value is tested under 25°C, unless otherwise specified. Parameter Symbol Latch-Off Input (Integration in TIMER) Threshold below which controller VTIMER(LATCH) is latched Blanking duration on latch TLATCH detection DRV Voltage Driver voltage high level VHigh Driver voltage clamp level VClamp Driver voltage low level VLow Driver voltage rise time TR Driver voltage fall time TF Driver pull-up resistance RPull-up Driver pull-down resistance RPull-down Thermal Shutdown Thermal shutdown threshold (5) Thermal shutdown hysteresis (5) Conditions CL = 1nF, VCC = 12V CL = 1nF, VCC = 24V CL = 1nF, VCC = 24V CL = 1nF, VCC = 16V CL = 1nF, VCC = 16V CL = 1nF, VCC = 16V CL = 1nF, VCC = 16V Min Typ Max Unit 0.7 1 1.3 V 12 μs 10.3 13.4 16 13 23 8 10 V V mV ns ns Ω Ω 150 25 °C °C NOTE: 5) This parameter is guaranteed by design. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 7 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION PIN FUNCTIONS Pin # Name 1 TIMER 2 FB 3 CS 4 5 6 8 GND DRV VCC HV HFC0511 Rev. 1.0 5/3/2017 Description Timer. TIMER combines soft start, frequency jittering, and timer functions for overload protection (OLP), brown-out protection, and X-cap discharging. The HFC0511 can be latched off by pulling TIMER low. Feedback. Use a pull-down optocoupler to control the output regulation. Current sense. CS senses the primary-side current for current-mode operation and provides a mean for over-power compensation adjustment. IC ground. Drive signal output. Power supply. High-voltage current source. HV includes brown-out and X-cap discharge functions. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS (continued) HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL CHARACTERISTICS (continued) HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL PERFORMANCE CHARACTERISICS VIN = 230VAC, VOUT = 19V, IOUT = 2.35A, unless otherwise noted. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL PERFORMANCE CHARACTERISICS (continued) VIN = 230VAC, VOUT = 19V, IOUT = 2.35A, TA = 25°C, unless otherwise noted. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION BLOCK DIAGRAM Vcc Power Management Start-Up Unit HV Brown-Out Detection X-Cap Discharge Function HV Sample OVP Fault Management Timer OLP Driving Signal Management DRV Frequency Foldback Burst Mode Control FB Peak Current Compression Comparator Slope Compensation Over-Power Compensation GND CS Figure 1: Functional Block Diagram HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION OPERATION The HFC0511 incorporates all necessary features for building a reliable switch-mode power supply. The HFC0511 is a fixedfrequency, current-mode controller with internal slope compensation. At light loads, the controller freezes the peak current and reduces its switching frequency down to 27kHz to minimize switching losses. When the output power falls below a given level, the controller enters burst mode. The HFC0511 also has excellent EMI performance due to frequency jittering. The HFC0511’s high level of integration requires very few external components. Fixed Frequency with Jitter Frequency jitter reduces EMI by spreading the energy over the jitter frequency range. Figure 2 shows the circuit of the frequency jittering. FB VDD 14pF Figure 3: Frequency Jitter Frequency Foldback The HFC0511 implements frequency foldback at light load to improve overall efficiency. When the load decreases to a given level (1.0V < VFB < 1.8V), the controller freezes the peak current (as measured on CS, typically 0.7V) while reducing its switching frequency to 27kHz. This reduces switching loss. If the load continues to decrease, the peak current decreases with 27kHz of fixed frequency to avoid audible noise. Figure 4 shows the frequency vs. VFB and peak current (VCS) vs. VFB. Frequency 10uA 130kHz 1V Timer 3.2V 20uA S 2.8V R Q Burst 27kHz _ Q Frequency foldback A controlled current sourced (fixed at 2.72µA when VFB = 2V) charges the internal COSC capacitor. Comparing the capacitor voltage to the TIMER voltage determines the switching frequency. Frequency jitter is accomplished by varying VTIMER between 3.2V and 2.8V (see Figure 3). Determine Tjitter with Equation (1): CTIMER  (3.2V  2.8V) 10A 0.7V Fault 1.0V 1.8V 3V FB Figure 4: Frequency and Peak Current (VCS) vs. VFB Figure 2: Frequency Jitter Circuit Tjitter  2  Fixed frequency Fixed frequency 0.7/0.8V HFC0511 Rev. 1.0 5/3/2017 Peak Current Frequency Jittering (1) Current-Mode Operation with Slope Compensation The feedback voltage (VFB) controls the primary peak current. When the peak current reaches the level determined by VFB, DRV turns off. The controller can also be used in continuous conduction mode (CCM) with a wide input voltage range because of its internal slope compensation (typically 25mV/µs), avoiding sub-harmonic oscillations above a 50% duty cycle. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION High Voltage Start-Up Current Source with Brown-Out Detection At start-up, the internal high-voltage current 1.75V source from HV supplies the IC. The IC turns off the current source once VCC reaches VCCOFF (typically 15.5V) and detects the voltage on HV. Once the HV voltage exceeds HVON before VCC drops down to VCCSS (typically 12V), the controller begins switching. If the HV voltage does not exceed VHON, the system treats this as a brown-out and latches DRV low. When VCC drops to VCCPRO (typically 5.5V), the high-voltage current source turns on to recharge VCC. The auxiliary transformer winding supplies the IC after the controller starts switching. If VCC falls below VCCON (typically 8.5V), the switching pulse stops, and the current source turns on again. Figure 5 shows the typical VCC under-voltage lockout (UVLO) waveform. 1V The auxiliary winding takes over VCCOFF VCCSS VCCON VCCPRO ON ITIMER=10/4 A TIMER ITIMER=10A Current limit 1V Ipri 0.25V Soft start duration Figure 6: Soft Start Burst Mode To minimize power dissipation in no load or light load, the HFC0511 employs burst-mode operation. As the load decreases, VFB decreases. The IC enters burst mode when VFB drops below the lower threshold (VBURL, typically 0.7V), stopping output switching. Then the output voltage starts to drop, which causes VFB to increase again. Once VFB exceeds VBURH (typically 0.8V), switching resumes. Burst mode enables and disables MOSFET switching alternately, thereby reducing no-load or lightload switching losses. OFF HVON Figure 5: VCC Under-Voltage Lockout The VCC lower threshold UVLO drops from VCCON to VCCPRO under fault conditions such as overload protection (OLP), short-circuit protection (SCP), brown-out, and overtemperature protection (OTP). Soft Start (SS) Soft start is externally programmable with a capacitor on TIMER. As this capacitor charges from 1V to 1.75V with 1/4 of the normal charge current, the peak-current limit threshold increases gradually from 0.25V to 1V while increasing the switching frequency gradually. Figure 6 shows the typical soft-start waveform. The TIMER capacitor determines the start-up duration as shown in Equation (2): TSoft start  HFC0511 Rev. 1.0 5/3/2017 CTIMER  (1.75V  1V) 10 / 4A Adjustable Over-Power Compensation An offset current proportional to the input voltage is added to the current sense voltage. By choosing the value of the resistor to be in series with CS, the amount of compensation can be adjusted to the application for a more accurate output power limit at the total input range. Figure 7 and Figure 8 show the compensation current relation to FB and the peak voltage on HV respectively. IOPC VHV VOPC(OFF) VOPC(ON) FB Figure 7: Compensation Current vs. FB and HV Voltage (2) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION Short-Circuit Protection (SCP) The HFC0511 employs short-circuit protection (SCP) if VCS reaches VSCP (typically 1.47V) after a reduced leading-edge blanking time (TLEB2). Once the fault disappears, the power supply resumes operation. IOPC IOPC(380) IOPC(310) IOPC(155) IOPC(120) 120V 155V 310V 380V VHV Figure 8: Compensation Current vs. Peak of Rectified Input Line AC Voltage Timer-Based Overload Protection (OLP) In a flyback converter, if the switching frequency is fixed, the maximum output power is limited by the peak current. The output voltage drops below the set value when the output power exceeds the power limit. This reduces the current through the optocoupler, pulling VFB high. When FB is higher than the OLP voltage (VOLP) (typically 3.7V), which is considered to be an error flag, the timer begins counting. If the error flag is removed during the count, the timer resets. If the timer count reaches 17, OLP is triggered. This timer duration avoids triggering OLP during power supply start-up or short load transients. Figure 9 shows the OLP function. Figure 9: Overload Protection Timer-Based Brown-Out Protection The brown-out protection block is similar to the OLP block. When the HV voltage drops below HVOFF (typically 97V), which is considered to be an error flag, the timer begins counting. Once the HV voltage is higher than HVOFF, the timer resets. When the timer counts to 17, brown-out protection is triggered and switching stops. HFC0511 Rev. 1.0 5/3/2017 Thermal Shutdown To prevent thermal damage, the HFC0511 stops switching when the temperature exceeds 150°C. Once the temperature drops below 125°C, the power supply resumes operation. During thermal shutdown, the VCC UVLO lower threshold drops from 8.5V to 5.5V. VCC Over-Voltage Protection (OVP) The HFC0511 enters a latched fault condition if VCC rises above VOVP (typically 26.5V) for 60µs. The controller remains fully latched until VCC drops below VCCLATCH (typically 2.5V), such as when the power supply is unplugged from the main input and is plugged in again. This situation usually occurs when the optocoupler fails, which results in the loss of output voltage regulation. TIMER Latch-Off for OVP and OTP Pulling TIMER below VTIMER(LATCH) (typically 1V) for 12µs can latch off the IC. This function can be used for external over-voltage protection (OVP) and OTP. X-Cap Discharge Function X-capacitors are typically positioned across a power supply’s input terminals to filter differential mode EMI noise. These components pose a potential hazard since they can store unsafe levels of voltage energy after the AC line is disconnected. Generally, resistors in parallel with the X-caps provide a discharge path to meet safety standards, but these discharge resistors produce a constant loss while the AC is connected and contribute to no-load and standby input power consumption. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION HV acts as a smart X-cap discharger. When AC voltage is applied, the internal high-voltage current source turns off to block HV current, and the IC monitors the HV voltage. When removing the AC voltage, the IC turns on the high-voltage current source after about 32 TIMER cycles to discharge the X-cap energy. The first discharge duration is 16 cycles. After the first discharge, the IC turns off the current source for 16 cycles to detect whether the input is plugged into the AC line again. If the AC input remains disconnected, the IC turns on the current source for 48 cycles to discharge again, and then turn off for 16 cycles to detect repeatedly until the voltage on the X-cap drops to VCC. Once the reconnected AC input is detected, the high-voltage current source remains off until VCC drops to VCCPRO (5.3V), and then restarts the system by recharging VCC. Figure 10 shows the discharge function waveforms. Discharge Vpeak Rectified Line voltage Clamped Driver DRV is clamped at VClamp (typically 13.4V) when VCC exceeds 16V, allowing for the use of any standard MOSFET. Leading-Edge Blanking An internal leading-edge blanking (LEB) unit containing two LEB times is employed between the CS and the current comparator input to prevent premature switching pulse termination due to parasitic capacitances (see Figure 11). During the blanking time, the current comparator is disabled and cannot turn off the external MOSFET. VLimit TLEB1=350ns TLEB2=270ns for SCP Detect whether input re-plug to AC line t 37%Vpeak Figure 11: Leading-Edge Blanking Driving Signal 16V VCC ON Internal Current Source OFF 32 TIMER 16 TIMER Cycles Cycles 48 TIMER 16 TIMER Cycles Cycles Total discharge time Figure 10: X-Cap Discharger This approach provides an intelligent discharge path for the X-cap, eliminating power loss from the external discharge resistors. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 18 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION APPLICATION INFORMATION VCC Capacitor Selection Figure 12 shows the start-up circuit. The values of R1 and C1 determine the system start-up delay time. A larger R1 or C1 increases the start-up delay. A larger inductor leads to a smaller KP, which can reduce RMS current, but increases transformer size. An optimal KP value is between 0.6 and 0.8 for the universal input range and 0.8 to 1 for a 230VAC input range. KP=Iripple/Ipeak Iripple Ipeak Input 85~265Vac Iav D1 D2 R1 TIMER FB CS GND 1 Figure 13: Typical Primary-Current Waveform 8 HV The input power (Pin) at the minimum input can be estimated with Equation (4): 2 HFC0511 3 6 4 5 VCC Pin  C1 Figure 12: Start-Up Circuit The VCC duration (from VCCOFF to VCCSS) for brown-out detection should exceed half of the input period. Estimate a value for the VCC capacitor with Equation (3): CVCC  ICC(noswitch)  0.5  Tinput VCCOFF  VCCSS (3) Where ICC(noswitch) is the internal consumption (close to ICClatch), and Tinput is the period of the AC input. For most applications, choose a VCC capacitor value that exceeds 10µF. A higher R1 value decreases the current of the internal high-voltage current source, especially at a low-input condition. Ensure that the practical supply current from HV is not smaller than the corresponding internal IC consumption current, which is the same as ICCLATCH. For the universal input range, R1 should be smaller than 80kΩ. 20kΩ is generally recommended. Primary-Side Inductor Design (Lm) With internal slope compensation, the HFC0511 can support CCM when the duty cycle exceeds 50%. Set a ratio (KP) of the primary inductor’s ripple current amplitude vs. the peak current value to 0 < KP  1, where KP = 1 for discontinuous conduction mode (DCM). Figure 13 shows the relevant waveforms. HFC0511 Rev. 1.0 5/3/2017 VO  IO  (4) Where VO is the output voltage, IO is the rated output current, and  is the estimated efficiency, which is generally between 0.75 and 0.85 depending on the input range and output application. For CCM at minimum input, the converter duty cycle can be calculated with Equation (5): D (VO  VF )  N (VO  VF )  N  Vin(min) (5) Where VF is the secondary diode’s forward voltage, N is the transformer turn ratio, and Vin(min) is the minimum voltage on the bulk capacitor. The MOSFET turn-on time can be calculated with Equation (6): Ton  D  Ts (6) Where Ts is the switching period. The average value of the primary current is calculated with Equation (7): Iav  Pin Vin(min) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. (7) 19 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION The peak value of the primary current is calculated with Equation (8): Ipeak  Iav  Kp  1    D 2   (8) The ripple value of the primary current is calculated with Equation (9): Iripple  KP  Ipeak (9) The valley value of the primary current is calculated with Equation (10): Ivalley  (1  KP )  Ipeak Vin(min)  Ton (11) Iripples Q S - FB R + CS (12) Then calculate the value of the sense resistor with Equation (13): Rsense  Current-Sense Resistor Figure 14 shows the peak-current comparator logic and the subsequent waveform. DRV Vsense  95%  Vlimit  Vslope  Ton (10) Lm can be estimated with Equation (11): Lm  When the sum of the sensing resistor voltage and the slope compensator reaches Vpeak, the comparator goes high to reset the RS flip-flop, and DRV is pulled down to turn off the MOSFET. The maximum current limit (Vlimit, as measured by VCS) is 0.95V. The slope compensator (Vslope) is ~25mV/µs. Given a certain margin, use 0.95xVlimit as Vpeak at full load. Then the voltage on the sensing resistor can be obtained with Equation (12): Vsense Ipeak (13) Select the current sense resistor with an appropriate power rating. Then calculate the sense resistor power loss with Equation (14):  I I 2  1 Psense   peak valley   Ipeak  Ivalley    D  Rsense (14) 2    12 2 Low-Pass Filter on CS A small capacitor connected to the CS with Rseries forms a low-pass filter for noise filtering when the MOSFET turns on and off (see Figure 15). Vlimit LEB Slope compensation Peak-Current Comparator Circuit Vpeak Vslope*Ton Ipeak*Rsense Figure 15: Low-Pass Filter on CS ton Typical Waveform Figure 14: Peak-Current Comparator HFC0511 Rev. 1.0 5/3/2017 The low-pass filter’s RxC constant should not exceed 1/3 of the leading-edge blanking period for SCP (TLEB2, typically 270ns), otherwise the filtered sensed voltage cannot reach the SCP point (1.45V) to trigger SCP if an output short circuit occurs. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 20 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION Over-Power Compensation (OPC) The HFC0511 uses an over-power compensation function (OPC) by drawing current from CS. OPC minimizes the OLP difference caused by a different input voltage. The offset current is proportional to the input peak voltage sensed by HV. Supposing that the resistor in the current sensing loop is Rseries, and the input voltage is 220VAC, calculate the compensation voltage on CS with Equation (15): Vcomp  Rseries  Iopc _ 310V (15) The compensation criterion is making the FB voltage under full-load condition similar whether in high line or low line. Jitter Period Frequency jitter is an effective method to reduce EMI by dissipating energy. The nth order harmonic noise bandwidth is calculated with Equation (16): BTn  n  (2  f  fjitter ) X-Cap Discharge Time Figure 10 shows the X-cap discharger waveforms. The maximum discharge time occurs at a high-line input with no-load condition. The maximum discharge delay time is calculated with Equation (17): Tdelay  32  Tjitter If BTn exceeds the resolution bandwidth (RBW) of the spectrum analyzer (200Hz for noise frequency less than 150kHz, 9kHz for noise frequency between 150kHz to 30MHz), the spectrum analyzer receives less noise energy. The capacitor on TIMER determines the period of the frequency jitter. A 10µA current source charges the capacitor. When the TIMER voltage reaches 3.2V, another 10µA current source discharges the capacitor to 2.8V. This charging and discharging cycle repeats. Equation (2) describes the jitter period in theory. A smaller fjitter is more effective for EMI reduction. However, the measurement bandwidth requires that fjitter be large compared to the spectrum analyzer RBW for effective EMI reduction. fjitter should also be less than the control-loop-gain crossover frequency to avoid disturbing the output voltage regulation. Simultaneously consider the practical application when selecting the TIMER capacitor. A capacitor that is too large may cause the start-up to fail at full load because of the long soft start-up duration shown in Equation (3). (17) The X-cap is discharged from a high-voltage constant current source (IHV_120V, typically 2.5mA) into HV. The current-source discharge time for the X-cap to drop to 37% of the peak voltage can be estimated with Equation (18): Tdischarge  (16) Where f is the frequency jitter amplitude. HFC0511 Rev. 1.0 5/3/2017 However, a TIMER capacitor that is too small causes the TIMER period to become smaller, so the TIMER count capability is overloaded, and some logic problems may occur. For most applications, a fjitter value between 200Hz and 400Hz is recommended. CX  63%  2  Vac(max) IHV _120V (18) Where CX is the X-cap capacitance, and VAC(max) is the maximum AC input RMS value. The first discharging period is 16xTjitter, with a subsequent period equal to 48xTjitter. Then the discharge sections times can be calculated approximately with Equation (19): n Tdischarge  16  Tjitter 48  Tjitter 1 (19) For every discharge section, there is a certain period (16xTjitter) for detection as shown in Equation (20): Tdetect  16  Tjitter (  n  1) (20) As a result, the total discharge time is determined with Equation (21): Ttotal  Tdelay  Tdischarge  Tdetect (21) The total discharge time is relative to Tjitter, which is dependent on CTIMER. For example, if CTIMER is 47nF, and Tjitter is 3.7ms, the X-cap discharge margin is 1s due to the X-cap value tolerance (10% typically). It is recommended to select an X-cap less than 3.3μF. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 21 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION Though the X-cap has been discharged, it may still retain a high voltage on the bulk capacitor. For safety, make sure it is released before debugging the board. Dmax  Vin(min)  Rsense - ma (1- Dmax )  Lm = Vin(min)  Rsense +ma Lm Output Loop Auxiliary winding Loop Ramp Compensation When adopting peak current control, subharmonic oscillation occurs when D > 0.5 in CCM. The HFC0511 is equipped with internal ramp compensation to solve this problem. α is calculated with Equation (22): Input Loop Top (22) Where ma = 18mV/µs is the minimum internal slope value of the compensation ramp, Vin(min)  Rsense is the slew rate of the primary-side Lm sensed by the CS resistor, and Dmax  Vin(min)  Rsense is the slew rate of the (1  Dmax )  Lm equivalent secondary-side voltage sensed by the CS resistor respectively. For stable operation, α must be less than 1. PCB Layout Guidelines Efficient PCB layout is critical for stable operation, good EMI performance, and good thermal performance. For best results, refer to Figure 16 and follow the guidelines below. 1) Minimize the power stage loop area including the input loop (C1 - T1 - Q1 R11/R12/R13 - C1), the auxiliary winding loop (T1 - D4 - R4 - C3 - T1), and the output loop (T1 - D6 - C10 - T1). Bottom Figure 16: Recommended Layout Design Example Table 1 is a design example of the HFC0511 for power adapter applications. Table 1: Design Example VIN VOUT IOUT 85 to 265VAC 19V 2.35A 2) Keep the input loop GND and control circuit separate. Only connect them at C1. 3) Connect the Q1 heat sink to the primary GND plane to improve EMI. 4) Place the control circuit capacitors (such as those for FB, CS, and VCC) close to the IC to decouple noise. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 22 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION TYPICAL APPLICATION CIRCUIT CY1 2.2nF R1 R2 150kΩ 150kΩ F1 250V/2A 1206 C2 2.2nF/630V 1206 1206 R14 51Ω C9 R15 51Ω 1nF T1 1 Vout P L LX1 CX1 85~265VAC 0.22µF N 1206 R4 0Ω C3 47µF/25V VCC C4 0.1µF 1 TIMER D5 Q2 S8050 C5 0.1µF 2 FB C6 47nF C7 470pF CS C7 15pF 3 4 GND R19 10 5 R16 1kΩ RM8 Lp=660µH Np:Ns:Np_aux=60:7:11 FB HV 19V/2.35A 4 U1 BZT52C16 C11 4.7µF Np_aux R5 20kΩ/1206 R7 1kΩ 680µF/25V Ω 1% D2 SRGC10MH VCC C10 D6 150V/20A MBR20150FCT N 2 SRGC10MH D3 SRGC10MH D1 SRGC10MH Ns D4 R3 0Ω C1 100µF/400V 30mH/1.5A 150µH/1.5A Np BD1 DF06S 600V/1A LX2 U2 PC817B 8 R20 66.5kΩ 1% R17 1kΩ FB HFC0511 CS GND VCC DRV 6 5 R8 20Ω R18 Q1 SMK0870F R9 20K 33kΩ 700V/8A C12 100nF U3 CJ431 R21 10kΩ CS R10 2.2kΩ 1% R11 1.1Ω 1206 1% R12 1.1Ω 1206 1% R13 5.1Ω 1% 1206 1% Figure 17: Typical Application HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 23 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION FLOW CHART Figure 18: Control Flow Chart HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 24 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION EVOLUTION OF THE SIGNALS IN PRESENCE OF FAULTS Figure 19: Signal Evolution in the Presence of Faults HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 25 HFC0511 – FIXED-FREQUENCY FLYBACK CONTROLLER W/ ULTRA-LOW NO LOAD POWER CONSUMPTION PACKAGE INFORMATION PACKAGE OUTLINE DRAWING FOR SOIC 8-7-2 MF-PO-D-0126, revision 0.0 SOIC8-7A 0.189(4.80) 0.197(5.00) 8 0.050(1.27) 0.024(0.61) 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.050(1.27) BSC 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) JEDEC REFERENCE IS MS-012. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. HFC0511 Rev. 1.0 5/3/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 26
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