MP2314S
2A, 24V, 500kHz, High-Efficiency,
Synchronous, Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2314S is a high-efficiency, synchronous,
rectified, step-down, switch mode converter
with built-in, internal power MOSFETs. It is a
next generation of the MP2314. It offers a very
compact solution to achieve 2A continuous
output current over a wide input supply range
with excellent load and line regulation.
The MP2314S uses synchronous mode
operation for higher efficiency over the output
current-load range. Current mode operation
provides fast transient response and eases loop
stabilization.
Full protection features include over-current
protection (OCP), over-voltage protection,
(OVP), and thermal shutdown.
The MP2314S requires a minimal number of
readily
available,
standard,
external
components and is available in a compact
TSOT23-8 package.
Wide 4.5V to 24V Operating Input Range
2A Load Current
140mΩ/65mΩ Low RDS(ON) Internal Power
MOSFETs
Low Quiescent Current
High-Efficiency Synchronous Mode
Operation
Fixed 500kHz Switching Frequency
AAM Power Save Mode
Internal Soft Start
Output Over-Voltage Protection (OVP)
Over-Current Protection (OCP) and Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in an TSOT23-8 Package
APPLICATIONS
Notebook Systems and I/O Power
Digital Set-Top Boxes
Flat Panel Television and Monitors
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under quality
assurance. “MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
100
95
90
VIN=6.5V
85
VIN=12V
80
75
VIN=19V
70
65
60
0.01
0.10
1.00
10.00
OUTPUT CURRENT (A)
MP2314S Rev. 1.0
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12/18/2015
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1
MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP2314SGJ
Package
TSOT23-8
Top Marking
See below
* For Tape & Reel, add suffix –Z (e.g. MP2314SGJ–Z)
TOP MARKING
ARD: Product code
Y: Year code
PACKAGE REFERENCE
TOP VIEW
TSOT23-8
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN .................................................-0.3V to +26V
VSW ..... -0.3V (-5V < 10ns) to +28V (30V < 10ns)
VBST ...................................................... VSW + 6V
(2)
All other pins ........................... -0.3V to +5.5V
(3)
Continuous power dissipation (TA = +25°C) …
................................................................. 1.25W
Junction temperature ................................150°C
Lead temperature .....................................260°C
Storage temperature .................. -65°C to 150°C
TSOT23-8…………………...…...100…..55..°C/W
Recommended Operating Conditions
(4)
Supply voltage (VIN) ........................... 4.5 to 24V
Output voltage (VOUT)..............0.8V to VIN * DMAX
Operating junction temp (TJ). ... -40°C to +125°C
(5)
θJA
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) For details on EN’s ABS MAX rating, please refer to the
Enable Control section on page 9.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C.
Parameter
(6)
Symbol
Supply current (shutdown)
IIN
Supply current (quiescent)
Iq
HS switch on resistance
LS switch on resistance
Typical value is tested at TJ = +25°C, unless otherwise noted.
HSRDS-ON
LSRDS-ON
Switch leakage
SWLKG
Current limit
Oscillator frequency
Foldback frequency
Maximum duty cycle
Minimum on time (7)
ILIMIT
fSW
fFB
DMAX
TON_MIN
Feedback voltage
VFB
Feedback current
EN rising threshold
EN hysteresis
IFB
EN input current
Condition
VEN = 0V, TJ = 25°C
VEN = 2V, VFB = 0.85V,
AAM = 0.4V
VBST-SW = 5V
VCC = 5V
VEN = 0V, VSW = 12V,
TJ = 25°C
Duty cycle = 40%
VFB = 750mV
VFB = 200mV
VFB = 750mV
VEN = 2V
3
400
90
Max
Units
1
μA
120
μA
140
65
mΩ
mΩ
4
500
0.5
95
60
600
μA
A
kHz
fSW
%
ns
783
791
800
mV
1.26
10
1.4
150
50
1.54
nA
V
mV
1
2
3
μA
0
50
nA
VEN = 0
EN turn off delay
VIN under-voltage lockout
threshold rising
VIN under-voltage lockout
threshold hysteresis
VCC regulator
VCC load regulation
Soft-start period
Thermal shutdown (7)
Thermal hysteresis (7)
AAM source current
OVP rising threshold
OVP falling threshold
OVP delay (7)
Typ
1
VFB = 820mV
VEN_RISING
VEN_HYS
IEN
Min
ENTd-off
5
9
13
μs
INUVVth
3.85
4.05
4.25
V
INUVHYS
600
750
900
mV
VCC
4.85
5.1
1.5
1.5
150
20
6.7
120%
109%
2
5.35
V
%
ms
ºC
ºC
μA
VREF
VREF
μs
TSS
TSD
THYS
IAAM
OVH_RISE
OVL_FALL
OVDEY
ICC = 5mA
10% to 90%
FB voltage
FB voltage
0.8
115%
104%
2.2
125%
114%
NOTE:
6) Not tested in production. Guaranteed by over-temperature correlation.
7) Guarantee by engineering sample characterization.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
VIN = 19V, VOUT = 5V, L = 6.5μH, TA = 25°C, unless otherwise noted.
100
100
100
95
95
95
90
90
VIN=6.5V
85
75
70
70
65
65
1.00
VIN=12V
1.00
Current Limit vs. Duty
Cycle
PEAK CURRENT LIMIT (A)
IOUT=2A
IOUT=1A
0.1
-0.1
-0.1
VIN=12V
0
0.5
1
1.5
OUTPUT CURRENT (A)
-0.5
2
Enabled Supply Current
vs. Input Voltage
DISABLE SUPPLY CURRENT (nA)
140
130
120
110
8
12
16
20
INPUT VOLTAGE (V)
24
6
8 10 12 14 16 18 20 22 24
INPUT VOLTAGE (V)
4.3
4.1
3.9
3.7
3.5
200
VEN=0V
40
150
30
100
20
50
10
0
4
8
12
16
20
INPUT VOLTAGE (V)
0 10 20 30 40 50 60 70 80 90 100
Case Temperature Rise
vs. Output Current
Disabled Supply Current
vs. Input Voltage
VFB=0.85V, VEN=2V
4
IOUT=0.01A
-0.3
VIN=19V
0.10
1.00
10.00
OUTPUT CURRENT (A)
4.5
0.3
VIN=6.5V
-0.3
VIN=19V
50
0.01
10.00
0.5
0.1
100
0.10
Line Regulation
0.5
150
60
OUTPUT CURRENT (A)
Load Regulation
0.3
VIN=12V
65
55
OUTPUT CURRENT (A)
-0.5
70
VIN=19V
60
0.01
10.00
VIN=5V
75
75
0.10
80
VIN=5V
80
VIN=19V
60
0.01
85
85
VIN=12V
80
90
24
0
1
1.2
1.4
1.6
1.8
OUTPUT CURRENT (A)
MP2314S Rev. 1.0
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4
MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 19V, VOUT = 5V, L = 6.5μH, TA = 25°C, unless otherwise noted.
Start-Up through Input
Voltage
IOUT=0A
Shutdown through Input
Voltage
Start-Up through Input
Voltage
IOUT=0A
IOUT=2A
VOUT
2V/div.
VOUT
2V/div.
VOUT
2V/div.
VIN
10V/div.
VIN
10V/div.
VIN
10V/div.
VSW
10V/div.
VSW
10V/div.
VSW
10V/div.
IIINDUCTOR
1A/div.
IIINDUCTOR
2A/div.
IIINDUCTOR
2A/div.
Shutdown through Input
Voltage
Start-Up through Enable
Shutdown through Enable
IOUT=0A
IOUT=0A
IOUT=2A
VOUT
2V/div.
VOUT
2V/div.
VEN
5V/div.
VOUT
2V/div.
VIN
10V/div.
VEN
5V/div.
VSW
10V/div.
IIINDUCTOR
2A/div.
VSW
20V/div.
VSW
20V/div.
IIINDUCTOR
2A/div.
IIINDUCTOR
1A/div.
Start-Up through Enable
Shutdown through Enable
Input / Output Ripple
IOUT=2A
IOUT=2A
IOUT=0A
VOUT
2V/div.
VOUT
2V/div.
VEN
5V/div.
VSW
20V/div.
VEN
5V/div.
VSW
20V/div.
IIINDUCTOR
2A/div.
IIINDUCTOR
2A/div.
VOUT/AC
50mV/div.
VIN/AC
100mV/div.
VSW
20V/div.
IIINDUCTOR
1A/div.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 19V, VOUT = 5V, L = 6.5μH, TA = 25°C, unless otherwise noted.
Input / Output Ripple
Short Circuit Entry
IOUT=2A
VOUT/AC
20mV/div.
IOUT=0A
VOUT
100mV/div.
VOUT
2V/div.
VIN/AC
200mV/div.
VSW
20V/div.
VSW
20V/div.
IOUT
1A/div.
VSW
20V/div.
IIINDUCTOR
5A/div.
Short Circuit Recovery
Bode Plot
IOUT=0A
IOUT=2A
MAGNITUDE(dB)
VOUT
2V/div.
IIINDUCTOR
5A/div.
60
180
40
120
20
60
0
0
-20
-60
-40
-120
-60
1000
10000
100000
PHASE (DEG)
IIINDUCTOR
2A/div.
-180
1000000
FREQUENCY (Hz)
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
Name
1
AAM
2
IN
3
SW
4
GND
5
BST
6
EN
7
VCC
8
FB
Description
Advanced asynchronous modulation. Connect AAM to a voltage supply through a
resistor divider to force the MP2314S into non-synchronous mode under light-load
conditions. Tie AAM to VCC or float AAM to disable AAM mode and force the MP2314S
into CCM.
Supply voltage. The MP2314S operates with a 4.5V to 24V input rail. C1 is needed to
decouple the input rail. Connect using a wide PCB trace.
Switch output. Connect using a wide PCB trace.
System ground. GND is the reference ground of the regulated output voltage. GND
requires special consideration during PCB layout. Connect GND with copper traces and
vias.
Bootstrap. A capacitor and a resistor are required between SW and BST to form a
floating supply across the high-side switch driver.
Enable. Drive EN high to enable the MP2314S.
Internal bias supply, internal 5.1V LDO output. Decouple VCC with a 0.1μF - 0.22μF
capacitor. The capacitance should be no more than 0.22μF.
Feedback. Connect FB to the tap of an external resistor divider from the output to GND
to set the output voltage. The frequency foldback comparator lowers the oscillator
frequency when the FB voltage is below 400mV to prevent current-limit runaway during a
short-circuit fault condition.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
OPERATION
The MP2314S is a high-efficiency, synchronous,
rectified, step-down, switch mode converter
with built-in, internal power MOSFETs. It offers
a very compact solution that achieves 2A of
continuous output current with excellent load
and line regulation over a wide input supply
range.
When the MP2314S operates in a fixed
frequency, the peak-current control mode
regulates the output voltage. A pulse width
modulation (PWM) cycle is initiated by the
internal clock. The integrated high-side power
MOSFET (HS-FET) turns on and remains on
until its current reaches the value set by the
COMP voltage (VCOMP). When the power switch
is off, it remains off until the next clock cycle
begins. If the current in the power MOSFET
does not reach the COMP set current value
within 95% of one PWM period, the power
MOSFET is forced off.
Internal Regulator
Most of the internal circuitries are powered by
the 5.1V internal regulator. This regulator takes
the VIN input and operates in the full VIN range.
When VIN is greater than 5.1V, the output of the
regulator is in full regulation. When VIN drops
below 5.1V, the output decreases. A 0.1µF
ceramic capacitor is required for decoupling.
Error Amplifier (EA)
The error amplifier compares the FB voltage
with the internal 0.791V reference (REF) and
outputs a COMP voltage which is used to
control the power MOSFET current. The
optimized internal compensation network
minimizes the external component counts and
simplifies the control loop design.
AAM Operation
The MP2314S uses advanced asynchronous
modulation (AAM) power save mode in light
load. Set the AAM voltage with the tap of an
external resistor divider from VCC to GND.
Under heavy-load conditions, VCOMP is higher
than VAAM. When the clock goes low, the HSFET turns on and remains on until VILsense
reaches the value set by VCOMP. The internal
clock resets whenever VCOMP is higher than
VAAM.
Under light-load conditions, the value of VCOMP
is low. When VCOMP is less than VAAM and VFB is
less than VREF, VCOMP ramps up until it exceeds
VAAM. During this time, the internal clock is
blocked, and the MP2314S skips some pulses
for pulse frequency modulation (PFM) mode
and achieves a light-load power save.
Figure 2: Simplified AAM Control Logic
Enable Control (EN)
Enable (EN) is a digital control that turns the
regulator on and off. Drive EN high to turn on
the regulator; drive EN low to turn off the
regulator. An internal 1MΩ resistor from EN to
GND allows EN to be floated to shut down the
chip.
EN is clamped internally using a 5.6V series
Zener diode. Connecting the EN input through a
pull-up resistor to the voltage on VIN limits the
EN input current below 100µA. For example,
with 19V connected to VIN, RPULLUP ≥ (19V 5.6V) ÷ 100µA = 134kΩ.
Connecting the EN directly to a voltage source
without any pullup resistor requires limiting the
amplitude of the voltage source below 5.5V to
prevent damage to the Zener diode.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented
to prevent the chip from operating at an
insufficient supply voltage. The MP2314S
UVLO comparator monitors the output voltage
of the internal regulator (VCC). The UVLO
rising threshold is about 4.05V, while its falling
threshold is 3.3V.
Internal Soft Start (SS)
The soft start (SS) is implemented to prevent
the converter output voltage from overshooting
during start-up. When the chip starts, the
internal circuitry generates a soft-start voltage
that ramps up from 0V. The soft-start period
lasts until the voltage on the soft-start capacitor
exceeds the reference voltage of 0.791V. At
this point the reference voltage takes over. The
soft-start time is internally set to around 1.5ms.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
Output Over-Voltage Protection (OVP)
The MP2314S monitors the FB voltage to
detect output over-voltage. When the FB
voltage rises higher than 120% of the reference
voltage, the MP2314S enters a dynamic
regulation period. During this period, the IC
forces the low-side MOSFET (LS-FET) on until
a -800mA negative current limit is achieved.
This discharges the output to keep it within the
normal range. The MP2314S exits dynamic
regulation when FB falls below 109% of the
reference voltage.
Over-Current Protection (OCP) and Hiccup
The MP2314S uses a cycle-by-cycle overcurrent limit when the inductor current peak
value exceeds the set current-limit threshold.
The output voltage begins dropping until FB is
below the under-voltage (UV) threshold,
typically 50% below the reference. Once UV is
triggered, the MP2314S enters hiccup mode to
restart the part periodically. This protection
mode is especially useful when the output is
dead-shorted to ground. The average shortcircuit current is reduced greatly to alleviate the
thermal issue and protect the regulator. The
MP2314S exits hiccup mode once the overcurrent condition is removed.
Pre-Bias Start-Up
The MP2314S is designed for monotonic startup into pre-biased loads. If the output is prebiased to a certain voltage during start-up, the
BST voltage is refreshed and charged, and the
voltage on the soft-start capacitor is charged as
well. If the BST voltage exceeds its rising
threshold voltage and the soft-start capacitor
voltage exceeds the sensed output voltage at
FB, the part begins working normally.
Floating Driver and Bootstrap Charging
The floating power MOSFET driver is powered
by an external bootstrap capacitor. This floating
driver has its own UVLO protection with a rising
threshold of 2.2V and a hysteresis of 150mV.
The bootstrap capacitor voltage is regulated
internally by VIN through D1, R3, C3, L1, and C2
(see Figure 3). If VIN - VSW is more than 5V, U2
regulates M3 to maintain a 5V BST voltage
across C3.
R3
3
Figure 3: Internal Bootstrap Charging Circuit
Start-Up and Shutdown
If both VIN and EN are higher than their
appropriate thresholds, the chip starts up. The
reference block starts first, generating a stable
reference voltage and current. The internal
regulator is then enabled. The regulator
provides a stable supply for the remaining
circuitries.
Three events can shut down the chip: EN low,
VIN low, and thermal shutdown. In the shutdown
procedure, the signaling path is blocked first to
prevent any fault triggering. VCOMP and the
internal supply rail are then pulled down. The
floating driver is not subject to this shutdown
command.
Thermal Shutdown
Thermal shutdown is implemented to prevent
the chip from operating at exceedingly high
temperatures. When the silicon die temperature
is higher than 150°C, the entire chip shuts down.
When the temperature is lower than its lower
threshold, typically 130°C, the chip is enabled
again.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
An external resistor divider is used to set the
output voltage. The feedback resistor (R1) also
sets the feedback loop bandwidth with the
internal compensation capacitor (see Typical
Application on page 1). R2 can then be
calculated with Equation (1):
R2
R1
VOUT
1
0.791V
(1)
The T-type network is highly recommended
(see Figure 4).
FB
R1
RT
8
VOUT
R2
Figure 4: T-Type Network
Table 1 lists the recommended T-type resistor
values for common output voltages.
Table 1: Resistor Selection for Common Output
(7)
Voltages
VOUT (V)
1.05
1.2
1.8
2.5
3.3
5
R1 (kΩ)
20.5
20.5
40.2
40.2
40.2
40.2
R2 (kΩ)
62
39.2
31.6
18.7
12.7
7.5
IL(MAX) ILOAD
IL
2
(3)
Under light-load conditions below 100mA, a
larger inductance is recommended for better
efficiency.
Setting the AAM Voltage
The AAM voltage is used to set the transition
point from AAM to PWM. It should be chosen to
provide the best combination of efficiency,
stability, ripple, and transient.
If the AAM voltage is set low, then the stability
and ripple improve, but AAM mode and the
transient efficiency degrade. Likewise, if the
AAM voltage is set high, then AAM mode and
the transient efficiency improves, but stability
and ripple degrade.
Adjust the AAM threshold by connecting divider
resistors from VCC to GND. Note that there is a
6.7µA current source at AAM (see Figure 5).
Rt (kΩ)
100
75
59
40.2
33
20
NOTE:
8) The recommended parameters are based on a 44µF output
capacitor. A different input voltage, output inductor value, and
output capacitor value may affect the selection of R1, R2, and
Rt. For additional component parameters, please refer to the
Typical Application Circuits section on pages 15 and 16.
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
at least 25% percent higher than the maximum
load current is recommended for most
applications. For the highest efficiency, the
inductor DC resistance should be less than
20mΩ. For most designs, the inductance value
can be derived using Equation (2):
L1
Choose
the
inductor
current
to
be
approximately 40% of the maximum load
current. The maximum inductor peak current
can be calculated with Equation (3):
VOUT (VIN VOUT )
VIN IL fOSC
Figure 5: AAM Network
Generally, VAAM can be calculated with Equation
(4):
VAAM
R5 (VCC 6.7μA R 4 )
R 4 R5
(4)
R5 should be no larger than 20k.
(2)
Where ΔIL is the inductor ripple current.
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
The optimized AAM can be found in Figure 6.
0. 7
The input voltage ripple caused by the
capacitance can be estimated with Equation (7):
0. 6
VIN
0. 5
0. 4
0. 3
0. 2
0. 1
0
0
2
4
6
8
Figure 6: AAM Selection for Common Output
Voltages (VIN = 4.5V - 24V)
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires a
capacitor to supply AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for best
performance. Ceramic capacitors with X5R or
X7R dielectrics are highly recommended
because of their low ESR and small
temperature coefficients. For most applications,
a 22µF capacitor is sufficient.
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated with Equation (5):
I C1 ILOAD
VOUT VOUT
1
VIN
VIN
(5)
The worse case condition occurs at VIN =
2VOUT, shown in Equation (6):
IC1
I
LOAD
2
(6)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, a small, high-quality ceramic
capacitor (i.e.: 0.1μF) should be placed as close
to the IC as possible. When using ceramic
capacitors, ensure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input.
V
ILOAD
V
OUT 1 OUT
fS C1 VIN
VIN
(7)
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
recommended to keep the output voltage ripple
low. The output voltage ripple can be estimated
with Equation (8):
VOUT
VOUT VOUT
1
1
RESR
fS L1
VIN
8 fS C2
(8)
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the impedance at the
switching frequency is dominated by the
capacitance. The output voltage ripple is mainly
caused by the capacitance. For simplification,
the output voltage ripple can be estimated with
Equation (9):
ΔVOUT
V
VOUT
1 OUT
VIN
8 fS L1 C2
2
(9)
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated with
Equation (10):
ΔVOUT
VOUT
V
1 OUT
fS L1
VIN
RESR
(10)
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP2314S can be optimized for a wide range of
capacitance and ESR values.
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator. The applicable
conditions of the external BST diode are:
VOUT is 5V or 3.3V
Duty cycle is high: D =
VOUT
> 65%
VIN
MP2314S Rev. 1.0
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MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
R1
GND
C5
In these cases, an external BST diode is
recommended from VCC to BST (see Figure 7).
SW
7
6
5
2
3
4
R3
R6
8
R5
1
R2
C3
C4
R4
L1
C1A
R7
C1
Figure 7: Add Optional External Bootstrap Diode
to Enhance Efficiency
Vin
C2
The recommended external BST diode is
1N4148, and the recommended BST capacitor
is 0.1 - 1μF.
Vout
C 2A
GND
(8)
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For best results, refer to Figure 8 and
follow the guidelines below.
1. Keep the connection of the input ground
and GND as short and wide as possible.
VOUT
VCC
EN
2. Keep the connection of the input capacitor
and IN as short and wide as possible.
3. Place the VCC capacitor as close to VCC
and GND as possible.
4. Make the trace length of VCC - VCC
capacitor anode - VCC capacitor cathode IC GND as short as possible.
5. Ensure that all feedback connections are
short and direct.
6. Place
the
feedback
resistors
and
compensation components as close to the
IC as possible.
7. Route SW away from sensitive analog
areas, such as FB.
NOTE:
9) The recommended layout is based on Figure 9 on page 15.
GND
Figure 8: Sample Board Layout
Design Example
Table 2 is a design example following the
application guidelines for the specifications
below:
Table 2: Design Example
19V
VIN
5V
VOUT
2A
IO
The detailed application schematic is shown in
Figure 9. The typical performance and circuit
waveforms are shown in the Typical
Performance Characteristics section. For more
device applications, please refer to the related
evaluation board datasheets.
MP2314S Rev. 1.0
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12/18/2015
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© 2015 MPS. All Rights Reserved.
13
MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 9: VIN = 6.5V - 24V, VOUT = 5V, IOUT = 2A
Figure 10: VIN = 4.5V - 24V, VOUT = 3.3V, IOUT = 2A
Figure 11: VIN = 4.5V - 24V, VOUT = 2.5V, IOUT = 2A
MP2314S Rev. 1.0
www.MonolithicPower.com
12/18/2015
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© 2015 MPS. All Rights Reserved.
14
MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
Figure 12: VIN = 4.5V - 24V, VOUT = 1.8V, IOUT = 2A
Figure 13: VIN = 4.5V - 24V, VOUT = 1.2V, IOUT = 2A
Figure 14: VIN = 4.5V - 24V, VOUT = 1.05V, IOUT = 2A
MP2314S Rev. 1.0
www.MonolithicPower.com
12/18/2015
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© 2015 MPS. All Rights Reserved.
15
MP2314S – 2A, 24V, SYNCHRONOUS, STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSOT23-8
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
IAAAA
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL''A''
FRONT VIEW
SIDE VIEW
NOTE:
DETAIL ''A''
1) ALL DIMENSIONS ARE IN MILLIMETERS
.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY(BOTTOM OF LEADS
AFTER FORMING) SHALL BE 0.10 MILLIMETERS
MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP
MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2314S Rev. 1.0
www.MonolithicPower.com
12/18/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
16
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