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FDD6685

FDD6685

  • 厂商:

    MURATA-PS(村田)

  • 封装:

    TO252

  • 描述:

    类型:P沟道;漏源电压(Vdss):30V;连续漏极电流(Id):11A;40A;功率(Pd):1.6W;导通电阻(RDS(on)@Vgs,Id):20mΩ@11A,10V;

  • 数据手册
  • 价格&库存
FDD6685 数据手册
FDD6685 30V P-Channel PowerTrench MOSFET Features General Description This P-Channel MOSFET is a rugged gate version of Fairchild Semiconductor’s advanced PowerTrench • –40 A, –30 V. RDS(ON) = 20 mΩ @ VGS = –10 V RDS(ON) = 30 mΩ @ VGS = –4.5 V process. It has been optimized for power management • Fast switching speed applications requiring a wide range of gave drive • High performance trench technology for extremely low RDS(ON) voltage ratings (4.5V – 25V). • High power and current handling capability • Qualified to AEC Q101 S D G G S TO-252 D Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Drain-Source Voltage Ratings –30 Units VDSS VGSS Gate-Source Voltage ±25 V –40 –11 –100 A (Note 1) 52 W (Note 1a) 3.8 ID PD Parameter Continuous Drain Current @TC=25°C (Note 3) @TA=25°C (Note 1a) Pulsed, PW ≤ 100µs (Note 1b) Power Dissipation for Single Operation (Note 1b) TJ, TSTG Operating and Storage Junction Temperature Range V 1.6 –55 to +175 °C Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case (Note 1) 2.9 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 96 °C/W This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy of the requirements, see AEC Q101 at http://www.aecouncil.com/ Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html. All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification. 2004 Fairchild Semiconductor Corporation FDD6685 Rev D (W) FDD6685 February 2004 FDD6685 Package Marking and Ordering Information Device Marking Device Reel Size Tape Width Quantity FDD6685 FDD6685 13” 12mm 2500 units Electrical Characteristics Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 42 mJ –11 A Drain-Source Avalanche Ratings (Note 4) EAS IAS Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current ID = –11 A Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = –250 µA, Referenced to 25°C VDS = –24 V, VGS = 0 V –1 µA IGSS Gate–Body Leakage VGS = ±25V, VDS = 0 V ±100 nA On Characteristics –30 V –24 mV/°C (Note 2) VGS(th) ∆VGS(th) ∆TJ Gate Threshold Voltage VDS = VGS, ID = –250 µA Gate Threshold Voltage Temperature Coefficient ID = –250 µA, Referenced to 25°C 5 RDS(on) Static Drain–Source On–Resistance 14 21 20 ID(on) On–State Drain Current VGS = –10 V, ID = –11 A VGS = –4.5 V, ID = –9 A VGS = –10 V,ID = –11 A,TJ=125°C VGS = –10 V, VDS = –5 V gFS Forward Transconductance VDS = –5 V, ID = –11 A 26 VDS = –15 V, f = 1.0 MHz V GS = 0 V, 1715 pF 440 pF 225 pF VGS = 15 mV, f = 1.0 MHz 3.6 Ω VDD = –15 V, VGS = –10 V, ID = –1 A, RGEN = 6 Ω 17 31 ns 11 21 ns ns –1 –1.8 –3 V mV/°C mΩ 20 30 –20 A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance Switching Characteristics (Note 2) td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) Turn–Off Delay Time 43 68 tf Turn–Off Fall Time 21 34 ns Qg Total Gate Charge 17 24 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = –15V, VGS = –5 V ID = –11 A, 9 nC 4 nC Drain–Source Diode Characteristics and Maximum Ratings VSD Trr Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge VGS = 0 V, IS = –3.2 A IF = –11 A, diF/dt = 100 A/µs (Note 2) –0.8 –1.2 V 26 ns 13 nC FDD6685 Rev D (W) FDD6685 Electrical Characteristics TA = 25°C unless otherwise noted Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA = 40°C/W when mounted on a 1in2 pad of 2 oz copper b) RθJA = 96°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. Maximum current is calculated as: PD RDS(ON) where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. 4. Starting TJ = 25°C, L = 0.69mH, IAS = –11A FDD6685 Rev D (W) FDD6685 Typical Characteristics 40 2.4 VGS = -10V -4.5V -ID, DRAIN CURRENT (A) -6.0V NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.0V -5.0V 30 -3.5V 20 10 -3.0V 0 1 2 -VDS, DRAIN-SOURCE VOLTAGE (V) 1.8 -4.0V 1.6 -4.5V -5.0V 1.4 -6.0V 1.2 -8.0V -10V 1 0 3 Figure 1. On-Region Characteristics. 2 4 6 -ID, DRAIN CURRENT (A) 8 10 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 0.08 ID = -11.0A VGS = -10V ID = -5.5A RDS(ON), ON-RESISTANCE (OHM) NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2 0.8 0 1.4 1.2 1 0.8 0.6 0.06 0.04 o TA = 125 C 0.02 o TA = 25 C 0 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (oC) 150 175 2 Figure 3. On-Resistance Variation with Temperature. 4 6 8 -VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 40 100 VGS = 0V TA = -55oC o -IS, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) VGS = -3.5V 2.2 125 C 30 o 25 C 20 10 0 10 o TA = 125 C 1 25oC 0.1 -55oC 0.01 0.001 0.0001 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.4 Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD6685 Rev D (W) FDD6685 Typical Characteristics 2400 ID = -11.0 A f = 1MHz VGS = 0 V VDS = 10V 8 CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 10 30V 6 20V 4 1800 Ciss 1200 Coss 600 2 Crss 0 0 0 5 10 15 20 Qg, GATE CHARGE (nC) 25 30 0 Figure 7. Gate Charge Characteristics. 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 8. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 1000 100 1ms 10ms 100ms RDS(ON) LIMIT 10 100µs 1 10s DC 1 VGS = 10V SINGLE PULSE RθJA = 96oC/W 0.1 TA = 25oC 0.01 0.01 0.10 1.00 10.00 VDS, DRAIN-SOURCE VOLTAGE (V) 60 40 20 0 0.01 100.00 SINGLE PULSE RθJA = 96°C/W TA = 25°C 80 Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE ID, DRAIN CURRENT (A) 5 0.1 1 10 t1, TIME (sec) 100 1000 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA = 96 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 t1 0.01 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDD6685 Rev D (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FPS™ CROSSVOLT™ FRFET™ DOME™ GlobalOptoisolator™ EcoSPARK™ GTO™ E2CMOSTM HiSeC™ EnSignaTM I2C™ FACT™ ImpliedDisconnect™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I8
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