FDMC010N08LC

FDMC010N08LC N‐Channel Shielded Gate POWERTRENCH) MOSFET 80 V, 50 A, 10.9 mW General Description This N-Channel MV MOSFET is produced using ON Semiconductor’s advanced PowerTrench process that incorporates Shielded Gate technology. This process has been optimized to minimize on-state resistance and yet maintain superior switching performance with best in class soft body diode. www.onsemi.com VDS 80 V ID MAX 10.9 mW @ 10 V 50 A 18.4 mW @ 4.5 V Features • • • • • • • • RDS(ON) MAX Shielded Gate MOSFET Technology Max RDS(on) = 10.9 mW at VGS = 10 V, ID = 16 A Max RDS(on) = 18.4 mW at VGS = 4.5 V, ID = 13 A 50% Lower Qrr than Other MOSFET Suppliers Lowers Switching Noise/EMI MSL1 Robust Package Design 100% UIL Tested These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant S (1, 2, 3) G (4) D (5, 6, 7, 8) N-CHANNEL MOSFET Applications • • • • Pin 1 Primary DC−DC MOSFET Synchronous Rectifier in DC−DC and AC−DC Motor Drive Solar Top MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Symbol Value Unit VDS Drain to Source Voltage 80 V VGS Gate to Source Voltage ±20 V ID Parameter Drain Current: Continuous, TC = 25°C (Note 5) Continuous, TC = 100°C (Note 5) Continuous, TA = 25°C (Note 1a) Pulsed (Note 4) EAS Single Pulse Avalanche Energy (Note 3) PD Power Dissipation: TC = 25°C TA = 25°C (Note 1a) TJ, TSTG Operating and Storage Junction Temperature Range December, 2017 − Rev. 2 MARKING DIAGRAM S A S 50 32 11 200 S 96 mJ W 52 2.3 °C −55 to +150 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 2017 Bottom Power 33 (PQFN8) CASE 483AX 1 D $Y&Z&3&K FDMC010 N08LC G $Y &Z &3 &K FDMC010N08LC D D D = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 3 of this data sheet. Publication Order Number: FDMC010N08LC/D FDMC010N08LC THERMAL CHARACTERISTICS Symbol Parameter Value Unit °C/W RqJC Thermal Resistance, Junction to Case 2.4 RqJA Thermal Resistance, Junction to Ambient (Note 1a) 53 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V DBVDSS /DTJ Breakdown Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V 1 mA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 3.0 V BVDSS 80 V 76 mV/°C ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 90 mA DVGS(th) /DTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 90 mA, referenced to 25°C −5 RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 16 A 8.9 10.9 VGS = 4.5 V, ID = 13 A 12.5 18.4 VGS = 10 V, ID = 16 A, TJ = 125°C 15.0 17.6 gFS Forward Transconductance 1.0 VDS = 5 V, ID = 16 A 1.3 mV/°C 55 mW S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Crss Rg VDS = 40 V, VGS = 0 V, f = 1 MHz 1525 2135 pF Output Capacitance 369 515 pF Reverse Transfer Capacitance 20 30 pF 0.3 0.7 W 8 16 ns 3 10 ns Turn-Off Delay Time 27 44 ns Fall Time 5 10 ns VGS = 0 V to 10 V, VDD = 40 V, ID = 16 A 22 31 nC VGS = 0 V to 4.5 V, VDD = 40 V, ID = 16 A 11 15 nC Gate Resistance 0.1 SWITCHING CHARACTERISTICS td(on) tr td(off) tf Qg Turn-On Delay Time Rise Time Total Gate Charge VDD = 40 V, ID = 16 A, VGS = 10 V, RGEN = 6 W Qgs Gate to Source Charge VDD = 40 V, ID = 16 A 3 nC Qgd Gate to Drain “Miller” Charge VDD = 40 V, ID = 16 A 3 nC Qoss Output Charge VDD = 40 V, VGS = 0 V 21 nC Qsync Total Gate Charge Sync VDS = 0 V, ID = 16 A 19.5 nC www.onsemi.com 2 FDMC010N08LC ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) Symbol Parameter Test Condition Min Typ Max Unit VGS = 0 V, IS = 2 A (Note 2) 0.7 1.2 V VGS = 0 V, IS = 16 A (Note 2) 0.8 1.3 IF = 16 A, di/dt = 300 A/ms 15 27 ns 18 33 nC 12 21 ns 38 61 nC DRAIN-SOURCE DIODE CHARACTERISTICS VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge trr Reverse Recovery Time Qrr Reverse Recovery Charge IF = 16 A, di/dt = 1000 A/ms Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RqCA is determined by the user’s board design. NOTES: a) 53°C/W when mounted on a 1 in2 pad of 2 oz copper. b) 125°C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. 3. 4. 5. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%. EAS of 96 mJ is based on starting TJ = 25°C; N-ch: L = 3 mH, IAS = 8 A, VDD = 80 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 24 A. Pulsed Id please refer to Figure 11 SOA graph for more details. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. ORDERING INFORMATION Device Marking Package Reel Size Tape Width Quantity FDMC010N08LC FDMC010N08LC Power 33 (PQFN8) (Pb-Free / Halogen Free) 13″ 12 mm 3000 Units www.onsemi.com 3 FDMC010N08LC TYPICAL CHARACTERISTICS ID, DRAIN CURRENT (A) 120 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE (TJ = 25°C unless otherwise noted) VGS = 10 V VGS = 6 V 90 VGS = 4.5 V 60 VGS = 3.5 V VGS = 3 V 30 PULSE DURATION = 80 m s DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 4 VGS = 3 V VGS = 3.5 V 3 VGS = 4.5 V VGS = 6 V 2 1 PULSE DURATION = 80 m s DUTY CYCLE = 0.5% MAX 0 0 30 Figure 1. On Region Characteristics rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 SOURCE ON−RESISTANCE (mW) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE 150 ID = 16 A VGS = 10 V 0.6 −75 −50 −25 120 ID = 16 A 90 60 TJ = 125 oC 30 TJ = 25 oC 0 25 50 75 0 100 125 150 0 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TJ = −55oC TJ = 150 oC TJ = 25 oC 30 1 2 3 4 5 4 6 8 10 Figure 4. On-Resistance vs. Gate to Source Voltage PULSE DURATION = 80 m s DUTY CYCLE = 0.5% MAX VDS = 5 V 60 2 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On-Resistance vs. Junction Temperature 90 120 PULSE DURATION = 80m s DUTY CYCLE = 0.5% MAX TJ, JUNCTION TEMPERATURE (5C) 120 90 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 2.0 0 60 ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 1.8 VGS = 10 V 200 100 10 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = −55oC 0.01 0.001 0.0 6 VGS = 0 V VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current www.onsemi.com 4 1.2 FDMC010N08LC TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) 5000 Ciss ID = 16 A 1000 8 VDD = 40 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 50 V VDD = 30 V 4 Coss 100 Crss 10 2 f = 1 MHz VGS = 0 V 0 0 5 10 15 20 1 0.1 25 1 10 80 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage 50 60 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) RqJC = 2.4 oC/W TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 50 VGS = 10 V 40 30 20 VGS = 4.5 V 10 1 0.001 0.01 0.1 1 10 0 25 50 50 Figure 9. Unclamped Inductive Switching Capability 125 150 10000 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 100 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 500 100 10 m s 10 100 m s THIS AREA IS LIMITED BY RDS(on) 1 75 TC, CASE TEMPERATURE (5C) tAV, TIME IN AVALANCHE (ms) SINGLE PULSE TJ = MAX RATED RqJC = 2.4 oC/W TC = 25 oC 0.1 0.1 1 1 ms CURVE BENT TO MEASURED DATA 10 10 ms 100 ms/DC 100 SINGLE PULSE RqJC = 2.4 oC/W TC = 25 oC 1000 100 10 −5 10 500 −4 10 −3 10 −2 10 −1 10 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation www.onsemi.com 5 1 FDMC010N08LC TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE−DESCENDING ORDER 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 0.01 0.001 −5 10 PDM t1 t2 NOTES: SINGLE PULSE ZqJC(t) = r(t) x RqJC RqJC = 2.4 oC/W Peak TJ = PDM x ZqJC (t) + TC Duty Cycle, D = t1 / t2 −4 10 −3 −2 10 10 −1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS PQFN8 3.3X3.3, 0.65P CASE 483AX ISSUE B DOCUMENT NUMBER: DESCRIPTION: 98AON13673G PQFN8 3.3X3.3, 0.65P DATE 24 JUN 2022 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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