FDMC86340

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMC86340 N-Channel Shielded Gate Power Trench® MOSFET 80 V, 48 A, 6.5 mΩ Features General Description „ Shielded Gate MOSFET Technology This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for the on-state resistance and yet maintain superior switching performance. „ Max rDS(on) = 6.5 mΩ at VGS = 10 V, ID = 14 A „ Max rDS(on) = 8.5 mΩ at VGS = 8 V, ID = 12 A „ High performance technology for extremely low rDS(on) „ Termination is Lead-free Application „ RoHS Compliant „ DC-DC Conversion Pin 1 Pin 1 S D D D Top S S S D S D S D G D G D Bottom Power 33 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TC = 25 °C -Continuous TA = 25 °C -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C Ratings 80 Units V ±20 V 48 (Note 1a) 14 (Note 4) 200 (Note 3) 216 54 (Note 1a) Operating and Storage Junction Temperature Range 2.3 -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient (Note 1) 2.3 (Note 1a) 53 °C/W Package Marking and Ordering Information Device Marking FDMC86340 Device FDMC86340 ©2013 Fairchild Semiconductor Corporation FDMC86340 Rev. C2 Package Power33 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC86340 N-Channel Shielded Gate Power Trench® MOSFET January 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 64 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 4.0 V 80 V 46 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C VGS = 10 V, ID = 14 A 5.0 6.5 rDS(on) Static Drain to Source On Resistance VGS = 8 V, ID = 12 A 6.0 8.5 VGS = 10 V, ID = 14 A, TJ = 125 °C 8.5 11 VDD = 10 V, ID = 14 A 36 gFS Forward Transconductance 2.0 3.4 -10 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 40 V, VGS = 0 V, f = 1 MHz 0.1 2775 3885 pF 468 655 pF 15 25 pF 0.7 2.1 Ω Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time VDD = 40 V, ID = 14 A, VGS = 10 V, RGEN = 6 Ω Qg(TOT) Total Gate Charge VGS = 0 V to 10 V Qg(TOT) Total Gate Charge VGS = 0 V to 8 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge Qoss Output Charge VDD = 40 V, ID = 14 A 20 32 ns 7.9 16 ns 23 37 ns 5.1 10 ns 38 53 nC 31 44 14 VDD = 40 V, VGS = 0 V nC nC 8.0 nC 42 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 14 A (Note 2) 0.8 1.3 VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2 V 41 66 ns 25 40 nC IF = 14 A, di/dt = 100 A/μs V Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 53 °C/W when mounted on a 1 in2 pad of 2 oz copper b. 125 °C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 216 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 12 A, VDD = 80 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 37 A. 4. Pulsed Id limited by junction temperature, td