FDMT80040DC

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET 40 V, 420 A, 0.56 mΩ Features General Description „ Max rDS(on) = 0.56 mΩ at VGS = 10 V, ID = 64 A „ Max rDS(on) = 0.9 mΩ at VGS = 6 V, ID = 47 A „ Advanced Package and Silicon Combination for Low rDS(on) and High Efficiency „ Next Generation Enhanced Engineered for Soft Recovery Body Diode This N-Channel MOSFET is produced using Fairchild process. Semiconductor’s advanced PowerTrench® Advancements in both silicon and Dual CoolTM package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance by extremely low Junction-to-Ambient thermal resistance. Technology, „ Low Profile 8x8mm MLP Package Applications „ MSL1 Robust Package Design „ OringFET / Load Switching „ 100% UIL Tested „ Synchronous Rectification „ RoHS Compliant „ DC-DC Conversion Pin 1 G Pin 1 S S S S D Top D D D Dual CoolTM 88 G D S D S D S D Bottom MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous ID TC = 25 °C TJ, TSTG ±20 V (Note 5) 420 TC = 100 °C (Note 5) 265 -Continuous TA = 25 °C (Note 1a) 64 -Pulsed PD Units V -Continuous Single Pulse Avalanche Energy EAS Ratings 40 Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C (Note 4) 2644 (Note 3) 2773 156 (Note 1a) Operating and Storage Junction Temperature Range 3.2 -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case (Top Source) 1.6 RθJC Thermal Resistance, Junction-to-Case (Bottom Drain) 0.8 RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 38 RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 81 RθJA Thermal Resistance, Junction-to-Ambient (Note 1i) 15 RθJA Thermal Resistance, Junction-to-Ambient (Note 1j) 21 RθJA Thermal Resistance, Junction-to-Ambient (Note 1k) 9 °C/W Package Marking and Ordering Information Device Marking 80040DC Device FDMT80040DC ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 Package Dual CoolTM 88 1 Reel Size 13” Tape Width 13.3 mm Quantity 3000 units www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET July 2016 Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 32 V, VGS = 0 V 10 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 4.0 V 40 V 21 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C VGS = 10 V, ID = 64 A 0.44 rDS(on) Static Drain to Source On Resistance VGS = 6 V, ID = 47 A 0.63 0.9 VGS = 10 V, ID = 64 A, TJ = 125 °C 0.66 0.84 VDS = 5 V, ID = 64 A 278 gFS Forward Transconductance 2.0 2.7 -9 mV/°C 0.56 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 20 V, VGS = 0 V, f = 1 MHz 0.1 18650 26110 pF 5540 7760 pF 304 1210 pF 1.8 3.6 Ω 63 101 ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time VDD = 20 V, ID = 64 A, VGS = 10 V, RGEN = 6 Ω 62 100 ns 101 162 ns 43 69 ns 241 338 nC 149 209 tf Fall Time Qg(TOT) Total Gate Charge VGS = 0 V to 10 V Qg(TOT) Total Gate Charge VGS = 0 V to 6 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = 20 V, ID = 64 A nC 76 nC 35 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 VGS = 0 V, IS = 2.6 A (Note 2) 0.67 1.1 VGS = 0 V, IS = 64 A (Note 2) 0.77 1.2 IF = 64 A, di/dt = 100 A/μs 2 V 94 151 ns 219 351 nC www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted. RθJC Thermal Resistance, Junction-to-Case (Top Source) 1.6 RθJC Thermal Resistance, Junction-to-Case (Bottom Drain) 0.8 RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 38 RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 81 RθJA Thermal Resistance, Junction-to-Ambient (Note 1c) 26 RθJA Thermal Resistance, Junction-to-Ambient (Note 1d) 34 RθJA Thermal Resistance, Junction-to-Ambient (Note 1e) 14 RθJA Thermal Resistance, Junction-to-Ambient (Note 1f) 16 RθJA Thermal Resistance, Junction-to-Ambient (Note 1g) 26 RθJA Thermal Resistance, Junction-to-Ambient (Note 1h) 60 RθJA Thermal Resistance, Junction-to-Ambient (Note 1i) 15 RθJA Thermal Resistance, Junction-to-Ambient (Note 1j) 21 RθJA Thermal Resistance, Junction-to-Ambient (Note 1k) 9 RθJA Thermal Resistance, Junction-to-Ambient (Note 1l) 11 °C/W NOTES: 1. RθJA is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. RθCA is determined by the user's board design. b. 81 °C/W when mounted on a minimum pad of 2 oz copper a. 38 °C/W when mounted on a 1 in2 pad of 2 oz copper DS SS SF G DS DF SS SF G c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper g. 200FPM Airflow, No Heat Sink,1 in2 pad of 2 oz copper h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 2773mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 43 A, VDD = 40 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 93 A. 4. Pulsed Id please refer to Fig 11 SOA graph for more details. 5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design. ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 3 www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET Thermal Characteristics VGS = 10 V VGS = 6 V 240 VGS = 5 V VGS = 4.5 V 160 VGS = 4.2 V 80 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 10 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 320 8 6 VGS = 4.5 V 4 VGS = 5 V 2 VGS = 6 V VGS = 10 V 0 5 0 80 VDS, DRAIN TO SOURCE VOLTAGE (V) rDS(on), DRAIN TO 1.0 0.8 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 1.2 0.6 -75 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TJ = 25 oC 80 TJ = -55 oC 3 4 1.5 TJ = 125 oC 1.0 0.5 TJ = 25 oC 3 4 5 6 7 8 9 5 VGS = 0 V 100 10 TJ = 150 oC 1 TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 6 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 10 320 160 2 2.0 Figure 4. On-Resistance vs. Gate to Source Voltage TJ = 150 oC 0 ID = 64 A VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VDS = 5 V 240 320 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2.5 0.0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On Resistance vs. Junction Temperature 320 240 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage ID = 64 A VGS = 10 V 1.4 160 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 1.6 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 4.2 V 4 1.2 www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 50000 Ciss ID = 64 A VDD = 15 V 8 10000 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 20 V 6 VDD = 25 V 4 Coss 1000 2 0 f = 1 MHz VGS = 0 V 0 50 100 150 200 Crss 100 0.1 250 1 10 40 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 300 500 100 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) o RθJC = 0.8 C/W TJ = 25 oC TJ = 100 oC 10 TJ = 125 1 0.1 1 10 oC 100 1000 400 VGS = 10 V 300 200 VGS = 6 V 100 0 25 10000 50 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 150 100000 1000 10 μs 100 1 ms SINGLE PULSE TJ = MAX RATED RθJC = 0.8 oC/W 10 ms CURVE BENT TO MEASURED DATA 1 10 DC 100 300 TC = 25 oC 1000 100 10 -5 10 -4 10 -3 10 -2 10 -1 10 1 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 SINGLE PULSE RθJC = 0.8 oC/W 10000 100 μs THIS AREA IS LIMITED BY rDS(on) TC = 25 oC 0.1 0.1 125 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 10000 1 100 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 10 75 o tAV, TIME IN AVALANCHE (ms) Figure 12. Single Pulse Maximum Power Dissipation 5 www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 0.01 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZθJC(t) = r(t) x RθJC RθJC = 0.8 oC/W Peak TJ = PDM x ZθJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 -5 10 -4 10 -3 -2 10 10 -1 10 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Case Transient Thermal Response Curve ©2016 Fairchild Semiconductor Corporation FDMT80040DC Rev.1.0 6 www.fairchildsemi.com FDMT80040DC N-Channel Dual CoolTM 88 PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. (2X) 0.05 C 8.00±0.10 8 A 5 8 B 8.00 6.90 2.00 5 1.10 KEEP OUT AREA 5.23 4.24 3.94 PKG CL 8.00±0.10 9.00 (1.83) 1.55 (2.41) 1 4 PKG CL 4.03 3.68 0.05 C 1.13 1 (2X) 1.10 (1.56) (8X) SEE DETAIL A (1.00) 5.10 7.10 4 0.48 LAND PATTERN RECOMMENDATION 0.30 0.20 0.95 0.75 0.10 .05 6.00 2.00 (0.50) PIN #1 IDENT 1 (0.40) 2 3 4 C A B C 1.10 8X 0.90 0.70 0.50 1.68 1.48 1.20 (0.91) 2.78 (1.23) 8 (0.60) 7 7.00 6.80 6 5 0.45 0.25 (4X) 5.33 5.13 0.05 0.00 C SEATING PLANE SCALE: 2X NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE IS NOT PRESENTLY REGISTERED WITH ANY STANDARDS COMMITTEE. B) DIMENSIONS ARE INCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS. C) ALL DIMENSIONS ARE IN MILLIMETERS. D) DRAWING CONFORMS TO ASME Y14.5M-2009. E) IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUR AREA. F) DRAWING FILENAME: MKT-PQFN08RREV2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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