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FOD8318
2.5 A Output Current, IGBT Drive Optocoupler
with Active Miller Clamp, Desaturation Detection, and
Isolated Fault Sensing
Features
High noise immunity characterized by common mode
rejection
– 35 kV / µs Minimum Common Mode Rejection
(Vcm = 1500 Vpeak)
2.5 A peak output current driving capability for most
1200 V / 150 A IGBT
Optically isolated fault sensing feedback
Active Miller clamp to shut off the IGBT during high
dv/dt without needing a negative supply voltage
“Soft” IGBT turn-off
Built-in IGBT protection
– Desaturation detection
– Under-voltage lock out (UVLO) protection
Wide supply voltage range from 15 V to 30 V
– Use of P-Channel MOSFETs at output stage
enables output voltage swing close to the supply
rail (rail-to-rail output)
3.3 V / 5 V, CMOS/TTL-compatible inputs
High Speed
– 250 ns max. propagation delay over full operating
temperature range
Extended industrial temperate range, -40°C to 100°C
temperature range
Safety and regulatory approvals
– UL1577, 4,243 VRMS for 1 min.
– DIN EN/IEC 60747-5-5,1,414 Vpeak working
insulation voltage, 8000 Vpeak transient isolation
voltage ratings
RDS(ON) of 1 Ω (typ.) offers lower power dissipation
User configurable: inverting, non-inverting, auto-reset,
auto-shutdown
8 mm creepage and clearance distances
Description
The FOD8318 is an advanced 2.5 A output current
IGBT drive optocoupler capable of driving most
1200 V / 150 A IGBTs. It is ideally suited for fast-switching driving of power IGBTs and MOSFETs used in motor
control inverter applications and high-performance
power systems. It consists of an integrated gate drive
optocoupler featuring low RDS(ON) CMOS transistors to
drive the IGBT from rail to rail and an integrated highspeed isolated feedback for fault sensing. The FOD8318
has an active Miller clamp fuction to shut off the IGBT
during a high dv/dt situation without the need of a negative supply voltage. It offers critical protection features
necessary for preventing fault conditions that lead to
destructive thermal runaway of IGBTs.
It utilizes ON’s proprietary Optoplanar® coplanar packaging technology and optimized IC design to achieve high
noise immunity, characterized by high common mode
rejection and power supply rejection specifications.
The device is housed in a compact 16-pin small outline
plastic package that meets the 8 mm creepage and
clearance requirements.
Applications
Industrial inverter
Induction heating
Isolated IGBT drive
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
October 2017
VIN+
VIN–
UVLO
(VDD2 – VE)
X
X
Active
X
X
LOW
X
X
X
Yes
LOW
LOW
LOW
X
X
X
X
LOW
X
HIGH
X
X
X
LOW
HIGH
LOW
Not Active
No
HIGH
HIGH
DESAT
Detected?
FAULT
VOUT*
*VOUT is always LOW with ‘clamp’ being active (gate voltage < 2 V above VSS).
Pin Definitions
Pin #
Name
Description
1
VIN+
Non-inverting gate drive control input
2
VIN–
Inverting gate drive control input
3
VDD1
Positive input supply voltage (3 V to 5.5 V)
4
GND1
Input ground
5
RESET
Fault reset input
6
FAULT
Fault output
7
VLED1+
LED 1 anode (must be left unconnected)
8
VLED1-
LED 1 cathode (must be connected to ground)
9
VSS
10
VCLAMP
11
VO
Gate drive output voltage
12
VS
Source of pull-up PMOS transistor
13
VDD2
14
DESAT
Desaturation voltage input
15
VLED2+
LED 2 anode (must be left unconnected)
16
VE
Output supply voltage (negative)
Active Miller clamp supply voltage
Positive output supply voltage
Output supply voltage / IGBT emitter
VIN+
1
16 VE
VIN–
2
15 VLED2+
VDD1
3
14 DESAT
GND1
4
13 VDD2
RESET
5
12 VS
FAULT
6
11 VO
VLED1+
7
10 VSS
VLED1-*
8
9
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
VSS
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2
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Truth Table
VLED1+
7
Output IC
VDD1 3
13
Input IC
12
VIN+ 1
VIN– 2
VDD2
VS
FAULT 6
GND1
VLED1–
Driver
LED1
Gate Drive
Optocoupler
11
UVLO
4
8
Shield
DESAT
9
14
RESET
VO
5
Fault
16
LED2
10
VSS
DESAT
VE
VCLAMP
Miller
Clamp
Fault Sense
Optocoupler
VSS
Shield
15
VLED2+
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
3
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Block Diagram
As per DIN EN/IEC 60747-5-5. This optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For Rated Mains Voltage < 150 Vrms
I–IV
For Rated Mains Voltage < 300 Vrms
I–IV
For Rated Mains Voltage < 450 Vrms
I–IV
For Rated Mains Voltage < 600 Vrms
I–IV
For Rated Mains Voltage < 1000 Vrms
I–III
Climatic Classification
40/100/21
Pollution Degree (DIN VDE 0110/1.89)
2
CTI
Comparative Tracking Index
175
VPR
Input to Output Test Voltage, Method b,
VIORM x 1.875 = VPR, 100 % Production Test with
tm = 1 s, Partial Discharge < 5 pC
2,651
Vpeak
Input to Output Test Voltage, Method a,
VIORM x 1.5 = VPR, Type and Sample Test with
tm = 60 s, Partial Discharge < 5 pC
2,121
Vpeak
VIORM
Maximum Working Insulation Voltage
1,414
Vpeak
VIOTM
Highest Allowable Over Voltage
8,000
Vpeak
External Creepage
8
mm
External Clearance
8
mm
Insulation Thickness
0.5
mm
Case Temperature
150
°C
Input Power
100
mW
Output Power
600
mW
109
Ω
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure
TCase
PS,INPUT
PS,OUTPUT
RIO
Insulation Resistance at TS, VIO = 500 V
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
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4
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Safety and Insulation Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Value
Units
TSTG
Storage Temperature
-40 to +125
ºC
TOPR
Operating Temperature
-40 to +100
ºC
Junction Temperature
-40 to +125
ºC
Lead Wave Solder Temperature
(no solder immersion)
260 for 10 s
ºC
15
mA
3
A
0 to 15
V
TJ
TSOL
Refer to page 28 for reflow temperature profile.
IFAULT
Fault Output Current
Current(1)
IO(PEAK)
Peak Output
VE – VSS
Negative Output Supply Voltage(2)
VDD2 – VE
Positive Output Supply Voltage
VO(peak)
VDD2 – VSS
VDD1
VIN+, VIN- and VRESET
VFAULT
VS
-0.5 to 35 – (VE – VSS)
V
Gate Drive Output Voltage
-0.5 to 35
V
Output Supply Voltage
-0.5 to 35
V
-0.5 to 6
V
Input Voltages
Positive Input Supply Voltage
-0.5 to VDD1
V
Fault Pin Voltage
-0.5 to VDD1
V
VSS + 6.5 to VDD2
V
VE to VE +25
V
Source of Pull-up PMOS Transistor Voltage
VDESAT
DESAT Voltage
ICLAMP
Peaking Clamping Sinking Current
VCLAMP
Miller Clamping Voltage
PDI
PDO
Input Power
Dissipation(3)(5)
Output Power
Dissipation(4)(5)
1.7
A
-0.5 to VDD2
V
100
mW
600
mW
Notes:
1. Maximum pulse width = 10 µs, maximum duty cycle = 0.2 %.
2. This negative output supply voltage is optional. It’s only needed when negative gate drive is implemented. A schottky
diode is recommended to be connected between VE and VSS to protect against a reverse voltage greater than 0.5 V.
Refer to application information, “6. Active Miller Clamp Function” on page 25.
3. No derating required across temperature range.
4. Derate linearly above 64 °C, free air temperature at a rate of 10.2 mW/°C
5. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
5
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Absolute Maximum Ratings (TA = 25 ºC unless otherwise specified)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
TA
Min.
Max.
Unit
-40
+100
ºC
Input Supply Voltage
3
5.5
V
Total Output Supply Voltage
15
30
V
0
15
V
15
30 – (VE – VSS)
V
VSS + 7.5
VDD2
V
Ambient Operating Temperature
(6)
VDD1
VDD2 – VSS
VE – VSS
VDD2 – VE
VS
Parameter
Negative Output Supply Voltage
Positive Output Supply Voltage
(6)
Source of Pull-up PMOS Transistor Voltage
Note:
6. During power up or down, it is important to ensure that VIN+ remains LOW until both the input and output supply
voltages reach the proper recommended operating voltage to avoid any momentary instability at the output state.
Refer to “Time to Good Power” section on page 25.
Isolation Characteristics
Apply over all recommended conditions, typical value is measured at TA = 25 ºC
Symbol
Parameter
Conditions
Min.
4,243
VISO
Input-Output Isolation
Voltage
TA = 25 ºC, R.H.< 50 %, t = 1.0 min,
II-O ð 10 µA, 50 Hz(7)(8)(9)
RISO
Isolation Resistance
VI-O = 500 V(7)
CISO
Isolation Capacitance
VI-O = 0 V, freq = 1.0
MHz(7)
Typ.
Max.
Units
VRMS
1011
Ω
1
pF
Notes:
7. Device is considered a two terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together.
8. 4,243 VRMS for 1-minute duration is equivalent to 5,091 VRMS for 1-second duration.
9. The Input-Output Isolation Voltage is a dielectric voltage rating as per UL1577. It should not be regarded as an
input-output continuous voltage rating. For the continuous working voltage rating, refer to the equipment level safety
specification or DIN EN/IEC 60747-5-5 Safety and Insulation Ratings Table on page 4.
Electrical Characteristics
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
Symbol
VIN+L,
VIN-L,
VRESETL
Parameter
Conditions
Min.
Typ.
Logic Low Input Voltages
0.8
VIN+H,
Logic High Input Voltages
VIN-H,
VRESETH
IIN+L, IIN-L, Logic Low Input Currents
IRESETL
Max.
2.0
Units Figure
V
V
VIN = 0.4 V
-0.5
-0.001
mA
IFAULTL
FAULT Logic Low Output
Current
VFAULT = 0.4 V
5.0
12.0
mA
1, 35
IFAULTH
FAULT Logic High Output
Current
VFAULT = VDD1
-40
0.002
µA
35
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
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6
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Recommended Operating Conditions
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
Symbol
IOH
Parameter
High Level Output Current
Conditions
VO = VDD2 – 3 V
(10)
IOL
Low Level Output Current
Min.
Typ.
-1
-2.5
VO = VDD2 – 6 V
-2.5
VO = VSS + 3 V
1
(11)
VO = VSS + 6 V
2.5
70
Max.
Units Figure
A
2, 7, 36
A
3
A
3, 37
A
IOLF
Low Level Output Current
During Fault Condition
VO – VSS = 14 V
VOH
High Level Output Voltage
IO = –100 mA
(12)(13)(14)
VOL
Low Level Output Voltage
IO = 100 mA
0.1
IDD1H
High Level Supply Current
VIN+ = VDD1 = 5.5 V,
VIN– = 0 V
IDD1L
Low Level Supply Current
VIN+ = VIN- = 0 V,
VDD1 = 5.5 V
IDD2H
High Level Output Supply
Current
IDD2L
Low Level Output Supply
Current
125
170
mA
4, 41
V
5, 7, 38
0.5
V
6, 8, 38
14
17
mA
9, 39
2
3
mA
VO = Open(14)
1.7
3
mA
VO = Open
1.8
2.8
mA
VS – 1.0 V VS – 0.5 V
10, 11,
40
ISH
High Level Source Current
IO = 0 mA
0.65
1.5
mA
40
ISL
Low Level Source Current
IO = 0 mA
0.6
1.4
mA
40
IEL
VE Low Level Supply Current
13, 40
IEH
VE High Level Supply Current
V(14)(15)
Blanking Capacitor Charge
Current
VDESAT = 2
IDSCHG
Blanking Capacitor
Discharge Current
VDESAT = 7 V
VUVLO+
Under-Voltage Lockout
Threshold(14)
ICHG
VUVLO-
UVLOHYS Under-Voltage Lockout
Threshold Hysteresis
VDESAT
DESAT Threshold(14)
VCLAMP_
Clamping Threshold Voltage
-0.8
-0.5
mA
-0.5
-0.25
mA
-0.13
-0.25
10
36
-0.33
mA
12, 41
mA
41
15, 29,
42
VO > 5 V at 25 °C
10.8
11.7
12.7
V
VO < 5 V at 25 °C
9.8
10.7
11.7
V
At 25 °C
0.4
1.0
VDD2 – VE > VUVLO- ,
VO < 5 V
6.0
6.5
V
7.2
V
16, 41
2.2
V
33, 52
1.2
A
32, 51
THRES
ICLAMPL
Clamp Low Level Sinking
Current
VO = VSS + 2.5 V
0.35
Notes:
10. Maximum pulse width = 10 µs, maximum duty cycle = 0.2 %.
11. Maximum pulse width = 4.99 ms, maximum duty cycle = 99.8 %.
12. VOH is measured with the DC load current in this testing (maximum pulse width = 1 ms, maximum duty cycle = 20 %).
When driving capacitive loads, VOH approaches VDD as IOH approaches zero units.
13. Positive output supply voltage (VDD2 – VE) should be at least 15 V. This ensures adequate margin in excess of the
maximum under-voltage lockout threshold VUVLO+ of 13.5 V.
14. When VDD2 – VE > VUVLO and output state VO of the FOD8318 is allowed to go HIGH, the DESAT detection feature
is active and provides the primary source of IGBT protection. UVLO is needed to ensure DESAT detection is
functional.
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
7
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Electrical Characteristics (Continued)
Switching Characteristics
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units Figure
tPHL
Propagation Delay Time to
Logic Low Output(17)
Rg = 10 Ω, Cg = 10 nF,
140
250
ns
tPLH
Propagation Delay Time to
Logic High Output(18)
f = 10 kHz,
Duty Cycle = 50 %(16)
160
250
ns
PWD
Pulse Width Distortion,
| tPHL – tPLH|(19)
20
100
ns
150
ns
PDD Skew
Propagation Delay Difference
Between Any Two Parts or
Channels, ( tPHL – tPLH)(20)
–150
tR
Output Rise Time (10 % – 90 %)
25
ns
tF
Output Fall Time (90 % – 10 %)
25
ns
tDESAT(90 %)
DESAT Sense to 90 % VO
Delay(21)
tDESAT(10 %)
43, 53
450
700
ns
23, 44
DESAT Sense to 10 % VO
Delay(21)
2.7
4.0
µs
24, 26,
27, 44
DESAT Sense to Low Level FAULT
Signal Delay(22)
1.4
5.0
µs
25, 44,
54
tDESAT(LOW)
DESAT Sense to DESAT Low
Propagation Delay(23)
250
ns
44
tRESET(FAULT)
RESET to High Level FAULT
Signal Delay(24)
µs
28, 45,
54
tDESAT(MUTE)
tDESAT(FAULT)
Rg = 10 Ω, Cg = 10 nF,
VDD2 – VSS = 30 V
17, 18,
19, 20,
21, 22,
43, 51
3
6
20
22
35
DESAT Input Mute
10
PWRESET
RESET Signal Pulse Width
1.2
tUVLO ON
UVLO Turn On Delay(25)
tUVLO OFF
Delay(26)
tGP
UVLO Turn Off
Time to Good
Power(27)
VDD2 = 20 V in
1.0ms Ramp
VDD2 = 0 to 30 V in
10 µs Ramp
µs
µs
4
µs
29, 46
3
µs
2.5
µs
30, 31,
46
| CMH |
Common Mode Transient
Immunity at Output High
TA = 25 ºC, VDD1 = 5 V,
VDD2 = 25 V,
VSS = Ground,
VCM = 1500 Vpeak(28)
35
50
kV/µs
48, 49
| CML |
Common Mode Transient
Immunity at Output Low
TA = 25 ºC, VDD1 = 5 V,
VDD2 = 25 V,
VSS = Ground,
VCM = 1500 Vpeak(29)
35
50
kV/µs
47, 50
Notes:
16. This load condition approximates the gate load of a 1200 V / 150 A IGBT.
17. tPHL propagation delay is measured from the 50 % level on the falling edge of the input pulse (VIN+, VIN-) to the 50 %
level of the falling edge of the VO signal. Refer to Figure 53.
18. tPHL propagation delay is measured from the 50 % level on the rising edge of the input pulse (VIN+, VIN-) to the 50 %
level of the rising edge of the VO signal. Refer to Figure 53.
19. PWD is defined as | tPHL – tPLH | for any given device.
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
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8
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
15. The blanking time, tBLANK, is adjustable by an external capacitor (CBLANK) where tBLANK = CBLANK * (VDESAT / ICHG).
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
9
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
20. The difference between tPHL and tPLH between any two FOD8318 parts under same operating conditions, with equal
loads.
21. This is the amount of time the DESAT threshold must be exceeded before VO begins to go LOW. This is supply
voltage dependent. Refer to Figure 54.
22. This is the amount of time from when the DESAT threshold is exceeded, until the FAULT output goes LOW.
Refer to Figure 54.
23. This is the amount of time the DESAT threshold must be exceeded before VO begins to go LOW and the FAULT
output to go LOW. Refer to Figure 54.
24. This is the amount of time from when RESET is asserted LOW, until FAULT output goes HIGH. Refer to Figure 54.
25. tUVLO ON UVLO turn-on delay is measured from VUVLO+ threshold voltage of the output supply voltage (VDD2) to the
5 V level of the rising edge of the VO signal.
26. tUVLO OFF UVLO turn-off delay is measured from VUVLO– threshold voltage of the output supply voltage (VDD2) to
the 5 V level of the falling edge of the VO signal.
27. tGP time to good power is measured from 13.5 V level of the rising edge of the output supply voltage (VDD2) to the
5 V level of the rising edge of the VO signal.
28. Common mode transient immunity at output HIGH state is the maximum tolerable negative dVcm / dt on the trailing
edge of the common mode pulse, VCM, to assure that the output remains in HIGH state (i.e., VO > 15 V or FAULT
> 2 V).
29.Common mode transient immunity at output LOW state is the maximum positive tolerable dVcm / dt on the leading
edge of the common mode pulse, VCM, to assure that the output remains in a LOW state (i.e., VO < 1.0 V or FAULT
< 0.8 V).
IOH - HIGH LEVEL OUTPUT CURRENT (A)
IFAULTL - FAULT CURRENT (mA)
50
40
30
20
VDD1 = 5 V
VIN+ = 5 V
10
ILED2+ = 10 mA
TA = 25 °C
0
0
1
2
3
4
5
7
6
5
VO = VDD2 - 6 V
4
3
VO = VDD2 - 3 V
2
VDD2 - VSS = 30 V
1
VDD1 = 5 V
0
-40
-20
VFAULTL - FAULT VOLTAGE (V)
7
VO = VSS + 6 V
5
4
VO = VSS + 3 V
3
2
VDD2 - VSS = 30 V
1
VDD1 = 5 V
0
-40
-20
0
20
40
60
80
DURING FAULT CONDITION (mA)
6
60
80
100
TA = -40 °C
125
TA = 25 °C
TA = 100 °C
100
75
VDD2 - VSS = 30 V
VDD1 = 5 V
50
100
0
5
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
IO = -650 µA
IO = -100 mA
-0.1
-0.2
-0.3
VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
-0.5
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
20
25
30
0.25
0.20
0.15
IO = 100 mA
0.10
0.05
VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 0 V
0.00
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
Figure . High Level Output Voltage Drop (VOHVDD) vs. Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
15
Figure . Low Level Output Current During Fault
Condition (IOLF) vs. Output Voltage (VOL)
0.1
0.0
10
VO - OUTPUT VOLTAGE (V)
Figure . Low Level Output Current (IOL)
vs. Temperature
VOLTAGE DROP (V)
40
150
TA - TEMPERATURE (°C)
VOH - VDD2 - HIGH LEVEL OUTPUT
20
Figure . High Level Output Current (IOH)
vs. Temperature
IOLF - LOW LEVEL OUTPUT CURRENT
IOL - LOW LEVEL OUTPUT CURRENT (A)
BBBB
Figure . FAULT Logic Low Output CurrentBBBB
IFAULTL)
vs. FAULT Logic Low Output Voltage (VFAULTL)
-0.4
0
TA - TEMPERATURE (°C)
Figure . Low Level Output Voltage (VOL)
vs. Temperature
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10
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics
VOL - LOW LEVEL OUTPUT VOLTAGE (V)
VOH - HIGH LEVEL OUTPUT VOLTAGE (V)
30
29
TA = -40 °C
25 °C
28
100 °C
27
26
VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
25
0.0
0.5
1.0
1.5
2.0
2.5
4
VDD2 - VSS = 30 V
VDD1 = 5 V
3
VIN+ = 0 V
TA = 100 °C
25 °C
2
-40 °C
1
0
0.0
IOH - HIGH LEVEL OUTPUT CURRENT (A)
Figure . High Level Output Voltage (VOH) vs.
High Level Output Current (IOH)
IDD2 - OUTPUT SUPPLY CURRENT (mA)
IDD1 - SUPPLY CURRENT (mA)
VDD1 = 5 V
VIN+ = 0 V (IDD1L) / 5 V (IDD1H)
15
IDD1H
10
5
IDD1L
-20
0
20
40
60
80
100
2.2
2.0
2.5
2.0
VDD1 = 5 V
VIN+ = 0 V (IDD2L) / 5 V (IDD2H)
IDD2L
1.8
IDD2H
1.6
1.4
1.2
1.0
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
Figure . Supply Current (IDD1)
vs. Temperature
Figure 1. Output Supply Current (IDD2)
vs. Temperature
2.2
-0.15
VDD2 - VSS = 30 V
VIN+ = 0 V (IDD2L) / 5 V (IDD2H)
VDD1 = 5 V
IDD2L
1.8
IDD2H
1.6
1.4
1.2
1.0
15
20
25
VIN+ = 5 V
VDESAT = 0 to 6 V
-0.20
-0.25
-0.30
-40
30
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
VDD2 - OUTPUT SUPPLY VOLTAGE (V)
Figure 1. Blanking Capacitor Charge
Current (ICHG) vs. Temperature
Figure 1. Output Supply Current (IDD2)
vs. Output Supply Voltage (VDD2)
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
CHARGING CURRENT (mA)
VDD1 = 5 V
ICHG - BLANKING CAPACITOR
IDD2 - OUTPUT SUPPLY CURRENT (mA)
1.5
VDD2 - VSS = 30 V
TA - TEMPERATURE (°C)
2.0
1.0
Figure . Low Level Output Voltage (VOL) vs.
Low Level Output Current (IOL)
20
0
-40
0.5
IOL - LOW LEVEL OUTPUT CURRENT (A)
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11
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
3.0
0.0
-40°C
25°C
100°C
VDD1 = 5 V
-0.2
IS - SOURCE CURRENT (mA)
IE - SUPPLY CURRENT (mA)
VDD2 - VSS = 30 V
VIN+ = 0 V (IEL) / 5 V (IEH)
IEH
-0.4
IEL
-0.6
-0.8
-40
2.5
2.0
1.5
1.0
0.5
VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
-20
0
20
40
60
80
0.0
0.0
100
0.5
TA - TEMPERATURE (°C)
Figure 1. Supply Current (IE) vs.
Temperature
2.0
VDESAT - DESAT THRESHOLD (V)
7.0
VUVLO+
THRESHOLD (V)
VUVLO - UNDER VOLTAGE LOCKOUT
1.5
Figure 1. Source Current (IS)
vs. Output Current (IO)
15
10
VUVLO-
5
VDD1 = 5 V
6.8
6.6
6.4
6.2 VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
VIN+ = 5 V
0
-40
-20
0
20
40
60
80
6.0
-40
100
-20
TA - TEMPERATURE (°C)
0
20
40
60
80
100
TA - TEMPERATURE (°C)
Figure 1. Under Voltage Lockout
Threshold (VUVLO) vs. Temperature
Figure 1. DESAT Threshold (VDESAT)
vs. Temperature
0.25
tP - PROPAGATION DELAY (µs)
0.25
tP - PROPAGATION DELAY (µs)
1.0
IO - OUTPUT CURRENT (mA)
0.20
tPLH
0.15
tPHL
0.10 VDD2 - VSS = 30 V
VDD1 = 5 V
f = 10 KHz 50% Duty Cycle
RL = 10 Ω CL = 10 nF
0.05
-40
-20
0
20
40
60
80
tPLH
0.15
tPHL
0.10
VDD1 = 5 V
f = 10 KHz 50% Duty Cycle
RL = 10 Ω CL = 10 nF
0.05
15
100
TA - TEMPERATURE (°C)
20
25
30
VDD2 - SUPPLY VOLTAGE (V)
Figure . Propagation Delay (tP)
vs. Supply Voltage (VDD2)
Figure 1. Propagation Delay (tP)
vs. Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
0.20
www.onsemi.com
12
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
0.18
VDD2 - VSS = 30 V
tPHL - PROPAGATION DELAY (µs)
tPLH - PROPAGATION DELAY (µs)
0.20
f = 10 KHz 50% Duty Cycle
RL = 10 Ω CL = 10 nF
0.18
0.16
0.14
VDD1 = 4.5 V
VDD1 = 5.0 V
0.12
-40
VDD1 = 5.5 V
-20
0
20
40
60
80
VDD2 - VSS = 30 V
f = 10 KHz 50% Duty Cycle
RL = 10 Ω CL = 10 nF
0.16
0.14
0.12
VDD1 = 4.5 V
VDD1 = 5.0 V
0.10
-40
100
VDD1 = 5.5 V
-20
0
TA - TEMPERATURE (°C)
Figure . Propagation Delay Time to Logic High
Output (tPLH) vs. Temperature
tP - PROPAGATION DELAY (µs)
tP - PROPAGATION DELAY (µs)
60
80
100
0.20
0.18
tPLH
0.16
tPHL
0.14
VDD2 - VSS = 30 V
0.12
VDD1 = 5 V
f = 10 KHz 50% Duty Cycle
RL = 10 Ω
0.10
0.18
0.16
tPLH
0.14
tPHL
VDD2 - VSS = 30 V
0.12
VDD1 = 5 V
f = 10 KHz 50% Duty Cycle
CL = 10 nF
0.10
0
20
40
60
80
100
0
10
CL - LOAD CAPACITANCE (nF)
tDESAT(10%) - DESAT SENSE to 10% VO DELAY (µs)
VDD2 - VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
RL = 10Ω CL = 10 nF
0.4
0.2
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
40
50
4.0
VDD1 = 5 V
3.5
VIN+ = 5 V
RL = 10Ω CL = 10 nF
VDD2 - VSS = 30 V
3.0
2.5
2.0
VDD2 - VSS = 15 V
1.5
1.0
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
Figure 2. DESAT Sense to 10% VO Delay
(tDESAT(10%)) vs. Temperature
Figure 2. DESAT Sense to 90% VO Delay
(tDESAT(90%)) vs. Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
30
Figure 2. Propagation Delay (tP)
vs. Load Resistance (RL)
0.8
0.0
-40
20
RL - LOAD RESISTANCE (Ω)
Figure 2. Propagation Delay (tP) vs.
Load Capacitance (CL)
tDESAT(90%) - DESAT SENSE to 90% VO DELAY (µs)
40
Figure 2. Propagation Delay Time to Logic
Low Output (tPHL) vs. Temperature
0.20
0.6
20
TA - TEMPERATURE (°C)
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13
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
tDESAT(10%) - DESAT SENSE to 10% VO DELAY (µs)
VDD2 - VSS = 30 V
FAULT SIGNAL DELAY (µs)
BBBBBB
tDESAT(FAULT)
- DESAT SENSE to LOW LEVEL
1.8
VDD1 = 5 V
1.6
VIN+ = 5 V
RL = 10Ω CL = 10 nF
1.4
VE - VSS = 0 V
VE - VSS = 15 V
1.2
1.0
0.8
-40
-20
0
20
40
60
80
100
10
VDD1 = 5 V
VIN+ = 5 V
8
RL = 10Ω
6
VDD2 - VSS = 30 V
4
VDD2 - VSS = 15 V
2
0
0
5
TA - TEMPERATURE (°C)
VIN+ = 5 V
CL = 10 nF
VDD2 - VSS = 30 V
2.5
2.0
VDD2 - VSS = 15 V
1.5
1.0
0.5
0.0
10
20
30
40
8
RL = 10 Ω CL = 10 nF
7
VDD1= 4.5 V
6
VDD1= 5.0 V
5
VDD1= 5.5 V
4
3
-40
50
-20
0
20
40
60
80
100
TA - TEMPERATURE (°C)
Figure . RESET
to High Level FAULT
BBBBBBB
Signal Delay (tRESET(FAULT)) vs. Temperature
Figure 2. DESAT Sense to 10% VO Delay
(tDESAT(10%)) vs. Load Resistance (RL)
5
5.0
tGP - TIME TO GOOD POWER (µs)
VDD2- VSS = 20 V
THRESHOLD DELAY (µs)
30
VIN+ = VDD1
RL - LOAD RESISTANCE (Ω)
tUVLO - UNDER VOLTAGE LOCKOUT
25
VDD2- VSS = 30 V
FAULT SIGNAL DELAY (µs)
VDD1 = 5 V
4.5
20
9
4.0
3.0
15
Figure 2. DESAT Sense to 10% VO Delay
(tDESAT(10%)) vs. Load Capacitance (CL)
tRESET(FAULT) - RESET TO HIGH LEVEL
tDESAT(10%) - DESAT SENSE to 10% VO DELAY (µs)
Figure 2. DESAT Sense
BBBBto Low Level FAULT
Signal Delay (tDESAT(FAULT)) vs. Temperature
3.5
10
CL - LOAD CAPACITANCE (nF)
VDD1 = 5 V
VIN+ = 5 V
f = 50Hz 50% Duty Cycle
4.0
tUVLO ON
3.5
tUVLO OFF
3.0
2.5
2.0
-40
-20
0
20
40
60
80
VIN+ = 5 V
4
f = 50Hz 50% Duty Cycle
3
2
1
0
15
100
TA - TEMPERATURE (°C)
20
25
30
VDD2 - SUPPLY VOLTAGE (V)
Figure . Under Voltage Lockout
Threshold Delay (WUVLO) vs. Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
VDD1 = 5 V
Figure 3. Time to Good Power (TGP)
vs. Supply Voltage (VDD2)
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14
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
3
VDD2 - VSS = 30 V
VDD1 = 5 V
4
VIN+ = 5 V
ICLAMP – CLAMP LOW LEVEL
SINKING CURRENT (A)
tGP - TIME TO GOOD POWER (µs)
5
f = 50Hz 50% Duty Cycle
3
2
1
0
-40
-20
0
20
40
60
80
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
2.5
VCLAMP = 2.5 V
2.0
1.5
1.0
0.5
0
-40
100
-20
0
7$±7(03(5$785( &
3.0
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 0 V
ICLAMP – CLAMP LOW LEVEL
SINKING CURRENT (A)
VCLAMP – CLAMP PIN THRESHOLD
VOLTAGE (V)
2.4
2.2
2.0
1.8
1.6
1.4
-40
-20
0
20
40
60
80
60
80
100
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 0 V
2.5
2.0
1.5
1.0
0.5
0
100
7$±7(03(5$785( &
0
0.5
1.0
1.5
2.0
2.5
3.0
VCLAMP – CLAMP VOLTAGE (V)
Figure 34. Clamp Low Level Sinking
Current (ICLAMPL) vs. Clamp Voltage (VCLAMP)
Figure 33. Clamping Threshold Voltage
(VCLAMP) vs. Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
40
Figure 32. Clamp Low Level Sinking
Current (ICLAMPL) vs. Temperature
Figure 3. Time to Good Power (WGP)
vs. Temperature
2.6
20
TA – TEMPERATURE (°C)
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15
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
FOD8318
+
–
5V
VFAULT
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
A
0.1 µF
10 mA
0.1 µF
–
+
IFAULT
VFAULT = 0.4 V for IFAULTL
VDD2 13
Switch A closed for IFAULTL
Switch A opened for IFAULTH
9
VFAULT = 5.0 V for IFAULTH
Figure 35. Fault Output Current (IFAULTL) and (IFAULTH) Test Circuit
FOD8318
Pulse Gen
PW = 10 µs
Period = 5 ms
+
–
0.1 µF
5V
–
+
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VDD2 13
+
–
0.1 µF
VE
0.1 µF 47 µF
0.1 µF 47 µF
+
–
VO
+
–
30 V
3 kΩ
9
Figure 36. High Level Output Current (IOH) Test Circuit
FOD8318
Pulse Gen
PW = 4.99 ms
Period = 5 ms
+
–
0.1 µF
5V
–
+
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
0.1 µF
+
–
VE
+
–
30 V
VDD2 13
0.1 µF 47 µF
3 kΩ
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VO
+
–
9
0.1 µF 47 µF
Figure 37. Low Level Output Current (IOL) Test Circuit
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
16
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
A
FOD8318
B
+
–
5V
0.1 µF
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
0.1 µF
VDD2 13
+
–
100 mA
pulsed
VO
30 V
B
A
3 kΩ
Switch A for VOH test
Switch B for VOL test
VE
+
–
0.1 µF
100 mA
pulsed
9
Figure 38. High Level (VOH) and Low Level (VOL) Output Voltage Test Circuit
A
FOD8318
B
5V
0.1 µF
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
IDD1
Switch A for IDD1H test
Switch B for IDD1L test
VDD2 13
9
Figure 39. High Level (IDD1H) and Low Level (IDD1L) Supply Current Test Circuit
A
B
0.1 µF
5V
IE
FOD8318
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VDD2 13
0.1 µF
VE
+
–
IDD2
IS
VO
0.1 µF
30 V
+
–
9
Switch A for IDD2H, ISH and IEH test
Switch B for IDD2L, ISL and IEL test
Figure 40. High Level (IDD2H), Low Level (IDD2L) Output Supply Current,
High Level (ISH), Low Level (ISL) Source Current,
VE High Level (IEH), and VE Low Level (IEL) Supply Current Test Circuit
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
17
FOD8318
5V
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VDESAT
+
–
0.1 µF
+
–
1
ICHG/DSCHG
0.1 µF
VE
+
–
VDD2 13
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VRL
VO
RL
0.1 µF
IOLF
3 kΩ
30 V
+
–
10 nF
9
Figure 41. Low Level Output Current During Fault Conditions (IOLF), Blanking Capacitor Charge Current (ICHG),
Blanking Capacitor Discharging Current (IDSCHG), and DESAT Threshold (VDESAT) Test Circuit
FOD8318
0.1 µF
5V
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VDD2 13
VO
0.1 µF
DC Sweep
0 to 15 V
(100 steps)
Parameter
Analyzer
+
–
9
Figure 42. Under-Voltage Lockout Threshold (VUVLO) Test Circuit
F = 10 kHz
DC = 50 %
–
0.1 µF
5V
FOD8318
+
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
0.1 µF
VE
+
–
VDD2 13
VCL
VO
0.1 µF
30 V
+
–
RL
3 kΩ
10 nF
9
Figure 43. Propagation Delay (tPLH, tPHL), Pulse Width Distortion (PWD),
Rise Time (tR), and Fall Time (tF) Test Circuit
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
18
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
LOW to HIGH
FOD8318
+
–
5V
0.1 µF
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
100 pF
0.1 µF
+
–
VE
VDD2 13
VO
0.1 µF
+
–
30 V
RL
3 kΩ
VFAULT
10 nF
9
Figure 44. DESAT Sense (tDESAT(90 %), tDESAT(10 %)), DESAT Fault (tDESAT(FAULT)), and (tDESAT(LOW)) Test Circuit
FOD8318
0.1 µF
5V
+
–
3 kΩ
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
0.1 µF
+
–
VE
VDD2 13
VO
0.1 µF
+
–
30 V
RL
+
VFAULT
Strobe 8 V
–
10 nF
9
Figure 45. Reset Delay (tRESET(FAULT)) Test Circuit
FOD8318
0.1 µF
5V
+
–
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
0.1 µF
VE
+
–
VDD2 13
VO
+
3 kΩ
0.1 µF
VDD2**
–
9
**1.0 ms ramp for tUVLO
10 µs ramp for tGP
Figure 46. Under-Voltage Lockout Delay (tUVLO) and Time to Good Power (tGP) Test Circuit
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
19
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test
Circuits (Continued)
Test
Circuits
FOD8318
5V
0.1 µF
1 kΩ
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
25 V
0.1 µF
VDD2 13
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
SCOPE
10 Ω
300 pF
10 nF
9
VCM
Floating GND
Figure 47. Common Mode Low (CML) Test Circuit at LED1 Off
FOD8318
5V
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
0.1 µF
25 V
VDD2 13
0.1 µF
1 kΩ
300 pF
Floating GND
9
SCOPE
10 Ω
10 nF
VCM
Figure 48. Common Mode High (CMH) Test Circuit at LED1 On
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
20
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test
TestCircuits
Circuits(Continued)
(Continued)
FOD8318
5V
0.1 µF
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
25 V
VDD2 13
0.1 µF
1 kΩ
SCOPE
300 pF
10 Ω
9
VCM
10 nF
Floating GND
Figure 49. Common Mode High (CMH) Test Circuit at LED2 Off
FOD8318
5V
0.1 µF
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
4
GND1
25 V
750 Ω
VDD2 13
0.1 µF
1 kΩ
SCOPE
300 pF
5
RESET
VS 12
6
FAULT
VO 11
7
VLED1+
VCLAMP 10
8
VLED1-*
VSS
VCM
+
–
9V
10 Ω
9
10 nF
Floating GND
Figure 50. Common Mode Low (CML) Test Circuit at LED2 On
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
21
FOD8318
FOD8318
5V
5V
+
–
0.1 µF
0.1 µF
VIN+ 1
VIN+
2
VIN– 2
VIN–
VLED2+ 15 VLED2+ 15
3
VDD13
VDD1
DESAT 14 DESAT 14
4
GND1
4
GND1
5
1 kΩ
6
SCOPE
3 kΩ
7
300 pF
VE 16
1
8
VE 16
VDD2 13
RESET
5 RESET
VS 12
FAULT
6 FAULT
VLED1+
7 VLED1+
VLED1-*
8 VLED1-*
VO 11
25 V
VDD2 13
0.1 µF
VS 12
0.1 µF
+
–
30 V
ICLAMPL
VO 11
+
VCLAMP 10
VSS
+
–
0V
0.1 µF
10 Ω
VCLAMP 10
–
Pulsed
VCLAMP
9
VSS
9
10 nF
Figure 51. Clamp Low Level Sinking Current (ICLAMPL)
VCM
Floating GND
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
S1
AFigure
49. Common
Mode High (CMH) Test Circuit at LED2 Off
FOD8318
1
VIN+
VE 16
2
VIN–
VLED2+ 15
3
VDD1
DESAT 14
FOD8318
4
GND1 1
VIN+
VDD2 13
VE 16
5
RESET2
VIN–
VS 12
VLED2+ 15
VO 11
DESAT 14
VCLAMP 10
VDD2 13
B
5V
+
–
0.1 µF
0.1 µF
5V
FAULT3
VDD1
7
VLED1+4
GND1
3 kΩ
0.1 µF
1 kΩ
8
VLED1-*
5
RESET
VSS
9
+
–
0.1 µF
30 V
6
0V
+
–
25 V
50 Ω
750 Ω
+
–+
0.1 µF
–
Sweep from
39VVto VCLAMP_THRES
VS 12
SCOPE
Initially set S1 to A before connecting 3 V to clamp pin. Then switch to B before sweeping down
VCLAMP 10
VLED1+
to get the VCLAMP_THRES, clamping 7threshold
voltage.
300 pF
8
VSS
VLED1-*
9
Figure 52. Clamp Pin Threshold Voltage (VCLAMP)
VCM
10 Ω
10 nF
Floating GND
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
Figure 50. Common Mode Low (CML) Test Circuit at LED2 On
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
22
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
TestCircuits
Circuits(Continued)
(Continued)
Test
Circuits
(Continued)
Test
VIN+
2.5 V
VIN–
0V
2.5 V
tF
tR
90%
50%
10%
VO
tPLH
tPHL
Figure 53. Propagation Delay (tPLH, tPHL), Rise Time (tR), and Fall Time (tF) Timing Diagram
RESET
50%
7V
VDESAT
tDESAT (LOW)
tRESET (FAULT)
50%
tDESAT (90%)
90%
VO
10%
tDESAT (10%)
50% (0.5 x VDD1)
FAULT
tDESAT (FAULT)
Figure 54. Definitions for Fault Reset Input (RESET), Desaturation Voltage Input (DESAT), Output Voltage (VO),
and Fault Output (FAULT) Timing Waveforms
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
23
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Timing Diagrams
Micro
Controller
5 V + 0.1 µF
3 kΩ
–
330 pF
FOD8318
1
VIN+
VE
16
2
VIN–
VLED2+
15
3
VDD1
DESAT
14
4
GND1
VDD2
13
5
RESET
VS
12
6
FAULT
VO
11
7
VLED1+
VCLAMP
10
8
VLED1-*
VSS
CBLANK
1 µF
10 µF
100 pF
DDESAT
+
+
–
1 µF
–
1 kΩ
VF
VDD2 = 15 V
+
Q1
VCE
Rg
–
3-Phase
Output
Q2
9
+
VCE
–
Figure 55. Recommended Application Circuit
Functional Description
The relationship between the inputs and output are
illustrated in the Figure 57.
The functional behavioral of FOD8318 is illustrated by
the detailed internal schematic shown in Figure 56. This
explains the interaction and sequence of internal and
external signals, together with the timing diagrams.
During normal operation, when no fault is detected, the
FAULT output, which is an open-drain configuration, is
latched to HIGH state. This allows the gate driver to be
controlled by the input logic signal.
1. Non-Inverting and Inverting Inputs
There are two CMOS/TTL-compatible inputs, VIN+ and
VIN-, to control the IGBT in non-inverting and inverting
configurations, respectively. When VIN- is set to LOW
state, VIN+ controls the driver output, VO, in non-inverting
configuration. When VIN+ is set to HIGH state, VIN- controls the driver output in inverting configuration.
When a fault is detected, the FAULT output is latched to
LOW state. This condition remains until the input logic is
pulled to LOW and the RESET pin is also pulled LOW for
a period longer than PWRESET.
250 µA
+
–
VLED+
VDD1 3
7
VIN+ 1
VIN– 2
FAULT
14
Gate Drive
Optocoupler
16
UVLO Comparator
6
–
+
13
12 V
12
4
GND1
VE
VDD2
VS
Delay
VLED1– 8
11
Q
R S
RESET
DESAT
VDESAT
5
Fault Sense
Optocoupler
VO
50x
5µs Pulse
Generator
1x
9,10
VSS
15
VLED2+
Figure 56. Detailed Internal Schematic
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
24
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Application Information
lated using external capacitance (CBLANK), FAULT
threshold voltage (VDESAT), and DESAT charge current
(ICHG) as:
A pair of PMOS and NMOS comprise the output driver
stage, which facilitates close to rail-to-rail output swing.
This feature allows a tight control of gate voltage during
on-state and short-circuit condition. The output driver is
typically to sink 2 A and source 2 A at room temperature.
Due to the low RDS(ON) of the MOSFETs, the power dissipation is reduced as compared to those bipolar-type
driver output stages. The absolute maximum rating of
the output peak current, IO(PEAK), is 3 A; therefore the
careful selection of the gate resistor, Rg, is required to
limit the short-circuit current of the IGBT.
tBLANK = CBLANK x VDESAT / ICHG
With a recommended 100 pF DESAT capacitor, the
nominal blanking time is:
100 pF x 7 V / 250 µA = 2.8 µs
4. “Soft” Turn-Off
The soft turn-off feature ensures the safe turn off of the
IGBT under fault conditions. This reduces the voltage
spike on the collector of the IGBT. Without this, the IGBT
would see a heavy spike on the collector and result in
permanent damage to the device.
As shown in Figure 56, gate driver output is influenced
by signals from the photodetector circuitry, the UVLO
comparator, and the DESAT signals. Under
no-fault
condition, normal operation resumes while the supply
voltage is above the UVLO threshold, the output of the
photodetector drives the MOSFETs of the output stage.
5. Under-Voltage Lockout
Under-voltage detection prevents the application of
insufficient gate voltage to the IGBT. This could be dangerous, as it would drive the IGBT out of saturation and
into the linear operation where the losses are very high
and quickly overheated. This feature ensures the proper
operating of the IGBTs. The output voltage, VO, remains
LOW regardless of the inputs as long as the supply voltage, VDD2 – VE, is less than VUVLO+. When the supply
voltage falls below VUVLO- , VO goes LOW, as illustrated
in Figure 59.
The logic circuitry of the output stage ensures that the
push-pull devices are never “ON” simultaneously. When
the output of the photodetector is HIGH, the output, VO,
is pulled to HIGH state by turning on the PMOS. When
the output of the photodetector is LOW, VO is pulled to
LOW state by turning on the NMOS.
When VDD2 supply goes below VUVLO, which is the designated UVLO threshold at the comparator, VO is pulled
down to LOW state regardless of photodetector output.
6. Active Miller Clamp Function
An active Miller clamp feature allows the sinking of the
Miller current to the ground or emitter of the IGBT during
a high-dV/dt situation. Instead of driving the IGBT gate to
a negative supply voltage to increase the safety margin,
the device has a dedicated VCLAMP pin to control the
Miller current. During turn-off, the gate voltage of the
IGBT is monitored and the VCLAMP output is activated
when the gate voltage goes below 2 V (relative to VSS).
The Miller clamp NMOS transistor is then turned on and
provides a low resistive path for the Miller current.
This helps prevent a self-turn-on due to the parasitic
Miller capacitor in power switches. The clamp voltage is
VOL + 2.5 V maximum for a Miller current up to 1200 mA.
In this way, the VCLAMP function does not affect the turnoff characteristic. It helps to clamp the gate to the LOW
level throughout the turn-off time. During turn-on, where
the input of the driver is activated, the VCLAMP function is
disabled or opened.
When desaturation is detected, VO turns off slowly as it
is pulled LOW by the 1XNMOS device. The input to the
fault sense circuitry is latched to HIGH state and turns on
the LED. When VO goes below 2 V, the 50XNMOS
device turns on again, clamping the IGBT gate firmly to
VSS. The Fault Sense signal remains latched in the
HIGH state until the LED of the gate driver circuitry turns
off.
3. Desaturation Protection, FAULT Output
Desaturation detection protection ensures the protection
of the IGBT at short-circuit by monitoring the collectoremitter voltage of the IGBT in the half bridge. When the
DESAT voltage goes up and reaches above the threshold voltage, a short-circuit condition is detected and the
driver output stage executes a “soft” IGBT turn-off and is
eventually driven LOW, as illustrated in Figure 58. The
FAULT open-drain output is triggered active LOW to
report a desaturation error. It is only cleared by activating
active LOW by the external controller to the RESET input
with the input logic is pulled to LOW.
7. Time to Good Power
At initial power up, the LED is off and the output of the
gate driver should be in the LOW state. Sometimes race
conditions exist that causes the output to follow the VE
(assuming VDD2 and VE are connected externally), until
all of the circuits in the output IC have stabilized. This
condition can result in output transitions or transients
that are coupled to the driven IGBT. These glitches can
cause the high-side and low-side IGBTs to conduct
shoot-through current that may result in destructive
damage to the power semiconductor devices. ON has
introduced a initial turn-on delay, generally called “time-
The DESAT fault detector should be disabled for a short
period (blanking time) before the IGBT turns on to allow
the collector voltage to fall below DESAT threshold. This
blanking period protects against false trigger of the
DESAT while the IGBT is turning on.
The blanking time is controlled by the internal DESAT
charge current, the DESAT voltage threshold, and the
external DESAT capacitor (capacitor between DESAT
and VE pin). The nominal blanking time can be calcu© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
25
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
2. Gate Driver Output
the initial turn-on activation, LOW-to-HIGH transition at
the output of the gate driver only occurs 2.5 µs after the
VDD2 power is applied.
VIN–
VIN+
VO
Figure 57. Input/Output Relationship
Normal
Operation
VIN–
Fault Condition
Reset
0V
5V
VIN+
0V
Blanking
Time
RESET
7V
VDESAT
VO
FAULT
Figure 58. Timing Relationship Among DESAT, FAULT, and RESET
VIN–
5V
VIN+
0V
VUVLO+
VUVLO–
VDD2 – VE
VO
Figure 59. UVLO for Output Side
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
26
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
to-good power”. This delay, typically 2.5 µs, is only present during the initial power-up of the device. Once powered, the “time-to-good power” delay is determined by
the delay of the UVLO circuitry. If the LED is “ON” during
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Ordering Information
Part Number
Package
Packing Method
FOD8318
SO 16-Pin
Tube (50 units per tube)
FOD8318R2
SO 16-Pin
Tape and Reel (750 units per reel)
FOD8318V
SO 16-Pin, DIN EN/IEC 60747-5-5 Option
Tube (50 units per tube)
FOD8318R2V
SO 16-Pin, DIN EN/IEC 60747-5-5 Option
Tape and Reel (750 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
2
3
8318 V
D X YY KK
4
6
5
J
8
7
Definitions
1
Company logo
2
Device number, e.g., ‘8318’ for FOD8318
3
DIN EN/IEC60747-5-5 option (only appears on
component ordered with this option)
4
Plant code, e.g., ‘D’
5
Last-digit year code, e.g., ‘B’ for 2011
6
Two-digit work week ranging from ‘01’ to ‘53’
7
Lot traceability code
8
Package assembly code, J
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
www.onsemi.com
27
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Reflow Profile
Max. Ramp-up Rate = 3°C/S
Max. Ramp-down Rate = 6°C/S
Temperature (°C)
TP
260
240
TL
220
200
180
160
140
120
100
80
60
40
20
0
tP
Tsmax
tL
Preheat Area
Tsmin
ts
120
240
360
Time 25°C to Peak
Time (seconds)
Profile Freature
Pb-Free Assembly Profile
Temperature Minimum (Tsmin)
150 °C
Temperature Maximum (Tsmax)
200 °C
Time (tS) from (Tsmin to Tsmax)
60–120 seconds
Ramp-up Rate (tL to tP)
3 °C/second max.
Liquidous Temperature (TL)
217 °C
Time (tL) Maintained Above (TL)
60–150 seconds
Peak Body Package Temperature
260 °C +0 °C / –5 °C
Time (tP) within 5 °C of 260 °C
30 seconds
Ramp-down Rate (TP to TL)
6 °C/second max.
Time 25 °C to Peak Temperature
© Semiconductor Components Industries, LLC, 2010
FOD8318 Rev. 2
8 minutes max.
www.onsemi.com
28
0.20 C A-B
1.27 TYP
2X
10.30
16
A
0.64 TYP
9
D
9
7.31
9.47
11.63
16
3.75
10.30
7.50
(2.16)
0.10 C D
2X
8
1
PIN ONE
INDICATOR
0.33 C
2X 8 TIPS
1.27
0.51 (16X)
0.31
B
0.51 TYP
0.25
1
8
LAND PATTERN
RECOMMENDATION
C A-B D
A
0.10 C
3.0 MAX
2.35±0.10
0.10 C
16X
SEATING PLANE
0.30±0.15
C
NOTES: UNLESS OTHERWISE SPECIFIED
(1.42)
(R0.17)
(R0.17)
GAUGE
PLANE
0.25
0.19
8°
0°
0.25
SEATING
PLANE
1.27
0.40
C
SCALE: 3:1
A) DRAWING REFERS TO JEDEC MS-013,
VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF
BURRS, MOLD FLASH AND TIE BAR
PROTRUSIONS
D) DRAWING CONFORMS TO ASME
Y14.5M-1994
E) LAND PATTERN STANDARD:
SOIC127P1030X275-16N
F) DRAWING FILE NAME: MKT-M16FREV2
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