P-Channel QFET® MOSFET
- 500 V, - 2.1 A, 4.9 Ω
Features
Description
• - 2.1 A, - 500 V, RDS(on) = 4.9 Ω (Max.) @ VGS = - 10 V,
ID = - 1.05 A
This P-Channel enhancement mode power MOSFET is
produced
using
ON
Semiconductor’s
proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
• Low Gate Charge (Typ. 18 nC)
• Low Crss (Typ. 9.5 pF)
• 100% Avalanche Tested
D
S
!
G
G!
S
▶ ▲
D-PAK
(TO252)
Absolute Maximum Ratings
Symbol
VDSS
ID
●
!
TC = 25°C unless otherwise noted
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
EAR
PD
TJ, TSTG
TL
- Pulsed
D
FQD3P50
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
-500
- Continuous (TC = 100°C)
dv/dt
●
●
(Note 1)
Unit
V
-2.1
A
-1.33
A
-8.4
A
± 30
V
(Note 2)
250
mJ
Avalanche Current
(Note 1)
-2.1
A
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
5.0
-4.5
2.5
mJ
V/ns
W
50
0.4
-55 to +150
W
W/°C
°C
300
°C
FQD3P50
2.5
Unit
°C/W
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case, Max.
RθJA
Thermal Resistance, Junction-to-Ambient, Max. *
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient, Max.
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2009Semiconductor Components Industries, LLC.
October-2017,Rev.2
Publication Order Number:
FQD3P50/D
FQD3P50 P-Channel QFET® MOSFET
FQD3P50
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Unit
-500
--
--
V
--
0.42
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = -500 V, VGS = 0 V
--
--
-1
µA
VDS = -400 V, TC = 125°C
--
--
-10
µA
Gate-Body Leakage Current, Forward
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Gate-Body Leakage Current, Reverse
VGS = 30 V, VDS = 0 V
--
--
100
nA
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
-3.0
--
-5.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = -10 V, ID = -1.05 A
--
3.9
4.9
Ω
gFS
Forward Transconductance
VDS = -50 V, ID = -1.05 A
--
2.1
--
S
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
--
510
660
pF
--
70
90
pF
--
9.5
12
pF
--
12
35
ns
--
56
120
ns
--
35
80
ns
--
45
100
ns
--
18
23
nC
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -250 V, ID = -2.7 A,
RG = 25 Ω
(Note 4)
VDS = -400 V, ID = -2.7 A,
VGS = -10 V
(Note 4)
--
3.6
--
nC
--
9.2
--
nC
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
-2.1
ISM
--
--
-8.4
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = -2.1 A
Drain-Source Diode Forward Voltage
--
--
-5.0
V
trr
Reverse Recovery Time
270
--
ns
Reverse Recovery Charge
VGS = 0 V, IS = -2.7 A,
dIF / dt = 100 A/µs
--
Qrr
--
1.5
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 102mH, IAS = -2.1A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ -2.7A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Essentially independent of operating temperature
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2
FQD3P50 P-Channel QFET® MOSFET
Elerical Characteristics
VGS
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-6.0 V
Bottom : -5.5 V
-I D, Drain Current [A]
0
10
-I D , Drain Current [A]
Top :
-1
10
※ Notes :
1. 250μs Pulse Test
2. TC = 25℃
-2
10
0
10
150℃
25℃
※ Notes :
1. VDS = -50V
2. 250μs Pulse Test
-55℃
-1
-1
0
10
10
1
10
10
2
4
6
8
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
8
6
VGS = - 20V
5
4
3
2
※ Note : TJ = 25℃
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
-1
0
2
4
6
8
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-ID , Drain Current [A]
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
1200
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1000
800
Capacitance [pF]
-I DR , Reverse Drain Current [A]
VGS = - 10V
Ciss
600
Coss
400
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
200
0
-1
10
0
10
1
10
10
-V GS , Gate-Source Voltage [V]
RDS(on) [ Ω ],
Drain-Source On-Resistance
7
VDS = -100V
VDS = -250V
8
VDS = -400V
6
4
2
※ Note : ID = -2.7 A
0
0
2
4
6
8
10
12
14
16
18
20
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
FQD3P50 P-Channel QFET® MOSFET
Typical Characteristics
(Continued)
2.5
2.0
1.1
RDS(ON) , (Normalized)
Drain-Source On-Resistance
-BV DSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.0
※ Notes :
1. VGS = 0 V
2. ID = -250 μA
0.9
0.8
-100
-50
0
50
100
150
1.5
1.0
※ Notes :
1. VGS = -10 V
2. ID = -1.35 A
0.5
0.0
-100
200
-50
o
0
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
2.5
Operation in This Area
is Limited by R DS(on)
2.0
1
-I D, Drain Current [A]
100 µs
1 ms
10 ms
0
10
DC
-1
10
※ Notes :
1.5
1.0
0.5
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-2
10
0
1
10
2
10
0.0
25
3
10
10
50
※ N o te s :
1 . Z θ J C ( t ) = 2 . 5 ℃ /W M a x .
2 . D u ty F a c t o r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C( t )
0 .2
0 .0 5
-1
0 .0 2
0 .0 1
PDM
t1
s in g le p u ls e
10
125
Figure 10. Maximum Drain Current
vs. Case Temperature
0 .1
10
100
D = 0 .5
0
θ JC
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
-VDS, Drain-Source Voltage [V]
Z
-I D, Drain Current [A]
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
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4
10
1
150
FQD3P50 P-Channel QFET® MOSFET
Typical Characteristics
FQD3P50 P-Channel QFET® MOSFET
Gate Charge Test Circuit & Waveform
50KΩ
200nF
12V
VGS
Same Type
as DUT
Qg
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
t on
td(on)
VDD
VGS
VGS
t off
tr
td(off)
tf
10%
DUT
-10V
VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
tp
ID
RG
VDD
DUT
-10V
tp
VDD
VDS (t)
ID (t)
IAS
BVDSS
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5
Time
+
VDS
DUT
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Compliment of DUT
(N-Channel)
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
Body Diode Reverse Current
IRM
di/dt
IFM , Body Diode Forward Current
VDS
( DUT )
VSD
Body Diode
Forward Voltage Drop
Body Diode Recovery dv/dt
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6
VDD
FQD3P50 P-Channel QFET® MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
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