FSA2457UMX

Features Description        The FSA2457 is a bi-directional, low -pow er, dual doublepole double-throw (4PDT) analog sw itch targeted at dual 1-bit SIM/SD/MMC card and/or GPS signal multiplexing. It is optimized for sw itching the WLAN-SIM data and control signals at 52Mbps. Low On Capacitance for Data Path: 12pF Typical Low On Resistance for Data Path: 5Ω Typical Low Pow er Quiescent Consumption: 1μA Maximum Wide -3db Bandw idth: > 160MHz The FSA2457 is compatible w ith the requirements of 1-bit SIM/SD/MMC cards and is ideal for interfacing to GPS baseband processors. The FSA2457 features a low on capacitance (CON) of 12pF to ensure high-speed data transfer. Packaged in Green 16-Lead UMLP (1.8 x 2.6mm) 4kV JEDEC: JESD22-A114 HBM 2kV JEDEC: JESD22-C101 CDM Applications   The FSA2457 contains special circuitry that minimizes current consumption even w hen the control voltage applied to the SEL pin is low er than the supply voltage (V CC). This feature is especially valuable in ultra-portable applications, such as cell phones; allow ing direct interface w ith the general-purpose I/Os of the baseband processor. Other applications include sw itching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and portable GPS systems. Cell Phone, PDA, Digital Camera, Portable GPS LCD Monitor, TV, Set-Top Box Ordering Information Part Number FSA2457UMX Top Mark GD Eco Status Operating Temperature Range Package -40 to +85°C 16-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.8 x 2.6mm Green 1B1 2B1 1A 1B2 2B2 2A 1B3 2B3 3A 1B4 2B4 /OE © 2007 Semiconductor Components Industries, LLC. Nov ember-2017, Rev . 2 4A Sel Publication Order Number: FSA2457/D FSA2457 — Dual DPDT, 5Ω Analog Data Switch FSA2457 — Dual DPDT, 5Ω Analog Data Switch /OE VCC Sel 1B1 Pin Configuration 16 15 14 13 2 11 2B4 1B2 3 10 4A 2B2 4 9 5 6 7 8 2B3 1A 3A 12 1B4 GND 1 2A 2B1 1B3 Figure 2. Pad Assignm ent UMLP16 (Top Through View ) Pin Definitions Pin Description 1Bn, 2Bn Multiplexed Data Source Inputs nA Common Data Ports Sel Sw itch Select /OE Output Enable (Active LOW) Truth Table Sel /OE Function Logic LOW Logic LOW 1B1 = 1A, 1B2 = 2A, 1B3 = 3A, 1B4 = 4A Logic HIGH Logic LOW 2B1 = 1A, 2B2 = 2A, 2B3 = 3A, 2B4 = 4A X Logic HIGH Data Ports Disconnected www.onsemi.com 2 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Figure 1. Analog Sym bol Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Min. Max. Unit Supply Voltage -0.5 +4.6 V DC Input Voltage (Sel, /OE) (1) -0.5 +4.6 V V SW DC Sw itch I/O Voltage(1) 1Bn, 2Bn, nA -0.5 V CC + 0.5 V IIK DC Input Diode Current -50 V CC V CNT RL Parameter IOUT DC Output Current – V SW TST G Storage Temperature MSL Moisture Sensitivity Level (JEDEC J-STD-020A) -65 mA 128 mA +150 °C 1 Level All Pins 4 I/O to GND 8 Human Body Model, JEDEC: JESD22-A114 ESD Charged Device Model, JEDEC: JESD22-C101 kV 2 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol V CC V CNT RL Parameter Supply Voltage Control Input Voltage (Sel, /OE) (2) V SW Sw itch I/O Voltage 1Bn, 2Bn, nA IOUT DC Output Current 1Bn, 2Bn, nA TA Operating Temperature Min. Max. Unit 2.7 3.6 V 0 V CC V -0.5 V CC V 25 mA 85 °C -40 Note: 2. The control input must be held HIGH or LOW; it must not float. www.onsemi.com 3 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Absolute Maximum Ratings All typical values are at 25°C, 3.3V V CC unless otherw ise specified. Symbol Parameter Conditions VCC (V) TA = - 40ºC to +85ºC Min. V IK V IH Clamp Diode Voltage IIN = -18mA 2.7 1.8 3.3 to 3.6 2.0 Input Voltage High V IL Input Voltage Low IIN Control Input Leakage (Sel) Inc(off), Ino(off), Off State Leakage V V 2.7 to 3.6 0.8 V V SW = 0 to V CC 3.6 -1 1 µA 1Bn, 2Bn = 0V or Vcc Figure 4 3.6 -1 1 µA V SW = 0, 2.0V, ION = -20mA Figure 3, Figure 12 2.7 5.0 7.0 Ω 0.3 RON Data Path Sw itch On Resistance(3) ∆RON Data Path Delta On Resistance(4) V SW = 0V, ION = -20mA 2.7 Quiescent Supply Current 3.6 ICC -1.2 2.7 to 3.0 Units Typ. Max. V CNT RL = 0 or V CC, IOUT = 0 Ω 1.0 µA Notes: 3. Measured by the voltage drop betw een nB0, 1Bn and relative common port pins at the indicated current through the sw itch. On resistance is determined by the low er voltage on the relative ports. 4. Guaranteed by characterization. www.onsemi.com 4 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch DC Electrical Characteristics All typical value are for V CC = 3.3V at 25°C unless otherw ise specified. Symbo l Parameter Conditions VCC (V) TA = - 40ºC to +85ºC Min. Typ. Units Max. tON Turn-On Time Sel or /OE to Output (nA) RL = 50Ω, CL = 30pF V SW = 1.5V Figure 5, Figure 6 2.7 to 3.6 7.0 ns tOFF Turn-Off Time Sel or /OE to Output (nA) RL = 50Ω, CL = 30pF V SW = 1.5V Figure 5, Figure 6 2.7 to 3.6 4.0 ns OIRR Off Isolation(5) (nA) RL = 50Ω, f = 25MHz, CL = 30pF Figure 9, Figure 13 2.7 to 3.6 -45 dB Xtalk Non-Adjacent Channel Crosstalk(5) (nA) RL = 50Ω, f = 25MHz, CL = 30pF Figure 7 2.7 to 3.6 -54 dB BW -3db Bandw idth(5) (nA) RL = 50Ω, CL = 30pF Figure 8, Figure 14 2.7 to 3.6 >160 MHz Note: 5. Guaranteed by characterization. Capacitance Symbol Parameter Conditions TA = - 40ºC to +85ºC Min. Typ. Units Max. CIN Control Pin Input Capacitance V CC = 0V 1.8 pF CON On Capacitance(6) (nA) V CC = 3.3V, f = 1MHz Figure 10 12.0 pF COFF Off Capacitance(6) (nA) V CC = 3.3V Figure 9 6.0 pF Note: 6. Guaranteed by characterization. www.onsemi.com 5 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch AC Electrical Characteristics V ON InA(OFF) NC 1Bn, 2Bn A nA VSW VSW ION GND R ON = VON / I ON GND GND VSel = 0 or VCC V Sel Figure 3. On Resistance = 0 or V CC Figure 4. Off Leakage tFALL = 2.5ns tRISE = 2.5ns 1Bn, 2Bn VCC nA VSW 90% RL CL GND 10% VOH 90% 90% RL and CL are functions of the application environment (see tables for specific values). CL includes test fixture and stray capacitance. Figure 5. VCC /2 VCC /2 10% GND GND Sel 90% Input – VCNTRL VOUT Output – VOUT VOL AC Test Circuit Load Figure 6. t ON t OFF Turn-On / Turn-Off Waveform s Network Analyzer RS NC GND VIN VS GND VSel GND RT GND GND RS and RT are functions of the application environment (see tables for specific values). RT VOUT GND Crosstalk= 20 Log (VOUT / VIN) Figure 7. Non-Adjacent Channel-to-Channel Crosstalk www.onsemi.com 6 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Test Diagrams Network Analyzer RS VIN Network Analyzer RS VS GND RT GND VSEL VOUT GND GND RS and RT are functions of the application environment (see tables for specific values). Figure 8. Capacitance Meter RT VIN VSel VOUT GND GND RT RS and RT are functions of the application environment (see tables for specific values). GND VS GND GND Off Isolation = 20 Log (VOUT / VIN) Bandw idth Figure 9. Channel Off Isolation nA nA f = 1MHz GND VSel = 0 or VCC Capacitance Meter VSel = 0 or VCC f = 1MHz 1Bn, 2Bn 1Bn, 2Bn Figure 10. Channel On Capacitance Figure 11. Channel Off Capacitance www.onsemi.com 7 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Test Diagrams (Continued) RON (Ohms) 7.00 6.00 85°C 5.00 25°C 4.00 -40°C 3.00 2.00 -1.00 0.00 1.00 2.00 VIN VCC = 2.7V Figure 12. RON Figure 13. Off Isolation Figure 14. Bandw idth www.onsemi.com 8 3.00 4.00 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Typical Performance Characteristics 0.10 C 2.100 A 1.80 2X B 15X 0.563 0.663 1 PIN #1 IDENT 2.900 2.60 0.400 0.10 C 2X 16X 0.225 TOP VIEW 0.55 MAX. RECOMMENDED LAND PATTERN 0.10 C 0.152 0.08 C SEATING PLANE 0.050 C SIDE VIEW TERMINAL SHAPE VARIANTS 0.40 0.60 5 0.15 0.25 9 0.100 0.100 15X PIN 1 0.40 0.30 15X 0.50 0.15 0.25 NON-PIN 1 Supplier 1 1 16 13 ALL TERMINALS 0.30 0.50 0.15 0.25 0.15 PIN 1 0.10 C A B 0.05 C 0.30 15X 0.50 15X 0.25 NON-PIN 1 Supplier 2 BOTTOM VIEW A. THIS PACKAGE IS NOT CURRENTLY REGISTERED WITH ANY STANDARDS COMMITTEE B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. TERMINAL SHAPE MAY VARY ACCORDING TO PACKAGE SUPPLIER, SEE TERMINAL SHAPE VARIANTS E. LAND PATTERN IS A MINIMAL TOE DESIGN F. DRAWING FILE NAME : UMLP16AREV3 Figure 15. 16-Lead Ultrathin Molded Leadless Package (UMLP) Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact an ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. www.onsemi.com 9 FSA2457 — Dual DPDT, 5 Ω Analog Data Switch Physical Dimensions FSA2457 — Dual DPDT, 5 Ω Analog Data Switch ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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