FSA2567UMX

Features Description      The FSA2567 is a bi-directional, low -pow er, dual doublepole, double-throw (4PDT) analog sw itch targeted at dual SIM card multiplexing. It is optimized for sw itching the WLAN-SIM data and control signals and dedicates one channel as a supply-source sw itch. Low On Capacitance for Data Path: 10 pF Typical Low On Resistance for Data Path: 6 Ω Typical Low On Resistance for Supply Path: 0.4 Ω Typical Wide V CC Operating Range: 1.65 V to 4.3 V Low Pow er Consumption: 1 μA Maximum - 15 μA Maximum ICCT Over Expanded Voltage Range (V IN=1.8 V, V CC=4.3 V)   Wide -3 db Bandw idth: > 160 MHz Packaged in: - Pb-free 16-Lead MLP & 16-Lead UMLP  3 kV ESD Rating, >12 kV Pow er/GND ESD Rating Applications   Cell phone, PDA, Digital Camera, and Notebook LCD Monitor, TV, and Set-Top Box The FSA2567 is compatible w ith the requirements of SIM cards and features a low on capacitance (CON) of 10 pF to ensure high-speed data transfer. The V SIM sw itch path has a low RON characteristic to ensure minimal voltage drop in the dual SIM card supply paths. The FSA2567 contains special circuitry that minimizes current consumption w hen the control voltage applied to the SEL pin is low er than the supply voltage (V CC). This feature is especially valuable in ultra-portable applications, such as cell phones; allow ing direct interface w ith the general-purpose I/Os of the baseband processor. Other applications include sw itching and connector sharing in portable cell phones, PDAs, digital cameras, printers, and notebook computers. Ordering Information Part Number Top Mark Operating Temperature Range FSA2567MPX FSA2567 -40 to +85°C FSA2567UMX GX © 2008 Semiconductor Components Industries, LLC. Nov ember-2017, Rev . 2 Package 16-Lead, Molded Leadless Package (MLP) Quad, JEDEC MO220, 3 mm Square 16-Lead, Quad, Ultrathin Molded Leadless Package (UMLP), 1.8 x 2.6 mm Publication Order Number: FSA2567/D FSA2567 — Low-Power, Dual SIM Card Analog Switch FSA2567 — Low-Power, Dual SIM Card Analog Switch 2VSIM VSIM 1RST 2RST 1CLK 2CLK 1DAT 2DAT RST CLK DAT Sel Figure 1. Analog Sym bol 13 16 15 14 13 1DAT 1DAT 14 VCC VCC 15 2V SIM 2V SIM 16 V SIM V SIM Pin Assignments 1V SIM 1 1VSIM 1 Sel 2 2RST 3 10 No Connect RST 4 9 12 DAT 12 DAT 11 2DAT 2RST 3 10 No Connect RST 4 9 1CLK Figure 2. Pad Assignm ent MLP16 (Top Through View ) 5 6 7 8 1RST GND 2CLK CLK Figure 3. Pad Assignm ent UMLP16 (Top Through View ) Pin Definitions Pin nDAT, nRST, nCLK nV SIM V SIM , DAT, RST, CLK Sel 1CLK 8 CLK 7 2CLK 6 GND 1RST 5 Sel 2 11 2DAT (Not connected to GND) Description Multiplexed Data Source Inputs Multiplexed SIM Supply Inputs Common SIM Ports Sw itch Select Truth Table Sel Function Logic LOW 1DAT = DAT, 1RST = RST, 1CLK = CLK, 1V SIM = V SIM Logic HIGH 2DAT = DAT, 2RST = RST, 2CLK = CLK, 2V SIM = V SIM www.onsemi.com 2 FSA2567 — Low-Power, Dual SIM Card Analog Switch 1VSIM Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol V CC Parameter Max. Unit -0.5 +5.5 V (1) -0.5 V CC V V SW DC Sw itch I/O Voltage(1) -0.5 V CC + 0.3 V IIK DC Input Diode Current -50 ISIM DC Output Current - V SIM 350 mA IOUT DC Output Current – DAT, CLK, RST 35 mA TST G Storage Temperature +150 °C V CNT RL Supply Voltage Min. DC Input Voltage (Sel) -65 mA All Pins 3 I/O to GND 12 Human Body Model, JEDEC: JESD22-A114 ESD Charged Device Model, JEDEC: JESD22-C101 kV 2 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol V CC V CNT RL Parameter Supply Voltage Control Input Voltage (Sel) (2) Min. Max. Unit 1.65 4.30 V 0 V CC V -0.5 V CC V V SW Sw itch I/O Voltage ISIM DC Output Current - V SIM 150 mA IOUT DC Output Current – DAT, CLK, RST 25 mA TA Operating Temperature +85 °C -40 Note: 2. The control input must be held HIGH or LOW; it must not float. www.onsemi.com 3 FSA2567 — Low-Power, Dual SIM Card Analog Switch Absolute Maximum Ratings All typical values are at 25°C, 3.3 V V CC unless otherw ise specified. Symbol Parameter Conditions VCC (V) TA=- 40ºC to +85ºC Min. V IK V IH V IL IIN Clamp Diode Voltage RONV 2.7 Input Voltage High Input Voltage Low Control Input Leakage Inc(off), Ino(off), Off State Leakage ROND IIN = -18 mA Data Path Sw itch On Resistance(3) V SIM Sw itch On Resistance(3) Typ. -1.2 1.65 to 2.3 1.1 2.7 to 3.6 1.3 4.3 1.7 Units Max. V V 1.65 to 2.3 0.4 2.7 to 3.6 0.5 4.3 0.7 V V SW = 0 to V CC 4.3 -1 1 µA nRST, nDAT, nCLK, nV SIM = 0.3 V or 3.6 V Figure 10 4.3 -60 60 nA V SW = 0, 1.8 V, ION = -20 mA Figure 9 1.8 V SW = 0, 2.3 V, ION = -20 mA Figure 9 2.7 6.0 10.0 V SW = 0, 1.8V, ION = -100mA Figure 9 1.8 0.5 0.7 V SW = 0, 2.3 V, ION = -100 mA Figure 9 2.7 0.4 0.2 7.0 12.0 Ω Ω ∆ROND Data Path Delta On Resistance(4) V SW = 0 V, ION = -20 mA 2.7 ICC Quiescent Supply Current V CNT RL = 0 or V CC, IOUT = 0 4.3 Increase in ICC Current Per Control Voltage and V CC V CNT RL = 2.6 V, V CC = 4.3 V 4.3 ICCT V CNT RL = 1.8 V, V CC = 4.3 V 4.3 0.6 Ω 1.0 µA 5.0 10.0 µA 7.0 15.0 µA Notes: 3. Measured by the voltage drop betw een nDAT, nRST, nCLK and relative common port pins at the indicated current through the sw itch. On resistance is determined by the low er of the voltage on the relative ports. 4. Guaranteed by characterization. www.onsemi.com 4 FSA2567 — Low-Power, Dual SIM Card Analog Switch DC Electrical Characteristics All typical value are for V CC=3.3V at 25°C unless otherw ise specified. Symbol Parameter Conditions VCC (V) TA=- 40°C to +85°C Min. Units Typ. Max. 1.8(5) 65 95 ns 2.7 to 3.6 42 60 ns 1.8(5) 30 50 ns 2.7 to 3.6 20 40 ns 1.8(5) 55 80 ns 2.7 to 3.6 35 55 ns 1.8(5) 35 50 2.7 to 3.6 22 40 0.25 ns Turn-On Time Sel to Output (DAT,CLK,RST) RL = 50 Ω, CL = 35 pF V SW = 1.5 V Figure 11, Figure 12 Turn-Off Time Sel to Output (DAT,CLK,RST) RL = 50 Ω, CL= 35 pF V SW = 1.5 V Figure 11, Figure 12 Turn-On Time Sel to Output (V SIM) RL = 50 Ω, CL = 35 pF V SW = 1.5 V Figure 11, Figure 12 Turn-Off Time Sel to Output (V SIM) RL = 50 Ω, CL = 35 pF V SW = 1.5 V Figure 11, Figure 12 Propagation Delay (5) (DAT,CLK,RST) CL = 35 pF, RL = 50 Ω Figure 11, Figure 13 3.3 tBBMD Break-Before-Make(5) (DAT,CLK,RST) RL = 50 Ω, CL = 35 pF V SW1 = V SW2 = 1.5 V Figure 15 2.7 to 3.6 3 18 ns tBBMV Break-Before-Make(5) (V SIM) RL = 50 Ω, CL = 35 pF V SW1 = V SW2 = 1.5 V Figure 15 2.7 to 3.6 3 12 ns Q Charge Injection (DAT,CLK,RST) CL = 50 pF, RGEN = 0 Ω, V GEN = 0 V 2.7 to 3.6 10 pC OIRR Off Isolation (DAT,CLK,RST) RL = 50 Ω, f = 10 MHz Figure 17 2.7 to 3.6 -60 dB Xtalk Non-Adjacent Channel Crosstalk (DAT,CLK,RST) RL = 50 Ω, f = 10 MHz Figure 18 2.7 to 3.6 -60 dB BW -3 db Bandw idth (DAT,CLK,RST) RL = 50 Ω, CL = 5 pF Figure 16 2.7 to 3.6 475 MHz tOND tOFFD tONV tOFFV tPD Note: 5. Guaranteed by characterization. www.onsemi.com 5 ns FSA2567 — Low-Power, Dual SIM Card Analog Switch AC Electrical Characteristics Symbol Parameter Conditions TA =- 40°C to +85°C Min. CIN Typ. Control Pin Input Capacitance V CC = 0 V 1.5 COND RST, CLK, DAT On Capacitance(6) V CC = 3.3 V, f = 1 MHz Figure 20 10 12 CONV V SIM On Capacitance(6) V CC = 3.3 V, f = 1 MHz Figure 20 110 150 COFFD RST, CLK, DAT Off Capacitance V CC = 3.3 V, Figure 19 3 COFFV V SIM Off Capacitance V CC = 3.3 V, Figure 19 40 Note: 6. Guaranteed by characterization. www.onsemi.com 6 Units Max. pF FSA2567 — Low-Power, Dual SIM Card Analog Switch Capacitance 0.50 5.00 4.00 RON (Ohms) 6.00 85°C 25°C -40°C 3.00 0.00 25°C 0.30 -40°C 0.20 0.10 1.00 2.00 -1.00 3.00 0.00 1.00 Figure 4. RON Data Path Figure 5. RON V SIM Frequency Response Off Isolation (dB) 0 1 10 100 -10 -30 -50 -70 -90 -110 Frequency (MHz) VCC = 2.7V Figure 6. Off Isolation Frequency Response 0 1 10 100 -5 -15 -25 -35 -45 -55 -65 -75 -85 -95 -105 -115 -125 Frequency (MHz) VCC = 2.7V Figure 7. Crosstalk Frequency Response 0 -1 -2 -3 -4 -5 -6 -7 -8 1 2.00 VIN, VCC = 2.7V VIN, VCC = 2.7V Crosstalk (dB) -1.00 85°C 0.40 0.00 2.00 Gain (dB) RON (Ohms) 7.00 10 100 Frequency (MHz) CL = 5pF, VCC = 2.7V Figure 8. Bandw idth www.onsemi.com 7 1000 10000 3.00 FSA2567 — Low-Power, Dual SIM Card Analog Switch Typical Performance Characteristics VON InA(OFF) NC nVSIM , nRST, nCLK, or nDAT A VSIM , RST, CLK, or DAT VSW VSW I ON GND GND GND R ON = VON / I ON V Sel VSel = 0 or VCC Figure 9. On Resistance = 0 or V CC Figure 10. Off Leakage tFALL = 2.5ns tRISE = 2.5ns nVSIM, nRST, nCLK,or nDAT VSIM, RST, CLK,or DAT VCC 90% VSW VOUT RL CL GND 10% GND GND Sel 90% Input – VSel VCC /2 VCC /2 10% VOH 90% 90% RL and C L are functions of the application environment (see tables for specific values). C includes test fixture and stray capacitance. L Output - VOUT VOL Figure 11. AC Test Circuit Load t ON t OFF Figure 12. Turn-On / Turn-Off Waveform s tRISE= 2.5ns tFALL= 2.5ns VCC 90% Input - VSW VCC /2 10% GND 90% VCC /2 10% VOH Output - VOUT 50% 50% VOL tpLH tpHL Figure 13. Propagation Delay nVSIM , nRST, nCLK, or nDAT VCC VSIM, RST, Logic Input CLK, or DAT VSW GND CL Sel RL VOUT Off On Off 0V GND ∆VOUT VOUT Q = ∆VOUT • CL Figure 14. Charge Injection www.onsemi.com 8 FSA2567 — Low-Power, Dual SIM Card Analog Switch Test Diagrams tRISE = 2.5ns nVSIM, nRST, nCLK or nDAT VSIM ,RST, CLK or DAT VSW1 GND VOUT CL VSW2 VCC InputVSel 10% 0V RL VOUT GND GND 90% VCC/2 0.9 • VOUT 0.9 • VOUT tBBM Sel RL and C L are functions of the application environment (see tables for specific values). CL includes test fixture and stray capacitance. Figure 15. Break-Before-Make Interval Tim ing Network Analyzer RS Network Analyzer RS VIN VS GND GND VSEL GND RS and RT are functions of the application environment (see tables for specific values). Figure 16. VSel VOUT GND GND RT VIN VS GND GND VOUT GND GND RS and RT are functions of the application environment (see tables for specific values). RT GND RT GND Off isolation = 20 Log (VOUT / VIN) Bandw idth Figure 17. Channel Off Isolation Network Analyzer RS NC VIN GND VS GND VSel GND RT GND GND RT RS and RT are functions of the application environment (see tables for specific values). VOUT GND Crosstalk= 20 Log (VOUT / VIN) Figure 18. Non-Adjacent Channel-to-Channel Crosstalk VSIM , RST, CLK, or DAT nVSIM, nRST, nCLK, or nDAT Capacitance Meter VSel = 0 or VCC VSel = 0 or VCC f = 1MHz f = 1MHz nVSIM, nRST, nCLK, or nDAT Figure 19. Capacitance Meter nVSIM , nRST, nCLK, or nDAT Channel Off Capacitance Figure 20. www.onsemi.com 9 Channel On Capacitance FSA2567 — Low-Power, Dual SIM Card Analog Switch Test Diagrams (Continued) 1.80 0.05 C A B 2X 2.10 0.563 (15X) 0.663 2.60 PIN#1 IDENT 1 2.90 0.05 C TOP VIEW 0.10 C 0.40 2X 0.50±0.05 0.225 (16X) 0.15±0.05 RECOMMENDED LAND PATTERN 0.08 C SEATING C PLANE 0.025±0.025 SIDE VIEW 0.50±0.05 1.80±0.05 5 0.40±0.05 (15X) 0.20±0.05 9 0.40 DETAIL A 45° DETAIL A SCALE : 2X 2.60±0.05 1 PIN#1 IDENT 16 13 0.20±0.05 (16X) BOTTOM VIEW 0.10 C A B 0.05 C NOTES: A. PACKAGE DOES NOT FULLY CONFORM TO JEDEC STANDARD. LEAD SHAPE AT PACKAGE EDGE R0.20 PACKAGE EDGE LEAD OPTION 1 SCALE : 2X LEAD OPTION 2 SCALE : 2X B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. E. DRAWING FILENAME: MKT-UMLP16Arev5. F. TERMINAL SHAPE MAY VARY ACCORDING TO PACKAGE SUPPLIER, SEE TERMINAL SHAPE VARIANTS. Figure 21. 16-Lead Ultrathin Molded Leadless Package (UMLP) www.onsemi.com 10 FSA2567 — Low-Power, Dual SIM Card Analog Switch Physical Dimensions FSA2567 — Low-Power, Dual SIM Card Analog Switch Physical Dimensions Figure 22. 16-Term inal Molded Leadless Package (MLP) www.onsemi.com 11 FSA2567 — Low-Power, Dual SIM Card Analog Switch ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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