HCPL2530

HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 PACKAGE HCPL-2503 SCHEMATIC N/C 1 8 VCC + 1 V 8 + 2 1 7 VB 8 VCC F1 _ 2 7 V01 3 6 V02 VF _ 3 6 VO _ V N/C 4 8 HCPL-4502 5 GND F2 + 4 5 GND 8 1 1 6N135, 6N136, HCPL-2503, HCPL-4502 HCPL-2530/HCPL-2531 Pin 7 is not connected in Part Number HCPL-4502 DESCRIPTION The HCPL-4502/HCPL-2503, 6N135/6 and HCPL-2530/HCPL-2531 optocouplers consist of an AlGaAs LED optically coupled to a high speed photodetector transistor. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor. An internal noise shield provides superior common mode rejection of 10kV/µs. An improved package allows superior insulation permitting a 480 V working voltage compared to industry standard of 220 V. FEATURES • • • • • • High speed-1 MBit/s Superior CMR-10 kV/µs Dual-Channel HCPL-2530/HCPL-2531 Double working voltage-480V RMS CTR guaranteed 0-70°C U.L. recognized (File # E90700) APPLICATIONS • • • • Line receivers Pulse transformer replacement Output interface to CMOS-LSTTL-TTL Wide bandwidth analog coupling © 2003 Fairchild Semiconductor Corporation Page 1 of 12 2/26/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Symbol Value Units Storage Temperature TSTG -55 to +125 °C Operating Temperature TOPR -55 to +100 °C Lead Solder Temperature TSOL 260 for 10 sec °C Each Channel (Note 1) IF (avg) 25 mA Each Channel (Note 2) IF (pk) 50 mA Each Channel IF (trans) 1.0 A Each Channel VR 5 V (6N135/6N136 and HCPL-2503/4502) (HCPL-2530/2531 ) Each Channel (Note 3) PD 100 45 mW EMITTER DC/Average Forward Input Current Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Peak Transient Input Current - (≤1 µs P.W., 300 pps) Reverse Input Voltage Input Power Dissipation DETECTOR Average Output Current Each Channel IO (avg) 8 mA Peak Output Current Each Channel IO (pk) 16 mA (6N135, 6N136 and HCPL-2503 only) Emitter-Base Reverse Voltage VEBR 5 V Supply Voltage VCC -0.5 to 30 V Output Voltage VO -0.5 to 20 V IB 5 mA 100 mW 35 mW Base Current (6N135, 6N136 and HCPL-2503 only) Output power dissipation (6N135, 6N136, HCPL-2503, HCPL-4502) (Note 4) © 2003 Fairchild Semiconductor Corporation (HCPL-2530, HCPL-2531) Each Channel Page 2 of 12 PD 2/26/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter Test Conditions EMITTER (IF = 16 mA, TA =25°C) Symbol Device Min 1.45 VF Input Forward Voltage (IF = 16 mA) Input Reverse Breakdown Voltage (IR = 10 µA) BVR Temperature coefficient of forward voltage (IF = 16 mA) (∆VF/∆TA) Typ** Max 1.7 1.8 5.0 Unit V V -1.6 mV/°C DETECTOR (IF = 0 mA, VO = VCC = 5.5 V) (TA =25°C) Logic high output current (IF = 0 mA, VO = VCC = 15 V) (TA =25°C) IOH (IF = 0 mA, VO = VCC = 15 V) All 0.001 0.5 6N135 6N136 HCPL-4502 HCPL-2503 0.005 1 All 50 6N135 6N136 HCPL-4502 HCPL-2503 120 (IF1 = IF2 = 16 mA, VO = Open) (VCC = 15 V) HCPL-2530 HCPL-2531 200 (IF = 0 mA, VO = Open, VCC = 15 V) (TA =25°C) 6N135 6N136 HCPL-4502 HCPL-2503 1 6N135 6N136 HCPL-4502 HCPL-2503 2 (IF = 16 mA, VO = Open) (VCC = 15 V) Logic low supply current Logic high supply current (IF = 0 mA, VO = Open) (VCC = 15 V) (IF = 0 mA, VO = Open) (VCC = 15 V) ICCL ICCH HCPL-2530 HCPL-2531 µA 200 µA 400 µA 0.02 4 ** All Typicals at TA = 25°C © 2003 Fairchild Semiconductor Corporation Page 3 of 12 2/26/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Parameter Test Conditions Symbol COUPLED (IF = 16 mA, VO = 0.4 V) (VCC = 4.5 V, TA =25°C) Current transfer ratio (Note 5) VOL=0.4V Min Typ** Max Unit 6N135 HCPL-2530 7 18 50 % 6N136 HCPL-4502 HCPL-2531 19 27 50 % HCPL-2503 12 27 % 5 21 % 15 30 % 9 30 % 6N135 VOL=0.5V HCPL-2530 VOL=0.4V 6N136 HCPL-4502 VOL=0.5V HCPL-2531 VOL=0.4V HCPL-2503 (IF = 16 mA, IO = 1.1 mA) (VCC = 4.5 V, TA =25°C) 6N135 0.18 0.4 HCPL-2530 0.18 0.5 6N136 HCPL-2503 0.25 0.4 HCPL-2531 0.25 0.5 (IF = 16 mA, VCC = 4.5 V) Logic low output voltage output voltage CTR Device (IF = 16 mA, IO = 3 mA) (VCC = 4.5 V, TA =25°C) VOL (IF = 16 mA, IO = 0.8 mA) (VCC = 4.5 V) 6N135 HCPL-2530 0.5 (IF = 16 mA, IO = 2.4 mA) (VCC = 4.5 V) HCPL-4502 HCPL-2531 0.5 V ** All Typicals at TA = 25°C © 2003 Fairchild Semiconductor Corporation Page 4 of 12 2/26/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V) Parameter Test Conditions Symbol Device Min Typ** Max Unit TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 6N135 HCPL-2530 0.45 1.5 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) TA = 25°C 6N136 HCPL-4502 HCPL-2503 HCPL-2531 0.45 0.8 µs 6N135 HCPL-2530 2.0 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) 6N136 HCPL-4502 HCPL-2503 HCPL-2531 1.0 µs TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 6N135 HCPL-2530 0.5 1.5 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) TA = 25°C 6N136 HCPL-4502 HCPL-2503 HCPL-2531 0.3 0.8 µs Propagation delay time to logic low (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) Propagation delay time to logic high Common mode transient immunity at logic high Common mode transient immunity at logic low TPHL TPLH (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 6N135 HCPL-2530 2.0 µs (RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) 6N136 HCPL-4502 HCPL-2503 HCPL-2531 1.0 µs (IF = 0 mA, VCM = 10 VP-P, RL = 4.1 kΩ) (Note 8) (Fig. 8) TA = 25°C 6N135 HCPL-2530 10,000 V/µs 6N136 HCPL-4502 HCPL-2503 HCPL-2531 10,000 V/µs 6N135 HCPL-2530 10,000 V/µs 6N136 HCPL-4502 HCPL-2503 HCPL-2531 10,000 V/µs (IF = 0 mA, VCM = 10 VP-P) TA = 25°C, (RL = 1.9 kΩ) (Note 8) (Fig. 8) |CMH| (IF = 16 mA, VCM = 10 VP-P, RL = 4.1 kΩ) (Note 8) (Fig. 8) TA = 25°C (IF = 16 mA, VCM = 10 VP-P) (RL = 1.9 kΩ) (Note 8) (Fig. 8) |CML| ** All Typicals at TA = 25°C © 2003 Fairchild Semiconductor Corporation Page 5 of 12 2/26/04 HIGH SPEED TRANSISTOR OPTOCOUPLERS SINGLE-CHANNEL: 6N135 DUAL-CHANNEL: HCPL-2530 6N136 HCPL-2531 HCPL-2503 HCPL-4502 ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified) Characteristics Input-output insulation leakage current Withstand insulation test voltage Resistance (input to output) Capacitance (input to output) DC Current gain Input-Input Insulation leakage current Input-Input Resistance Input-Input Capacitance Test Conditions (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000 VDC) (Note 9) Symbol Min Typ** II-O Max Unit 1.0 µA (RH ≤ 50%, TA = 25°C) (Note 9) ( t = 1 min.) VISO (Note 9) (VI-O = 500 VDC) RI-O 1012 Ω (Note 9) (f = 1 MHz) CI-O 0.6 pF (IO = 3 mA, VO = 5 V) 2500 VRMS HFE 150 (RH ≤ 45%, VI-I = 500 VDC) (Note 10) t = 5 s, (HCPL-2530/2531 only) II-I 0.005 µA (VI-I = 500 VDC) (Note 10) (HCPL-2530/2531 only) RI-I 1011 Ω (f = 1 MHz) (Note 10) (HCPL-2530/2531 only) CI-I 0.03 pF Notes 1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C. 2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C. 3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C. 4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C. 5. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 6. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1kΩ pull-up resistor. 7. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor. 8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO