LM48556TLX

LM48556 Fully Differential, Mono, Ceramic Speaker Driver December 10, 2008 LM48556 Fully Differential, Mono, Ceramic Speaker Driver General Description The LM48556 is a single supply, mono, ceramic speaker driver with an integrated charge-pump, designed for portable devices, such as cell phones, where board space is at a premium. The LM48556 charge pump allows the device to deliver 17.5VPP (typ) from a single 4.5V supply. Additionally, the charge pump features a soft start function that minimizes transient current during power-up. The LM48556 features high power supply rejection ratio (PSRR) of 80dB at 217Hz, allowing the device to operate in noisy environments without additional power supply conditioning. Flexible power supply requirements allow operation from 2.7V to 5.0V. Additionally, the LM48556 features a differential input function and an externally configurable gain. A low power shutdown mode reduces supply current consumption to 0.1μA. Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown. The LM48556 is available in an ultra-small 12-bump micro SMD package (2mm x 1.5mm). Key Specifications ■ Output Voltage Swing VDD = 3.6V, 1kHz VDD = 4.5V, 1kHz 14.2VPP (typ) 17.5VPP (typ) 80dB (typ) 4.8mA (typ) 0.5ms (typ) ■ Power Supply Rejection Ratio f = 217Hz, VDD = 3.6V ■ IDD at VDD = 3.6V ■ Wake-Up Time Features ■ ■ ■ ■ ■ Fully differential amplifier Externally configurable gain Integrated charge pump Low power shutdown mode Soft start function Applications ■ Mobile phones ■ PDA's ■ Digital cameras Boomer® is a registered trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 300572 www.national.com LM48556 Typical Application 300572d4 FIGURE 1. Typical Audio Amplifier Application Circuit www.national.com 2 LM48556 Connection Diagrams 12 Bump micro SMD 300572d6 Top View Order Number LM48556TL, LM48556TLX See NS Package Number TLA121AA 12 Bump micro SMD Package View 30057231 3 www.national.com LM48556 LM48556TL Marking 300572d5 Top View XY = Date Code TT = Lot Traceability G = Boomer Family K4 = LM48556TL Bump Descriptions Bump A1 A2 A3 B1 B2 B3 C1 C2 C3 D1 D2 D3 Name OUTSVDD IN+ SVSS OUT+ INCPVSS C1P SD C1N PGND PVDD Amplifier Inverting Output Signal Power Supply - Positive Amplifier Non-inverting Input Signal Power Supply - Negative Amplifier Non-inverting Output Amplifier Inverting Input Charge Pump Output Voltage Charge Pump Flying Capacitor Positive Terminal Active Low Reset Input. Connect to VDD for normal operation. Drive SD low to disable. Charge Pump Flying Capacitor Negative Terminal Power Ground Power Supply Description Ordering Information Order Number LM48556TL LM48556TLX Package 12 bump micro SMD 12 bump micro SMD Package Dwg # TLA121AA TLA121AA Transport Media 250 units on tape and reel 3000 units on tape and reel MSL 1 1 Green Status RoHS and no Sb/Br RoHS and no Sb/Br Features www.national.com 4 LM48556 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (SVDD, PVDD) (Note 1) Storage Temperature Input Voltage Power Dissipation (Note 3) ESD Rating(Note 4) ESD Rating (Note 5) 5.25V −65°C to +150°C −0.3V to VDD + 0.3V Internally limited 2000V 200V Junction Temperature Thermal Resistance 150°C 114°C/W  θJA (TL) Soldering Information See AN-1112 Micro SMD Wafer Level Chip Scale Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX Supply Voltage (SVDD, PVDD) (Note 2) −40°C ≤ TA ≤ +85°C 2.7V ≤ _VDD ≤ 5.0V The following specifications apply for VDD = 3.6V, AV-BTL = 20dB (R F = 200kΩ, RIN = 20kΩ), ZL = 15Ω+1μF, unless otherwise specified. Limits apply for TA = 25°C. LM48556 Symbol IDD ISD VOS TWU VOUT Parameter Quiescent Power Supply Current Shutdown Current Output Offset Voltage Wake-up Time Output Voltage Swing THD+N = 1% (max); f = 1kHz THD+N = 1% (max); f = 10kHz VOUT = 11VPP, f = 1kHz THD+N Total Harmonic Distortion + Noise AV = 0dB AV = 20dB εOS PSRR CMRR VLH VLL Output Noise Power Supply Rejection Ratio Common Mode Rejection Ratio Logic High Threshold Voltage Logic Low Threshold Voltage (Note 2) A-weighted filter, VIN = 0V Input referred VRIPPLE = 200mVPP, f = 217Hz Input Referred 0.005 0.03 8 80 70 60 60 1.2 0.45 % % μV dB (min) dB (min) V (min) V (max) VIN = 0V VSD = GND (Note 8) CIN = 0.47μF, AV = 1V/V (0dB) Conditions Typical (Note 6) 4.8 0.1 0.6 0.5 14.2 11.5 11 Limit (Note 7) 7 1 4 Units (Limits) mA (max) µA (max) mV (max) ms VPP VPP (min) Electrical Characteristics VDD = 3.6V The following specifications apply for VDD = 4.5V, AV-BTL = 20dB (R F = 200kΩ, RIN = 20kΩ), ZL = 15Ω+1μF, unless otherwise specified. Limits apply for TA = 25°C. LM48556 Symbol IDD ISD VOS TWU VOUT Parameter Quiescent Power Supply Current Shutdown Current Output Offset Voltage Wake-up Time Output Voltage Swing THD+N = 1% (max); f = 1kHz THD+N = 1% (max); f = 10kHz VOUT = 14VPP, f = 1kHz THD+N Total Harmonic Distortion + Noise AV = 0dB AV = 20dB εOS Output Noise A-weighted filter, VIN = 0V Input referred 0.005 0.03 8 % % μV VIN = 0V VSD = GND (Note 8) CIN = 0.47μF, AV = 1V/V (0dB) Conditions Typical (Note 6) 6.5 0.1 0.6 0.5 17.5 14.6 14 Limit (Note 7) 10 1 4 Units (Limits) mA (max) µA (max) mV (max) ms (max) VPP VPP (min) Electrical Characteristics VDD = 4.5V 5 www.national.com LM48556 LM48556 Symbol PSRR CMRR VLH VLL Parameter Power Supply Rejection Ratio Common Mode Rejection Ratio Logic High Threshold Voltage Logic Low Threshold Voltage Conditions VRIPPLE = 200mVPP, f = 217Hz, Input Referred Typical (Note 6) 80 70 Limit (Note 7) 60 60 1.2 0.45 Units (Limits) dB (min) dB (min) V (min) V (max) Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 7: Datasheet min/max specification limits are guaranteed by test or statistical analysis. Note 8: Shutdown current is measured in a normal room environment. The SD pin should be driven as close as possible to GND for minimum shutdown current. www.national.com 6 LM48556 Typical Performance Characteristics ( ZL = 15Ω+1μF, AV = 20dB, BW = 22kHz) THD+N vs Frequency VDD = 2.7V, VO = 8VPP THD+N vs Frequency VDD = 3.6V, VO = 14.2VPP 300572e2 300572e1 THD+N vs Frequency VDD = 4.5V, VO = 17.5VPP THD+N vs Output Voltage Swing VDD = 2.7V, f = 1kHz 300572d9 300572d8 THD+N vs Output Voltage Swing VDD = 3.6V, f = 1kHz THD+N vs Output Voltage Swing VDD = 4.5V, f = 1kHz 300572d7 300572e0 7 www.national.com LM48556 CMRR vs Frequency VDD = 2.7V, Input referred CMRR vs Frequency VDD = 3.6V, Input referred 300572d0 300572d1 CMRR vs Frequency VDD = 4.5V, Input referred PSRR vs Frequency VDD = 2.7V, Input referred 300572d2 30057274 PSRR vs Frequency VDD = 3.6V, Input referred PSRR vs Frequency VDD = 4.5V, Input referred 30057275 30057276 www.national.com 8 LM48556 Output Voltage vs Frequency VDD = 2.7V, THD+N = 1% Output Voltage vs Frequency VDD = 3.6V, THD+N = 1% 300572e8 300572e9 Output Voltage vs Frequency VDD = 4.5V, THD+N = 1% Supply Current vs Supply Voltage VIN = GND, No Load 300572f0 300572e3 Power Consumption vs Output Voltage Swing VDD = 2.7V, THD+N ≤ 1% Power Consumption vs Output Voltage Swing VDD = 3.6V, THD+N ≤ 1% 300572e4 300572e5 9 www.national.com LM48556 Power Consumption vs Output Voltage Swing VDD = 4.5V, THD+N ≤ 1% 300572e6 www.national.com 10 LM48556 Application Information GENERAL AMPLIFIER FUNCTION The LM48556 is a fully differential ceramic speaker driver that utilizes National’s inverting charge pump technology to deliver the high drive voltages required by ceramic speakers, without the need for noisy, board-space consuming inductive based regulators. The low-noise, inverting charge pump creates a negative supply (CPVSS) from the positive supply (PVDD). Because the amplifiers operate from these bipolar supplies, the maximum output voltage swing for each amplifier is doubled compared to a traditional single supply device. Additionally, the LM48556 is configured as a bridge-tied load (BTL) device, quadrupling the maximum theoretical output voltage range when compared to a single supply, single-ended output amplifier, see Bridged Configuration Explained section. The charge pump and BTL configuration allow the LM48556 to deliver over 17VP-P at 1kHz to a 1µF ceramic speaker while operating from a single 4.5V supply . DIFFERENTIAL AMPLIFIER EXPLANATION The LM48556 features a differential input stage, which offers improved noise rejection compared to a single-ended input amplifier. Because a differential input amplifier amplifies the difference between the two input signals, any component common to both signals is cancelled. An additional benefit of the differential input structure is the possible elimination of the DC input blocking capacitors. Since the DC component is common to both inputs, and thus cancelled by the amplifier, the LM48556 can be used without input coupling capacitors when configured with a differential input signal. BRIDGE CONFIGURATION EXPLAINED The LM48556 is designed to drive a load differentially, a configuration commonly referred to as a bridge-tied load (BTL). The BTL configuration differs from the single-ended configuration, where one side of the load is connected to ground. A BTL amplifier offers advantages over a single-ended device. Driving the load differentially doubles the output voltage compared to a single-ended amplifier under similar conditions. Any component common to both outputs is cancelled, thus there is no net DC voltage across the load, eliminating the DC blocking capacitors required by single-ended, single-supply amplifiers. SHUTDOWN FUNCTION The LM48556 features a low current shutdown mode. Set SD = GND to disable the amplifier and reduce supply current to 0.1µA. Switch SD between VDD and GND for minimum current consumption in shutdown. The LM48556 may be disabled with shutdown voltages less than 0.45V, however, the idle current will be greater than the typical 0.1µA value. PROPER SELECTION OF EXTERNAL COMPONENTS Power Supply Bypassing/Filtering Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the device as possible. Place a 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor from VDD to GND. Additional bulk capacitance may be added as required. Charge Pump Capacitor Selection Use low ESR ceramic capacitors (less than 100mΩ) for optimum performance. Charge Pump Flying Capacitor (C1) The flying capacitor (C1) affects the load regulation and output impedance of the charge pump. A C1 value that is too low results in a loss of current drive, leading to a loss of amplifier headroom. A higher valued C1 improves load regulation and lowers charge pump output impedance to an extent. Above 4.7µF, the RDS(ON) of the charge pump switches and the ESR of C1 and CSS dominate the output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. Charge Pump Hold Capacitor (CSS) The value and ESR of the hold capacitor (CSS) directly affects the ripple on CPVSS. Increasing the value of CSS reduces output ripple. Decreasing the ESR of CSS reduces both output ripple and charge pump output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. Gain Setting Resistor Selection The amplifier gain of the LM48556 is set by four external resistors, two per each input, RIN_ and RF_ (Figure 1). The amplifier gain is given by equation (1): AV = RF / RIN (V/V) (1) Careful matching of the resistor pairs, RF+ and RF-, and RIN+ and RIN-, is required for optimum performance. Any mismatch between the resistors results in a differential gain error that leads to an increase in THD+N, decrease in PSRR and CMRR, as well as an increase in output offset voltage. Resistors with a tolerance of 1% or better are recommended. The gain setting resistors should be placed as close to the device as possible. Keeping the input traces close together and of the same length increases noise rejection in noisy environments. Noise coupled onto the input traces which are physically close to each other will be common mode and easily rejected. Feedback Capacitor Selection Due to their capacitive nature, ceramic speakers poorly reproduce high frequency audio content. At high frequencies, a ceramic speaker presents a low impedance load to the amplifier, increasing the required drive current. The higher output current can drive the device into clipping, increasing THD+N. Low-pass filtering the audio signal improves audio quality by decreasing the signal amplitude at high frequencies, reducing the speaker drive current. Adding a capacitor in parallel with each feedback resistor creates a simple low-pass filter with the -3dB point determined by equation (2): f−3dB = 1 / 2πRFCF (Hz) (2) Where RF is the value of the feedback resistor determined by equation (1) in the Gain Setting Resistors Selection section, and CF is the value of the feedback capacitor. The feedback capacitor is optional and not required for normal operation. Input Capacitor Selection Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48556. The input capacitors create a high-pass filter with the input resistors RIN. The -3dB point of the high pass filter is found using Equation (3) below. 11 www.national.com LM48556 f = 1 / 2πRINCIN (Hz) (3) quencies, 217Hz in a GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors with a tolerance of 1% or better are recommended for impedance matching and improved CMRR and PSRR. SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION The LM48556 is compatible with single-ended sources. Figure 2 shows the typical single-ended applications circuit. In Where the value of RIN is determined by equation (1) in the Gain Setting Resistor Selection section. When the LM48556 is using a single-ended source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise fre- 30057286 FIGURE 2. Single-Ended Input Configuration www.national.com 12 LM48556 Bill Of Materials Component LM48556TL Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Capacitor Header, 2–Pin Resistor Resistor Resistor Resistor Header, 2–Pin Header, 2–Pin Header, 3–Pin LM48556TL 4.7μF, ceramic, low ESR (