LP38841SX-1.2

LP38841 0.8A Ultra Low Dropout Linear Regulators Stable with Ceramic Output Capacitors December 2004 LP38841 0.8A Ultra Low Dropout Linear Regulators Stable with Ceramic Output Capacitors General Description The LP38841 is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architecture consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability. The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in TO-220 and TO-263 packages. Dropout Voltage: 75 mV (typ) @ 0.8A load current. Quiescent Current: 30 mA (typ) at full load. Shutdown Current: 30 nA (typ) when S/D pin is low. Precision Output Voltage: 1.5% room temperature accuracy. Features n n n n n n n n n n n Ideal for conversion from 1.8V or 1.5V inputs Designed for use with low ESR ceramic capacitors 0.8V, 1.2V and 1.5V standard voltages available Ultra low dropout voltage (75mV @ 0.8A typ) 1.5% initial output accuracy Load regulation of 0.1%/A (typical) 30nA quiescent current in shutdown (typical) Low ground pin current at all loads Over temperature/over current protection Available in 5 lead TO220 and TO263 packages −40˚C to +125˚C junction temperature range Applications n ASIC Power Supplies In: - Desktops, Notebooks, and Graphics Cards, Servers - Gaming Set Top Boxes, Printers and Copiers n Server Core and I/O Supplies n DSP and FPGA Power Supplies n SMPS Post-Regulator Typical Application Circuit 20102801 * Minimum value required if Tantalum capacitor is used (see Application Hints). © 2004 National Semiconductor Corporation DS201028 www.national.com LP38841 Connection Diagrams 20102802 20102803 TO-220, Top View TO-263, Top View Pin Description Pin Name BIAS OUTPUT GND Description The bias pin is used to provide the low current bias voltage to the chip which operates the internal circuitry and provides drive voltage for the N-FET. The regulated output voltage is connected to this pin. This is both the power and analog ground for the IC. Note that both pin three and the tab of the TO-220 and TO-263 packages are at ground potential. Pin three and the tab should be tied together using the PC board copper trace material and connected to circuit ground. The high current input voltage which is regulated down to the nominal output voltage must be connected to this pin. Because the bias voltage to operate the chip is provided seperately, the input voltage can be as low as a few hundered millivolts above the output voltage. This provides a low power shutdown function which turns the regulated output OFF. Tie to VBIAS if this function is not used. INPUT SHUTDOWN Ordering Information Order Number LP38841S-0.8 LP38841SX-0.8 LP38841T-0.8 LP38841S-1.2 LP38841SX-1.2 LP38841T-1.2 LP38841S-1.5 LP38841SX-1.5 LP38841T-1.5 Package Type TO263-5 TO263-5 TO220-5 TO263-5 TO263-5 TO220-5 TO263-5 TO263-5 TO220-5 Package Drawing TS5B TS5B T05D TS5B TS5B T05D TS5B TS5B T05D Supplied As Rail Tape and Reel Rail Rail Tape and Reel Rail Rail Tape and Reel Rail www.national.com 2 LP38841 Block Diagram 20102824 3 www.national.com LP38841 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Lead Temp. (Soldering, 5 seconds) ESD Rating Human Body Model (Note 3) Machine Model (Note 9) Power Dissipation (Note 2) VIN Supply Voltage (Survival) VBIAS Supply Voltage (Survival) Shutdown Input Voltage (Survival) −65˚C to +150˚C 260˚C 2 kV 200V Internally Limited −0.3V to +6V −0.3V to +7V −0.3V to +7V IOUT (Survival) Output Voltage (Survival) Junction Temperature Internally Limited −0.3V to +6V −40˚C to +150˚C Operating Ratings VIN Supply Voltage Shutdown Input Voltage IOUT Operating Junction Temperature Range VBIAS Supply Voltage VOUT (VOUT + VDO) to 5.5V 0 to +5.5V 0.8A −40˚C to +125˚C 4.5V to 5.5V 0.8V to 1.5V Electrical Characteristics Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = 10 µF CER, COUT = 22 µF CER, CBIAS = 1 µF CER, VS/D = VBIAS. Min/Max limits are guaranteed through testing, statistical correlation, or design. Symbol VO Parameter Output Voltage Tolerance Conditions 10 mA < IL < 0.8A VO(NOM) + 1V ≤ VIN ≤ 5.5V 4.5V ≤ VBIAS ≤ 5.5V MIN 0.788 0.776 1.182 1.164 1.478 1.455 ∆VO/∆VIN ∆VO/∆IL VDO IQ(VIN) Output Voltage Line Regulation (Note 6) Output Voltage Load Regulation (Note 7) Dropout Voltage (Note 8) Quiescent Current Drawn from VIN Supply VO(NOM) + 1V ≤ VIN ≤ 5.5V 10 mA < IL < 0.8A IL = 0.8A 10 mA < IL < 0.8A V IQ(VBIAS) Quiescent Current Drawn from VBIAS Supply S/D TYP (Note 4) 0.8 1.2 1.5 0.01 0.1 75 30 0.06 2 0.03 2.6 0.7 MAX 0.812 0.824 1.218 1.236 1.523 1.545 Units V %/V 0.4 1.3 120 205 35 40 1 30 4 6 1 30 %/A mV mA µA mA µA A 1.3 ≤ 0.3V 10 mA < IL < 0.8A V S/D ≤ 0.3V ISC VSDT Td (OFF) Td (ON) IS/D θJ-A Short-Circuit Current Output Turn-off Threshold Turn-OFF Delay Turn-ON Delay S/D Input Current Junction to Ambient Thermal Resistance VOUT = 0V Output = ON Output = OFF RLOAD X COUT