A2T18S162W31GSR3

Freescale Semiconductor Technical Data Document Number: A2T18S162W31S Rev. 0, 5/2015 RF Power LDMOS Transistors N--Channel Enhancement--Mode Lateral MOSFETs These 32 W RF power LDMOS transistors are designed for cellular base station applications requiring very wide instantaneous bandwidth capability covering the frequency range of 1805 to 1880 MHz. A2T18S162W31SR3 A2T18S162W31GSR3 1800 MHz  Typical Single--Carrier W--CDMA Performance: VDD = 28 Vdc, IDQ = 1000 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Frequency Gps (dB) D (%) 1805 MHz 19.2 33.0 1840 MHz 20.1 1880 MHz 19.6 Output PAR (dB) ACPR (dBc) IRL (dB) 7.1 –34.8 –10 33.9 7.0 –34.6 –16 34.2 6.8 –34.3 –8 Features  Designed for Wide Instantaneous Bandwidth Applications  Greater Negative Gate--Source Voltage Range for Improved Class C Operation  Able to Withstand Extremely High Output VSWR and Broadband Operating Conditions  Optimized for Doherty Applications 1805–1880 MHz, 32 W AVG., 28 V AIRFAST RF POWER LDMOS TRANSISTORS NI--780S--2L2LA A2T18S162W31SR3 NI--780GS--2L2LA A2T18S162W31GSR3 4 VBW (1) RFin/VGS 1 3 RFout/VDS 2 VBW (1) (Top View) Figure 1. Pin Connections 1. Device can operate with the VDD current supplied through pin 2 or pin 4 alone.  Freescale Semiconductor, Inc., 2015. All rights reserved. RF Device Data Freescale Semiconductor, Inc. A2T18S162W31SR3 A2T18S162W31GSR3 1 Table 1. Maximum Ratings Symbol Value Unit Drain--Source Voltage Rating VDSS –0.5, +65 Vdc Gate--Source Voltage VGS –6.0, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg –65 to +150 C TC –40 to +125 C Case Operating Temperature Range Operating Junction Temperature Range (1,2) CW Operation @ TC = 25C Derate above 25C TJ –40 to +225 C CW 185 1.0 W W/C Symbol Value (2,3) Unit RJC 0.36 C/W Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case Case Temperature 76C, 32 W CW, 28 Vdc, IDQ = 1000 mA, 1840 MHz Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22--A114) 2 Machine Model (per EIA/JESD22--A115) B Charge Device Model (per JESD22--C101) IV Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 Adc Zero Gate Voltage Drain Leakage Current (VDS = 32 Vdc, VGS = 0 Vdc) IDSS — — 5 Adc Gate--Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 1 Adc Gate Threshold Voltage (VDS = 10 Vdc, ID = 160 Adc) VGS(th) 1.2 1.9 2.2 Vdc Gate Quiescent Voltage (VDD = 28 Vdc, ID = 1000 mAdc, Measured in Functional Test) VGS(Q) 2.1 2.7 3.1 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 1.6 Adc) VDS(on) 0.1 0.14 0.3 Vdc Characteristic Off Characteristics On Characteristics Functional Tests (4,5) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1000 mA, Pout = 32 W Avg., f = 1840 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset. Power Gain Gps 18.5 20.1 21.5 dB Drain Efficiency D 26.0 33.9 — % Output Peak--to--Average Ratio @ 0.01% Probability on CCDF Adjacent Channel Power Ratio Input Return Loss 1. 2. 3. 4. 5. PAR 6.6 7.0 — dB ACPR — –34.6 –32.0 dBc IRL — –16 –12 dB Continuous use at maximum temperature will affect MTTF. MTTF calculator available at http://www.freescale.com/rf/calculators. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955. Part internally matched both on input and output. Measurements made with devide in straight lead configuration, before any lead forming operation is applied. Lead forming is used for gull wing (GS) parts. (continued) A2T18S162W31SR3 A2T18S162W31GSR3 2 RF Device Data Freescale Semiconductor, Inc. Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQ = 1000 mA, f = 1840 MHz VSWR 10:1 at 32 Vdc, 169 W CW Output Power (3 dB Input Overdrive from 129 W CW Rated Power) No Device Degradation Typical Performance (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1000 mA, 1805–1880 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 129 — W  — –16 —  VBWres — 110 — MHz Gain Flatness in 75 MHz Bandwidth @ Pout = 32 W Avg. GF — 0.7 — dB Gain Variation over Temperature (–30C to +85C) G — 0.006 — dB/C P1dB — 0.005 — dB/C AM/PM (Maximum value measured at the P3dB compression point across the 1805–1880 MHz frequency range.) VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) Output Power Variation over Temperature (–30C to +85C) (1) Table 5. Ordering Information Device A2T18S162W31SR3 A2T18S162W31GSR3 Tape and Reel Information Package NI--780S--2L2LA R3 Suffix = 250 Units, 44 mm Tape Width, 13--inch Reel NI--780GS--2L2LA 1. Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table. A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 3 C9 C15 VDD VGG C10 C16 R1 C5 C26 C17 D67437 C18 C2 C11 C4 C12 C3 CUT OUT AREA C13 C1 C25 C23 C24 C14 A2T18S162W31S/GS Rev. 5 C6 R2 C19 C7 VGG C27 C20 C22 VDD C21 C8 Figure 2. A2T18S162W31SR3 Test Circuit Component Layout Table 6. A2T18S162W31SR3 Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C5, C6, C17, C18, C19, C20, C25 8.2 pF Chip Capacitors ATC100B8R2CT500XT ATC C2 0.2 pF Chip Capacitor ATC100B0R2BT500XT ATC C3 1.1 pF Chip Capacitor ATC100B1R1BT500XT ATC C4 0.3 pF Chip Capacitor ATC100B0R3BT500XT ATC C7, C8, C9, C10, C13, C14, C15, C16, C21, C22 10 F Chip Capacitors GRM32ER61H106KA12L Murata C11, C12 1.0 pF Chip Capacitors ATC100B1R0BT500XT ATC C23 2.0 pF Chip Capacitor ATC100B2R0BT500XT ATC C24 0.5 pF Chip Capacitor ATC100B0R5BT500XT ATC C26, C27 470 F, 63 V Electrolytic Capacitors MCGPR63V477M13X26 Multicomp R1, R2 2.37 , 1/4 W Chip Resistors CRCW12062R37FNEA Vishay PCB Rogers RO4350B, 0.020, r = 3.66 D67437 MTL A2T18S162W31SR3 A2T18S162W31GSR3 4 RF Device Data Freescale Semiconductor, Inc. TYPICAL CHARACTERISTICS 33 32 16.5 1760 –33.5 –6 –34.5 –35 IRL 1780 –3 –34 ACPR 17 –33 1800 1820 1840 1860 f, FREQUENCY (MHz) 1880 1900 –9 –12 –15 –35.5 1920 –18 –2.7 –2.8 –2.9 –3 –3.1 PARC (dB) 34 IRL, INPUT RETURN LOSS (dB) 17.5 35 ACPR (dBc) Gps, POWER GAIN (dB) VDD = 28 Vdc, Pout = 32 W (Avg.), IDQ = 1000 mA, Single--Carrier 21 W--CDMA, 3.84 MHz Channel Bandwidth 20.5 D 20 Gps 19.5 Input Signal PAR = 9.9 dB 19 @ 0.01% = Probability on CCDF 18.5 PARC 18 D, DRAIN EFFICIENCY (%) 36 21.5 –3.2 IMD, INTERMODULATION DISTORTION (dBc) Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression (PARC) Broadband Performance @ Pout = 32 Watts Avg. 0 VDD = 28 Vdc, Pout = 48 W (PEP), IDQ = 1000 mA Two--Tone Measurements, (f1 + f2)/2 = Center Frequency of 1840 MHz –15 IM3--U –30 IM3--L –45 IM7--L IM7--U –60 –75 IM5--U IM5--L 10 1 300 100 TWO--TONE SPACING (MHz) 20.2 0 20 19.8 19.6 19.4 19.2 VDD = 28 Vdc, IDQ = 1000 mA, f = 1840 MHz Single--Carrier W--CDMA D –1 Gps –2 dB = 25 W 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF –4 –5 5 15 40 –30 30 –3 dB = 34.4 W ACPR –3 –25 35 –1 dB = 17.4 W –2 45 25 35 Pout, OUTPUT POWER (WATTS) PARC 45 25 –35 –40 ACPR (dBc) 1 D DRAIN EFFICIENCY (%) 20.4 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) Figure 4. Intermodulation Distortion Products versus Two--Tone Spacing –45 20 –50 15 55 –55 Figure 5. Output Peak--to--Average Ratio Compression (PARC) versus Output Power A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 5 TYPICAL CHARACTERISTICS 1840 MHz 20 1 –10 30 1880 MHz Gps 1840 MHz 1805 MHz 14 12 50 40 1805 MHz 1840 MHz 1880 MHz 16 0 ACPR 1805 MHz 1880 MHz 18 60 20 10 0 300 10 100 Pout, OUTPUT POWER (WATTS) AVG. –20 –30 –40 ACPR (dBc) Gps, POWER GAIN (dB) VDD = 28 Vdc, IDQ = 1000 mA, Single--Carrier W--CDMA 3.84 MHz Channel Bandwidth, Input Signal D 22 PAR = 9.9 dB @ 0.01% Probability on CCDF D, DRAIN EFFICIENCY (%) 24 –50 –60 Figure 6. Single--Carrier W--CDMA Power Gain, Drain Efficiency and ACPR versus Output Power 0 21 Gain –3 19 –6 18 –9 17 –12 16 IRL 15 1650 1700 1750 VDD = 28 Vdc Pin = 0 dBm IDQ = 1000 mA 1800 1850 1900 f, FREQUENCY (MHz) 1950 IRL (dB) GAIN (dB) 20 –15 2000 –18 2050 Figure 7. Broadband Frequency Response A2T18S162W31SR3 A2T18S162W31GSR3 6 RF Device Data Freescale Semiconductor, Inc. Table 7. Load Pull Performance — Maximum Power Tuning VDD = 28 Vdc, IDQ = 1083 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Output Power P1dB f (MHz) Zsource () Zin () 1805 0.48 – j2.25 0.52 + j2.43 1840 0.59 – j2.30 0.58 + j2.50 1880 0.56 – j2.51 0.57 + j2.65 Zload () (1) Gain (dB) (dBm) (W) D (%) AM/PM () 2.23 – j3.56 18.3 51.6 145 50.1 –9 2.09 – j3.66 18.0 51.5 143 47.5 –9 1.55 – j2.49 18.9 51.8 152 53.1 –9 Max Output Power P3dB f (MHz) Zsource () Zin () Zload (2) () Gain (dB) (dBm) (W) D (%) AM/PM () 1805 0.48 – j2.25 0.46 + j2.49 2.16 – j3.48 16.3 52.8 189 54.7 –13 1840 0.59 – j2.30 0.51 + j2.56 2.13 – j3.47 16.3 52.7 185 53.5 –13 1880 0.56 – j2.51 0.53 + j2.71 1.71 – j2.74 16.8 52.9 196 57.7 –14 (1) Load impedance for optimum P1dB power. (2) Load impedance for optimum P3dB power. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Table 8. Load Pull Performance — Maximum Drain Efficiency Tuning VDD = 28 Vdc, IDQ = 1083 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle Max Drain Efficiency P1dB f (MHz) Zsource () Zin () Zload (1) () Gain (dB) (dBm) (W) D (%) AM/PM () 1805 0.48 – j2.25 0.46 + j2.41 2.96 – j0.53 21.9 49.6 91 61.6 –9 1840 0.59 – j2.30 0.51 + j2.53 2.38 – j0.51 22.0 49.6 91 61.8 –11 1880 0.56 – j2.51 0.53 + j2.66 1.99 – j0.37 22.5 49.3 85 65.0 –14 Max Drain Efficiency P3dB Gain (dB) (dBm) (W) D (%) AM/PM () 3.34 – j0.09 20.3 50.4 110 67.7 –17 0.50 + j2.59 2.82 – j0.79 19.8 51.0 125 66.9 –17 0.53 + j2.72 2.42 – j0.87 19.9 51.0 126 68.4 –20 f (MHz) Zsource () Zin () 1805 0.48 – j2.25 0.46 + j2.49 1840 0.59 – j2.30 1880 0.56 – j2.51 Zload () (2) (1) Load impedance for optimum P1dB efficiency. (2) Load impedance for optimum P3dB efficiency. Zsource = Measured impedance presented to the input of the device at the package reference plane. Zin = Impedance as measured from gate contact to ground. Zload = Measured impedance presented to the output of the device at the package reference plane. Input Load Pull Tuner and Test Circuit Output Load Pull Tuner and Test Circuit Device Under Test Zsource Zin Zload A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 7 P1dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz 1 0 0 E –1 IMAGINARY () 49 49.5 –2 51 50.5 50 –3 P 51.5 –4 –2 56 –3 54 P –4 52 50.5 –5 1 1.5 2 2.5 3.5 3 REAL () 4.5 4 –5 5 Figure 8. P1dB Load Pull Output Power Contours (dBm) 1 0 0 22 21.5 IMAGINARY () IMAGINARY () E 21 –2 20.5 –3 20 P –4 19.5 18 –5 1 1.5 2 2.5 3.5 3 REAL () 4 2 1.5 1 –16 2.5 48 3.5 3 REAL () 4.5 4 –14 5 –8 –12 –1 E –10 –2 –8 –3 P –4 19 18.5 46 50 Figure 9. P1dB Load Pull Efficiency Contours (%) 1 –1 58 60 –1 52 54 56 48.5 E IMAGINARY () 1 47.5 48 –8 4.5 5 Figure 10. P1dB Load Pull Gain Contours (dB) NOTE: –5 1 1.5 2 2.5 3.5 3 REAL () 4 4.5 5 Figure 11. P1dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T18S162W31SR3 A2T18S162W31GSR3 8 RF Device Data Freescale Semiconductor, Inc. P3dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz 1 1 49 48.5 49.5 0 50.5 66 E IMAGINARY () IMAGINARY () 50 –1 51 –2 51.5 –3 P 62 1 52 1.5 2 2.5 3.5 3 REAL () 4.5 4 –5 5 58 56 50 2 1.5 1 2.5 3.5 3 REAL () 1 –26 20.5 19.5 18.5 –3 18 P 3.5 3 REAL () 5 4 E –1 –14 –2 –3 –12 –4 17 16.5 2.5 4.5 –18 –20 P 17.5 –4 2 4 –16 19 1.5 –22 0 –2 1 –24 20 IMAGINARY () E –1 54 52 Figure 13. P3dB Load Pull Efficiency Contours (%) 1 0 60 –3 P Figure 12. P3dB Load Pull Output Power Contours (dBm) IMAGINARY () 64 –2 –4 51.5 –5 E –1 52 52.5 –4 –5 60 0 4.5 5 Figure 14. P3dB Load Pull Gain Contours (dB) NOTE: –5 –10 1 2 1.5 2.5 3.5 3 REAL () 4 4.5 5 Figure 15. P3dB Load Pull AM/PM Contours () P = Maximum Output Power E = Maximum Drain Efficiency Gain Drain Efficiency Linearity Output Power A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 9 PACKAGE DIMENSIONS A2T18S162W31SR3 A2T18S162W31GSR3 10 RF Device Data Freescale Semiconductor, Inc. A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 11 A2T18S162W31SR3 A2T18S162W31GSR3 12 RF Device Data Freescale Semiconductor, Inc. A2T18S162W31SR3 A2T18S162W31GSR3 RF Device Data Freescale Semiconductor, Inc. 13 PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS Refer to the following resources to aid your design process. Application Notes  AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins  EB212: Using Data Sheet Impedances for RF LDMOS Devices Software  Electromigration MTTF Calculator  RF High Power Model  s2p File Development Tools  Printed Circuit Boards To Download Resources Specific to a Given Part Number: 1. Go to http://www.freescale.com/rf 2. Search by part number 3. Click part number link 4. Choose the desired resource from the drop down menu REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 May 2015 Description  Initial Release of Data Sheet A2T18S162W31SR3 A2T18S162W31GSR3 14 RF Device Data Freescale Semiconductor, Inc. How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. 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