MOTOROLA
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by MC34118/D
SEMICONDUCTOR TECHNICAL DATA
ARCHIVED - 6/2010
MC34118
Voice Switched
Speakerphone Circuit
Silicon Monolithic Integrated Circuit
The MC34118 Voice Switched Speakerphone Circuit incorporates the
necessary amplifiers, attenuators, level detectors, and control algorithm to form
the heart of a high quality hands--free speakerphone system. Included are a
microphone amplifier with adjustable gain and MUTE control, Transmit and
Receive attenuators which operate in a complementary manner, level detectors
at both input and output of both attenuators, and background noise monitors for
both the transmit and receive channels. A Dial Tone Detector prevents the dial
tone from being attenuated by the Receive background noise monitor circuit.
Also included are two line driver amplifiers which can be used to form a hybrid
network in conjunction with an external coupling transformer. A high--pass filter
can be used to filter out 60 Hz noise in the receive channel, or for other filtering
functions. A Chip Disable pin permits powering down the entire circuit to
conserve power on long loops where loop current is at a minimum.
The MC34118 may be operated from a power supply, or it can be powered
from the telephone line, requiring typically 5.0 mA. The MC34118 can be
interfaced directly to Tip and Ring (through a coupling transformer) for
stand--alone operation, or it can be used in conjunction with a handset speech
network and/or other features of a featurephone.
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1
1
PIN CONNECTIONS
(Top View)
TIP
BACKGROUND
NOISE MONITOR
VOLUME
CONTROL
LEVEL
DETECTORS
ATTENUATOR
CONTROL
ZB
Rx
ATTENUATOR
28
GND
2
27
CPR
CD
3
26
RLI1
VCC
4
25
RLO1
HTO+
5
24
TLO1
HTO--
6
23
TLI1
HTI
7
22
RXO
TXO
8
21
RXI
TXI
9
20
RLI2
MCO
10
19
RLO2
MCI
11
18
TLO2
MUT
12
17
TLI2
VLC
13
16
CPT
CT
14
15
VB
Device
MC34118DW/EG/R2
--1.0
LEVEL
DETECTORS
MC34118P
Operating
Temperature
Range
TA = --20° to +60°C
Package
28 SOICW
28 PDIP
RING
BACKGROUND
NOISE MONITOR
DIAL TONE
DETECTOR
SPEAKER
1
FI
ORDERING INFORMATION
Tx
ATTENUATOR
AGC
FO
(Pin assignments same for both packages)
SIMPLIFIED BLOCK DIAGRAM
MIKE
EG (Pb--free)
SUFFIX
DW SUFFIX
PLASTIC PACKAGE
CASE 751F
28--SOICW
28
Improved Attenuator Gain Range: 52 dB Between Transmit and Receive
Low Voltage Operation for Line--Powered Applications (3.0 -- 6.5 V)
4--Point Signal Sensing for Improved Sensitivity
Background Noise Monitors for Both Transmit and Receive Paths
Microphone Amplifier Gain Set by External Resistors — Mute Function
Included
Chip Disable for Active/Standby Operation
On Board Filter Pinned--Out for User Defined Function
Dial Tone Detector to Inhibit Receive Idle Mode During Dial Tone Presence
Standard 28--Pin Plastic DIP Package and SOIC Package Available
Compatible with MC34119 Speaker Amplifier
Motorola now offers Pb--free packages with suffix code EG
MUTE
P SUFFIX
PLASTIC PACKAGE
CASE 710
28--PDIP
28
BIAS
FILTER
VCC
CHIP
DISABLE
POWER AMP
(EXTERNAL)
REV 1
10/03
©
Motorola, Inc. 2003
MOTOROLA
MC34118
1
ABSOLUTE MAXIMUM RATINGS
Parameter
Value
Units
-- 1.0, + 7.0
Vdc
Voltage at CD (Pin 3), MUT (Pin 12)
-- 1.0, VCC + 1.0
Vdc
Voltage at VLC (Pin 13)
-- 1.0, VCC + 0.5
Vdc
Voltage at TXI (Pin 9), RXI (Pin 21), FI (Pin 2)
-- 0.5, VCC + 0.5
Vdc
-- 65 to + 150
°C
Supply Voltage (Pin 4)
Storage Temperature Range
Devices should not be operated at or outside these values. The “Recommended Operating
Limits” provide for actual device operation.
RECOMMENDED OPERATING LIMITS
Parameter
Min
Typ
Max
Units
3.5
—
6.5
Vdc
CD Input (Pin 3), MUT Input (Pin 12)
0
—
VCC
Vdc
IVB Current (Pin 15)
—
—
500
µA
0.3 x VB
—
VB
Vdc
Attenuator Input Signal Voltage (Pins 9, 21)
0
—
350
mVrms
Microphone Amplifier, Hybrid Amplifier Gain
0
—
40
dB
Load Current @ RXO, TXO (Pins 8, 22)
@ MCO (Pin 10)
@ HTO--, HTO+ (Pins 6, 5)
0
0
0
—
—
—
± 2.0
± 1.0
± 5.0
mA
Ambient Operating Temperature Range
-- 20
—
+ 60
°C
Supply Voltage (Pin 4) (See Text)
VLC (Pin 13)
ELECTRICAL CHARACTERISTICS (TA = + 25°C, VCC = 5.0 V, CD ≤ 0.8 V, unless noted)
Symbol
Min
Typ
Max
Units
ICC
—
—
5.5
600
8.0
800
mA
µA
RCD
VCDH
VCDL
50
2.0
0
90
—
—
—
VCC
0.8
kΩ
Vdc
Vdc
VB
—
1.8
1.3
2.1
—
2.4
Vdc
VB Output Resistance (IVB = 1.0 mA)
ROVB
—
400
—
Ω
VB Power Supply Rejection Ratio (CVB = 220 µF, f = 1.0 kHz)
PSRR
—
54
—
dB
GRX
GRX
∆GRX1
∆GRX2
GRXI
∆GRX3
+ 4.0
+ 4.0
-- 0.5
—
-- 22
49
+ 6.0
+ 6.0
0
-- 25
-- 20
52
+ 8.0
+ 8.0
+ 0.5
-- 15
-- 17
54
VCR
27
35
—
dB
Parameter
POWER SUPPLY
VCC Supply Current (VCC = 6.5 V, CD = 0.8 V)
(VCC = 6.5 V, CD = 2.0 V)
CD Input Resistance (VCC = VCD = 6.5 V)
CD Input Voltage — High
— Low
VB Output Voltage
(VCC = 3.5 V)
(VCC = 5.0 V)
ATTENUATORS (TA = + 25°C)
Receive Attenuator Gain (f = 1.0 kHz, VLC = VB)
Rx Mode, RXI = 150 mVrms (VCC = 5.0 V)
Rx Mode, RXI = 150 mVrms (VCC = 3.5 V)
Gain Change -- VCC = 3.5 V versus VCC = 5.0 V
AGC Gain Change -- VCC = 2.8 V versus VCC = 5.0 V*
Idle Mode, RXI = 150 mVrms
Range (Rx to Tx Mode)
Volume Control Range (Rx Mode, 0.3 VB < VLC < VB)
RXO DC Voltage (Rx Mode)
dB
VRXO
—
VB
—
Vdc
∆RXO DC Voltage (Rx to Tx Mode)
∆VRXO
—
± 10
± 150
mV
RXO High Voltage (Iout = -- 1.0 mA RXI = VB + 1.5 V)
VRXOH
3.7
—
—
Vdc
RXO Low Voltage (Iout = + 1.0 mA, RXI = VB -- 1.0,
Output measured with respect to VB)*
VRXOL
—
-- 1.5
-- 1.0
Vdc
RRXI
7.0
10
14
kΩ
RXI Input Resistance (RXI < 350 mVrms)
(continued)
MC34118
2
MOTOROLA
ELECTRICAL CHARACTERISTICS (TA = + 25°C, VCC = 5.0 V, CD ≤ 0.8 V, unless noted)
Symbol
Min
Typ
Max
Transmit Attenuator Gain (f = 1.0 kHz)
Tx Mode, TXI = 150 mVrms
Idle Mode, TXI = 150 mVrms
Range (Tx to Rx Mode)
GTX
GTXI
∆GTXI
+ 4.0
-- 22
49
+ 6.0
-- 20
52
+ 8.0
-- 17
54
TXO DC Voltage (Tx Mode)
VTXO
—
VB
—
Parameter
Units
ATTENUATORS (continued) (TA = + 25°C)
dB
Vdc
∆TXO DC Voltage (Tx to Rx Mode)
∆VTXO
—
± 30
± 150
mV
TXO High Voltage (Iout = -- 1.0 mA TXI = VB + 1.5 V)
VTXOH
3.7
—
—
Vdc
TXO Low Voltage (Iout = + 1.0 mA, TXI = VB -- 1.0 V,
Output measured with respect to VB)*
VTXOL
—
-- 1.5
-- 1.0
Vdc
TXI Input Resistance (TXI < 350 mVrms)
RTXI
7.0
10
14
kΩ
Gain Tracking (GRX + GTX, @ Tx, Idle, Rx)*
GTR
—
± 0.1
—
dB
—
—
—
+ 240
0
-- 240
—
—
—
* See text for explanation.
ATTENUATOR CONTROL (TA = + 25°C)
CT Voltage (Pin 14 -- VB)
Rx Mode (VLC = VB)
Idle Mode
Tx Mode
VCT
CT Source Current (switching to Rx mode)
ICTR
-- 85
-- 60
-- 40
µA
CT Sink Current (switching to Tx mode)
ICTT
+ 40
+ 60
+ 85
µA
CT Slow Idle Current
ICTS
—
0
—
µA
CT Fast Idle Internal Resistance
RFI
1.5
2.0
3.6
kΩ
VLC Input Current
IVLC
—
-- 60
—
nA
Dial Tone Detector Threshold
VDT
10
15
20
mV
0
+ 50
mVdc
mV
MICROPHONE AMPLIFIER (TA = + 25°C, VMUT ≤ 0.8 V, AVCL = 31 dB unless otherwise noted)
Output Offset (VMCO -- VB, Feedback R = 180 kΩ)
MCOVOS
-- 50
Open Loop Gain (f < 100 Hz)
AVOLM
70
80
—
dB
Gain Bandwidth
GBWM
—
1.0
—
MHz
Output High Voltage (Iout = -- 1.0 mA, VCC = 5.0 V)
VMCOH
3.7
—
—
Vdc
Output Low Voltage (Iout = + 1.0 mA)
VMCOL
—
—
200
mVdc
IBM
—
-- 40
—
nA
GMT
-- 55
—
—
-- 68
—
—
dB
Input Bias Current (@ MCI)
Muting (∆Gain) (f = 1.0 kHz, VMUT = 2.0 V)
(300 Hz < f < 10 kHz)
MUT Input Resistance (VCC = VMUT = 6.5 V)
RMUT
50
90
—
kΩ
MUT Input — High
VMUTH
2.0
—
VCC
Vdc
MUT Input — Low
VMUTL
0
—
0.8
Vdc
Distortion (300 Hz < f < 10 kHz)
THDM
—
0.15
—
%
HYBRID AMPLIFIERS (TA = + 25°C)
HTO -- Offset (VHTO-- -- VB, Feedback R = 51 kΩ)
HVOS
-- 20
0
+ 20
mVdc
HBVOS
-- 30
0
+ 30
mVdc
Open Loop Gain (HTI to HTO--, f < 100 Hz)
AVOLH
60
80
—
dB
Gain Bandwidth
GBWH
—
1.0
—
MHz
Closed Loop Gain (HTO-- to HTO+)
AVCLH
-- 0.35
0
+ 0.35
dB
IBH
—
-- 30
—
nA
HTO-- High Voltage (Iout = -- 5.0 mA)
VHT--H
3.7
—
—
Vdc
HTO-- Low Voltage (Iout = + 5.0 mA)
VHT--L
—
—
250
mVdc
HTO+ High Voltage (Iout = -- 5.0 mA)
VHT+H
3.7
—
—
Vdc
HTO+ Low Voltage (Iout = + 5.0 mA)
VHT+L
—
—
450
mVdc
Distortion (300 Hz < f < 10 kHz, See Figure 1)
THDH
—
0.3
—
%
HTO-- to HTO+ Offset (Feedback R = 51 kΩ)
Input Bias Current (@ HTI)
MOTOROLA
MC34118
3
Parameter
Symbol
Min
Typ
Max
Units
LEVEL DETECTORS AND BACKGROUND NOISE MONITORS (TA = + 25°C)
Transmit--Receive Switching Threshold
(Ratio of Current at RLI1 + RLI2 to 20 µA
at TLI1 + TLI2 to switch from Tx to Rx)
ITH
0.8
1.0
1.2
Source Current at RLO1, RLO2, TLO1, TLO2
ILSO
—
-- 2.0
—
mA
Sink Current at RLO1, RLO2, TLO1, TLO2
ILSK
—
4.0
—
µA
CPR, CPT Output Resistance (Iout = 1.5 mA)
RCP
—
35
—
Ω
CPR, CPT Leakage Current
ICPLK
—
-- 0.2
—
µA
FILTER (TA = + 25°C)
FOVOS
-- 200
-- 90
0
mV
FO Sink Current
Voltage Offset at FO (VFO -- VB, 220 kΩ from VB to FI)
IFO
150
260
400
µA
FI Bias Current
IFI
—
-- 50
—
nA
Rx Mode (From FI to RXO, FO connected to RXI)
THDR
—
0.5
3.0
%
Tx Mode (From MCI to HTO--/HTO+, includes Tx attenuator)
THDT
—
0.8
3.0
%
SYSTEM DISTORTION (TA = + 25°C, f = 1.0 kHz)
1. All currents into a device pin are positive, those out of a pin are negative. Algebraic convention rather than magnitude is used to define limits.
51 k
0.1
10 k
-+
HTI
VB
R
R
VB
-+
1200 Ω
Vin
HTO-X1 INSTR.
AMPLIFIER
TO DIST.
ANALYZER
HTO+
Figure 1. Hybrid Amplifier Distortion Test
TEMPERATURE CHARACTERISTICS
Typical Value
@ 25°C
Typical Change
-- 20 to + 60°C
VCC Supply Current (CD = 0.8 V)
5.0 mA
-- 0.3%/°C
VCC Supply Current (CD = 2.0 V)
400 µA
-- 0.4%/°C
VB Output Voltage (VCC = 5.0 V)
2.1 V
+ 0.8%/°C
Attenuator Gain (Max Gain)
+ 6.0 dB
0.0008 dB/°C
Attenuator Gain (Max Attenuation)
-- 46 dB
0.004 dB/°C
Parameter
Attenuator Input Resistance (@ TXI, RXI)
10 kΩ
+ 0.6%/°C
Dial Tone Detector Threshold
15 mV
+ 20 µV/°C
CT Source, Sink Current
± 60 µA
-- 0.15 %/°C
0 mV
± 4.0 µV/°C
1.0
± 0.02%/°C
4.0 µA
-- 10 nA/°C
0 dB
0.001%/°C
Microphone, Hybrid Amplifier Offset
Transmit--Receive Switching Threshold
Sink Current at RLO1, RLO2, TLO1, TLO2
Closed Loop Gain (HTO-- to HTO+)
MC34118
4
MOTOROLA
PIN DESCRIPTION
Pin
Name
1
FO
Filter output. Output impedance is less than
50 ohms.
2
FI
Filter input. Input impedance is greater than
1.0 Mohm.
3
CD
Chip Disable. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) disables the
IC to conserve power. Input impedance is
nominally 90 kΩ.
4
5
VCC
HTO+
Description
Pin
Name
Description
13
VLC
Volume control input. When VLC = VB, the
receive attenuator is at maximum gain when
in the receive mode. When VLC = 0.3 VB, the
receive gain is down 35 dB. Does not affect
the transmit mode.
14
CT
An RC at this pin sets the response time for
the circuit to switch modes.
15
VB
A supply voltage of + 2.8 to + 6.5 volts is
required, at ≈5.0 mA. As VCC falls from 3.5 to
2.8 volts, an AGC circuit reduces the receive
attenuator gain by ≈25 dB (when in the
receive mode).
An output voltage ≈VCC/2. This voltage is a
system ac ground, and biases the volume
control. A filter cap is required.
16
CPT
An RC at this pin sets the time constant for
the transmit background monitor.
Output of the second hybrid amplifier. The
gain is internally set at -- 1.0 to provide a
differential output, in conjunction with HTO--,
to the hybrid transformer.
17
TLI2
Input to the transmit level detector on the
mike/speaker side.
18
TLO2
Output of the first hybrid amplifier. The gain of
the amp is set by external resistors.
Output of the transmit level detector on the
mike/speaker side, and input to the transmit
background monitor.
19
RLO2
Output of the receive level detector on the
mike/speaker side.
6
HTO--
7
HTI
Input and summing node for the first hybrid
amplifier. DC level is ≈VB.
20
RLI2
8
TXO
Output of the transmit attenuator. DC level is
approximately VB.
Input to the receive level detector on the
mike/speaker side.
21
RXI
9
TXI
Input to the transmit attenuator. Max. signal
level is 350 mVrms. Input impedance is
≈10 kΩ.
Input to the receive attenuator and dial tone
detector. Max input level is 350 mV RMS.
Input impedance is ≈10 kΩ.
22
RXO
Output of the receive attenuator. DC level is
approximately VB.
10
MCO
Output of the microphone amplifier. The gain
of the amplifier is set by external resistors.
23
TLI1
11
MCI
Input and summing node of the microphone
amplifier. DC level is ≈VB.
Input to the transmit level detector on the line
side.
24
TLO1
12
MUT
Mute input. A logic low (< 0.8 V) sets normal
operation. A logic high (> 2.0 V) mutes the
microphone amplifier without affecting the rest
of the circuit. Input impedance is nominally
90 kΩ.
Output of the transmit level detector on the
line side.
25
RLO1
Output of the receive level detector on the line
side, and input to the receive background
monitor.
26
RLI1
Input to the receive level detector on the line
side.
27
CPR
An RC at this pin sets the time constant for
the receive background monitor.
28
GND
Ground pin for the entire IC.
NOTE: Pin numbers are identical for the DIP package and the SOIC
package.
MOTOROLA
MC34118
5
Figure 2. MC34118 Block Diagram
MC34118
6
MOTOROLA
VCC
VCC
MIKE
R
R
VB
BIAS
400
15
20
LEVEL DETECTORS
BACKGROUND
NOISE MONITOR
10
+
TLI2
MCO
--
RMF
11 V
B
MCI
SPEAKER
AMP
MC34119
GND
28
CD
3
4
VCC
18
19
RLO2
TLO2
16
CPT
MUTE
12
RMI
VB
RLI2
17
VB
CT 14
TXI
9
VLC 13
RXO
22
ATTENUATOR
CONTROL
AGC
VCC
VOLUME
VB
DIAL TONE
DETECTOR
-+
VB
Rx
ATTENUATOR
15
mV
Tx ATTENUATOR
23
8
21 RXI
26
VB
-+
VB
1
FO
R
-+
R
ZBAL
+1
FILTER
6 HTO--
BACKGROUND
NOISE MONITOR
HTI
7
RLI1
LEVEL DETECTORS
TLI1
RHI
TXO
RHF
FI
2
VB
TLO1
RLO1
25
24
27
CPR
HTO+
5
VCC
RING
TIP
FUNCTIONAL DESCRIPTION
INTRODUCTION
The fundamental difference between the operation of a
speakerphone and a handset is that of half--duplex versus
full--duplex. The handset is full duplex since conversation
can occur in both directions (transmit and receive) simultaneously. A speakerphone has higher gain levels in both
paths, and attempting to converse full duplex results in oscillatory problems due to the loop that exists within the system.
The loop is formed by the receive and transmit paths, the hybrid, and the acoustic coupling (speaker to microphone). The
only practical and economical solution used to date is to design the speakerphone to function in a half duplex mode —
i.e., only one person speaks at a time, while the other listens.
To achieve this requires a circuit which can detect who is
talking, switch on the appropriate path (transmit or receive),
and switch off (attenuate) the other path. In this way, the loop
gain is maintained less than unity. When the talkers exchange function, the circuit must quickly detect this, and
switch the circuit appropriately. By providing speech level detectors, the circuit operates in a “hands--free” mode, eliminating the need for a “push--to--talk” switch.
The handset, by the way, has the same loop as the speakerphone. But since the gains are considerably lower, and
since the acoustic coupling from the earpiece to the mouth
piece is almost non--existent (the receiver is normally held
against a person’s ear), oscillations don’t occur.
The MC34118 provides the necessary level detectors, attenuators, and switching control for a properly operating
speakerphone. The detection sensitivity and timing are externally controllable. Additionally, the MC34118 provides
background noise monitors which make the circuit insensitive to room and line noise, hybrid amplifiers for interfacing to
Tip and Ring, the microphone amplifier, and other associated
functions. Please refer to the Block Diagram (Figure 2) when
reading the following sections.
ATTENUATORS
The transmit and receive attenuators are complementary
in function, i.e., when one is at maximum gain (+ 6.0 dB), the
other is at maximum attenuation (-- 46 dB), and vice versa.
They are never both fully on or both fully off. The sum of their
gains remains constant (within a nominal error band of
± 0.1 dB) at a typical value of -- 40 dB (see Figure 10). Their
purpose is to control the transmit and receive paths to provide the half--duplex operation required in a speakerphone.
The attenuators are non--inverting, and have a -- 3.0 dB
(from max gain) frequency of ≈100 kHz. The input impedance of each attenuator (TXI and RXI) is nominally 10 kΩ
(see Figure 3), and the input signal should be limited to
350 mVrms (990 mVp--p) to prevent distortion. That maximum recommended input signal is independent of the volume control setting. The diode clamp on the inputs limits the
input swing, and therefore the maximum negative output
swing. This is the reason for VRXOL and VTXOL specification
MOTOROLA
being defined as they are in the Electrical Characteristics.
The output impedance is < 10 Ω until the output current limit
(typically 2.5 mA) is reached.
VB
10 k
TXI
(RXI)
4.0 k
96 k
TO ATTENUATOR
INPUT
Figure 3. Attenuator Input Stage
The attenuators are controlled by the single output of the
Control Block, which is measurable at the CT pin (Pin 14).
When the CT pin is at + 240 millivolts with respect to VB, the
circuit is in the receive mode (receive attenuator is at
+ 6.0 dB). When the CT pin is at -- 240 millivolts with respect
to VB, the circuit is in the transmit mode (transmit attenuator
is at + 6.0 dB). The circuit is in an idle mode when the CT
voltage is equal to VB, causing the attenuators’ gains to be
halfway between their fully on and fully off positions (-- 20 dB
each). Monitoring the CT voltage (with respect to VB) is the
most direct method of monitoring the circuit’s mode.
The inputs to the Control Block are seven: 2 from the
comparators operated by the level detectors, 2 from the
background noise monitors, the volume control, the dial-tone detector, and the AGC circuit. These seven inputs are
described below.
LEVEL DETECTORS
There are four level detectors — two on the receive side
and two on the transmit side. Refer to Figure 4 — the terms
in parentheses form one system, and the other terms form
the second system. Each level detector is a high gain amplifier with back--to--back diodes in the feedback path, resulting
in non--linear gain, which permits operation over a wide
dynamic range of speech levels. Refer to the graphs of Figures 11, 12 and 13 for their dc and ac transfer characteristics.
The sensitivity of each level detector is determined by the external resistor and capacitor at each input (TLI1, TLI2, RLI1,
and RLI2). Each output charges an external capacitor
through a diode and limiting resistor, thus providing a dc representation of the input ac signal level. The outputs have a
quick rise time (determined by the capacitor and an internal
350 Ω resistor), and a slow decay time set by an internal current source and the capacitor. The capacitors on the four outputs should have the same value (± 10%) to prevent timing
problems.
Referring to Figure 2, on the receive side, one level detector (RLI1) is at the receive input receiving the same signal as
at Tip and Ring, and the other (RLI2) is at the output of the
MC34118
7
LEVEL DETECTOR
RLI1
(TLI2)
5.1 k
SIGNAL
INPUT
SIGNAL
INPUT
VB
-+
350 Ω
RLO1
(TLO2)
0.1 µF
2.0 µF
-+
+
-4.0
µA
CPR
(CPT)
BACKGROUND
NOISE MONITOR
36 mV
-+
100 k
VCC
47 µF
56 k
33 k
VB
0.1 µF
LEVEL DETECTOR
C4
(C3)
5.1 k
TLI1
(RLI2)
VB
-+
-+
350 Ω
TLO1
(RLO2)
2.0 µF
4.0
µA
C2
(C1)
TO ATTENUATOR
CONTROL BLOCK
COMPARATOR
NOTE: External component values are
applicaton dependent.
Figure 4. Level Detectors
speaker amplifier. On the transmit side, one level detector
(TLI2) is at the output of the microphone amplifier, while the
other (TLI1) is at the hybrid output. Outputs RLO1 and TLO1
feed a comparator, the output of which goes to the Attenuator
Control Block. Likewise, outputs RLO2 and TLO2 feed a
second comparator which also goes to the Attenuator Control Block. The truth table for the effects of the level detectors
on the Control Block is given in the section describing the
Control Block.
BACKGROUND NOISE MONITORS
The purpose of the background noise monitors is to distinguish speech (which consists of bursts) from background
noise (a relatively constant signal level). There are two background noise monitors — one for the receive path and one
for the transmit path. Referring to Figure 4, the receive background noise monitor is operated on by the RLI1--RLO1 level
detector, while the transmit background noise monitor is operated on by the TLI2--TLO2 level detector. They monitor the
background noise by storing a dc voltage representative of
the respective noise levels in capacitors at CPR and CPT.
The voltages at these pins have slow rise times (determined
by the external RC), but fast decay times. If the signal at RLI1
(or TLI2) changes slowly, the voltage at CPR (or CPT) will
remain more positive than the voltage at the non--inverting
input of the monitor’s output comparator. When speech is
present, the voltage on the noninverting input of the comparator will rise quicker than the voltage at the inverting input
(due to the burst characteristic of speech), causing its output
to change. This output is sensed by the Attenuator Control
Block.
The 36 mV offset at the comparator’s input keeps the
comparator from changing state unless the speech level exceeds the background noise by ≈4.0 dB. The time constant
MC34118
8
of the external RC (≈4.7 seconds) determines the response
time to background noise variations.
VOLUME CONTROL
The volume control input at VLC (Pin 13) is sensed as a
voltage with respect to VB. The volume control affects the
attenuators only in the receive mode. It has no effect in the
idle or transmit modes.
When in the receive mode, the gain of the receive attenuator will be + 6.0 dB, and the gain of the transmit attenuator
will be -- 46 dB only when VLC is equal to VB. As VLC is reduced below VB, the gain of the receive attenuator is reduced
(see Figure 14), and the gain of the transmit attenuator is
increased such that their sum remains constant. Changing
the voltage at VLC changes the voltage at CT (see the Attenuator Control Block section), which in turn controls the
attenuators.
The volume control setting does not affect the maximum
attenuator input signal at which noticeable distortion occurs.
The bias current at VLC is typically 60 nA out of the pin,
and does not vary significantly with the VLC voltage or with
VCC.
DIAL TONE DETECTOR
The dial tone detector is a comparator with one side connected to the receive input (RXI) and the other input connected to VB with a 15 mV offset (see Figure 5). If the circuit
is in the receive mode, and the incoming signal is greater
than 15 mV (10 mVrms), the comparator’s output will
change, disabling the receive idle mode. The receive attenuator will then be at a setting determined solely by the volume
control.
The purpose of this circuit is to prevent the dial tone
MOTOROLA
(which would be considered as continuous noise) from fading away as the circuit would have the tendency to switch to
the idle mode. By disabling the receive idle mode, the dial
tone remains at the normally expected full level.
TO Rx
ATTENUATOR
RXI
TO
ATTENUATOR
CONTROL
BLOCK
-+
15 mV
C4
VB
Figure 5. Dial Tone Detector
AGC
The AGC circuit affects the circuit only in the receive
mode, and only when the supply voltage (VCC) is less than
3.5 volts. As VCC falls below 3.5 volts, the gain of the receive
attenuator is reduced according to the graph of Figure 15.
The transmit path attenuation changes such that the sum of
the transmit and receive gains remains constant.
The purpose of this feature is to reduce the power (and
current) used by the speaker when a line--powered speakerphone is connected to a long line, where the available power
is limited. By reducing the speaker power, the voltage sag at
VCC is controlled, preventing possible erratic operation.
ATTENUATOR CONTROL BLOCK
The Attenuator Control Block has the seven inputs described above:
— The output of the comparator operated by RLO2 and
TLO2 (microphone/speaker side) — designated C1.
— The output of the comparator operated by RLO1 and
TLO1 (Tip/Ring side) — designated C2.
— The output of the transmit background noise monitor —
designated C3.
— The output of the receive background noise monitor —
designated C4.
— The volume control.
— The dial tone detector.
— The AGC circuit.
The single output of the Control Block controls the two attenuators. The effect of C1 -- C4 is as follows:
Inputs
C1
C2
C3
C4
Output
Mode
Tx
Tx
Rx
Rx
Tx
Tx
Rx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
1
y
y
X
0
0
0
X
X
y
y
1
X
0
0
0
Transmit
Fast Idle
Fast Idle
Receive
Slow Idle
Slow Idle
Slow Idle
Slow Idle
X = Don’t Care; y = C3 and C4 are not both 0.
MOTOROLA
A definition of the above terms:
1) “Transmit” means the transmit attenuator is fully on (+ 6.0 dB),
and the receive attenuator is at max. attenuation (-- 46 dB).
2) “Receive” means both attenuators are controlled by the volume
control. At max. volume, the receive attenuator is fully on
(+ 6.0 dB), and the transmit attenuator is at max. attenuation
(-- 46 dB).
3) “Fast Idle” means both transmit and receive speech are present
in approximately equal levels. The attenuators are quickly
switched (30 ms) to idle until one speech level dominates the
other.
4) “Slow Idle” means speech has ceased in both transmit and receive paths. The attenuators are then slowly switched (1 second) to the idle mode.
5) Switching to the full transmit or receive modes from any other
mode is at the fast rate (≈30 ms).
A summary of the truth table is as follows:
1) The circuit will switch to transmit if: a) both transmit
level detectors sense higher signal levels relative to the respective receive level detectors (TLI1 versus RLI1, TLI2
versus RLI2), and b) the transmit background noise monitor
indicates the presence of speech.
2) The circuit will switch to receive if: a) both receive level
detectors sense higher signal levels relative to the respective
transmit level detectors, and b) the receive background noise
monitor indicates the presence of speech.
3) The circuit will switch to the fast idle mode if the level
detectors disagree on the relative strengths of the signal levels, and at least one of the background noise monitors indicates speech. For example, referring to the Block Diagram
(Figure 2), if there is sufficient signal at the microphone amp
output (TLI2) and there is sufficient signal at the receive input
(RLI1) to override the signal at the hybrid output (TLI1), and
either or both background monitors indicate speech, then the
circuit will be in the fast idle mode. Two conditions which can
cause the fast idle mode to occur are a) when both talkers
are attempting to gain control of the system by talking at the
same time, and b) when one talker is in a very noisy environment, forcing the other talker to continually override that
noise level. In general, the fast idle mode will occur infrequently.
4) The circuit will switch to the slow idle mode when
a) both talkers are quiet (no speech present), or b) when one
talker’s speech level is continuously overriden by noise at
the other speaker’s location.
The time required to switch the circuit between transmit,
receive, fast idle and slow idle is determined in part by the
components at the CT pin (Pin 14). (See the section on
Switching Times for a more complete explanation of the
switching time components.) A schematic of the CT circuitry
is shown in Figure 6, and operates as follows:
— RT is typically 120 kΩ, and CT is typically 5.0 µF.
— To switch to the receive mode, I 1 is turned on (I 2 is off),
charging the external capacitor to + 240 mV above V B.
(An internal clamp prevents further charging of the capacitor.)
— To switch to the transmit mode, I2 is turned on (I1 is off)
bringing down the voltage on the capacitor to -- 240 mV
with respect to VB.
MC34118
9
VB
RT
-+
2.0 k
CT
CT
TO
ATTENUATORS
CONTROL
CIRCUIT
I1
I2
4
C1 -- C4
VOL. CONTROL
DIAL TONE DET.
AGC
60 µA
EACH
Figure 6. CT Attenuator Control Block Circuit
MICROPHONE AMPLIFIER
The microphone amplifier (Pins 10, 11) has the noninverting input internally connected to VB, while the inverting input
and the output are pinned out. Unlike most op--amps, the
amplifier has an all--NPN output stage, which maximizes
phase margin and gain--bandwidth. This feature ensures
stability at gains less than unity, as well as with a wide range
of reactive loads. The open loop gain is typically 80 dB
(f < 100 Hz), and the gain--bandwidth is typically 1.0 MHz
(See Figure 16). The maximum p--p output swing is typically
1.0 volt less than VCC with an output impedance of < 10 Ω
until current limiting is reached (typically 1.5 mA). Input bias
current at MCI is typically 40 nA out of the pin.
RMF
VCC
FROM
MIKE
VB
RMI
MCI
+
--
MCO
VCC
MUTE
GAIN = –
75 k
75 k
shorting the output to the inverting input (see Figure 7). The
mute input has a threshold of ≈1.5 volts, and the voltage at
this pin must be kept within the range of ground and VCC
(see Figure 17). If the mute function is not used, the pin
should be grounded.
HYBRID AMPLIFIERS
The two hybrid amplifiers (at HTO+, HTO--, and HTI), in
conjunction with an external transformer, provide the two--to-four wire converter for interfacing to the telephone line. The
gain of the first amplifier (HTI to HTO--) is set by external resistors (gain = -- RHF/RHI in Figure 2), and its output drives
the second amplifier, the gain of which is internally set at
-- 1.0. Unlike most op--amps, the amplifiers have an all--NPN
output stage, which maximizes phase margin and gain-bandwidth. This feature ensures stability at gains less than
unity, as well as with a wide range of reactive loads. The
open loop gain of the first amplifier is typically 80 dB, and the
gain bandwidth of each amplifier is ≈1.0 MHz (see Figure 16). The maximum p--p output swing of each amplifier is
typically 1.2 volts less than VCC with an output impedance of
< 10 Ω until current limiting is reached (typically 8.0 mA). The
output current capability is guaranteed to be a minimum of
5.0 mA. The bias current at HTI is typically 30 nA out of the
pin.
The connections to the coupling transformer are shown in
the Block Diagram (Figure 2). The block labeled ZBal is the
balancing network necessary to match the line impedance.
FILTER
The operation of the filter circuit is determined by the external components. The circuit within the MC34118, from pins FI
to FO is a buffer with a high input impedance (> 1.0 MΩ), and
a low output impedance (< 50 Ω). The configuration of the
external components determines whether the circuit is a
high--pass filter (as shown in Figure 2), a low--pass filter, or a
band--pass filter.
As a high pass filter, with the components shown in Figure 8, the filter will keep out 60 Hz (and 120 Hz) hum which
can be picked up by the external telephone lines. As a low
pass filter (Figure 9), it can be used to roll off the high end
frequencies in the receive circuit, which aids in protecting
against acoustic feedback problems.
0
-- 3.0
50
305 Hz
VB
R1
56 k
R
MF
R
MI
-- 30
f
Figure 7. Microphone Amplifier and Mute
= 1
N
2π
FOR C1 = C2
The muting function (Pin 12), when activated, will reduce
the gain of the amplifier to ≈-- 39 dB (with RMI = 5.1 kΩ) by
MC34118
10
C1
fN
1
C 2R1R2
VCC
100 k
R2 220 k
— To switch to idle quickly (fast idle), the current sources
are turned off, and the internal 2.0 kΩ resistor is switched
in, discharging the capacitor to VB with a time constant
= 2.0 k x CT.
— To switch to idle slowly (slow idle), the current sources
are turned off, the switch at the 2.0 kΩ resistor is open,
and the capacitor discharges to VB through the external
resistor RT with a time constant = RT x CT.
C2
FI
FO
4700 pF 4700 pF
260 µA
MC34118
Figure 8. High Pass Filter
MOTOROLA
With an appropriate choice of an input coupling capacitor to
the low pass filter, a band pass filter is formed.
4.0 k
0
20 k
-- 3.0
C1
-- 30
f
VB
= 1
2π
0.01
R2
FI
13 k
R1 0.001
13 k
fN
N
220 k
1
C1C2R 2
C2
+1
FO
MC34118
Vin
FOR R1 = R2
Figure 9. Low Pass Filter
POWER SUPPLY, VB, AND CHIP DISABLE
The power supply voltage at VCC (Pin 4) is to be between
3.5 and 6.5 volts for normal operation, with reduced operation possible down to 2.8 volts (see Figure 15 and the AGC
section). The power supply current is shown in Figure 18 for
both the power--up and power--down mode.
The output voltage at VB (Pin 15 is ≈(VCC -- 0.7)/2, and
provides the ac ground for the system. The output impedance at VB is ≈400 Ω (see Figure 19), and in conjunction
with the external capacitor at VB, forms a low pass filter for
power supply rejection. Figure 20 indicates the amount of rejection with different capacitors. The choice of capacitor is
application dependent based on whether the circuit is powered by the telephone line or a power supply.
Since VB biases the microphone and hybrid amplifiers, the
amount of supply rejection at their outputs is directly related
to the rejection at VB, as well as their respective gains. Figure 21 depicts this graphically.
The Chip Disable (Pin 3) permits powering down the IC to
conserve power and/or for muting purposes. With CD
≤ 0.8 volts, normal operation is in effect. With CD ≥ 2.0 volts
and ≤ VCC, the IC is powered down. In the powered down
mode, the microphone and the hybrid amplifiers are disabled, and their outputs go to a high impedance state. Additionally, the bias is removed from the level detectors. The
bias is not removed from the filter (Pins 1, 2), the attenuators
(Pins 8, 9, 21, 22), or from Pins 13, 14, and 15 (the attenuators are disabled, however, and will not pass a signal). The
input impedance at CD is typically 90 kΩ, has a threshold of
≈1.5 volts, and the voltage at this pin must be kept within the
range of ground and VCC (see Figure 17). If CD is not used,
the pin should be grounded.
140
+ 10
TRANSMIT
ATTENUATOR
120
GAIN (dB)
-- 10
OUTPUT CHANGE (mV)
0
RECEIVE
ATTENUATOR
-- 20
-- 30
-- 40
-- 160
-- 80
0
+ 80
+ 160
VCT -- VB (mV)
Figure 10. Attenuator Gain versus VCT (Pin 14)
MOTOROLA
80
60
VB
Iin
(RLI1, RLI2
TLI1, TLI2)
40
20
VCC ≥ 3.5 V
-- 50
-- 240
100
+ 240
0
0
-- 20
-- 40
350 Ω
-+
2.0 µF
Vout
(RLO1, RLO2
TLO1, TLO2)
-- 60
-- 80
4.0
µA
-- 100
DC INPUT CURRENT (µA)
Figure 11. Level Detector DC Transfer Characteristics
MC34118
11
+ 5.0
160
OUTPUT CHANGE FROM 1.0 kHz (mV)
R = 5.1 k, C = 0.1 µF
R = 10 k, C = 0.1 µF
OUTPUT CHANGE (mV)
120
R = 10 k, C = 0.047 µF
80
C
VB
R
40
Vin
@ 1.0 kHz
0
0
20
-+
(RLI1, RLI2
TLI1, TLI2)
350 Ω
2.0 µF
Vout
(RLO1, RLO2
TLO1, TLO2)
40
60
4.0
µA
Vin = 1.0 mVrms
10 mVrms
40 mVrms
0
(RLI1, RLI2
TLI1, TLI2)
-- 10
0.047
-- 15
80
VB
4.0
µA
2.0 µF
Vout
(RLO1, RLO2
TLO1, TLO2)
300
1.0K
3.0K
10K
f, FREQUENCY (Hz)
Figure 13. Level Detector AC Transfer
Characteristics versus Frequency
+ 10
0
0
GAIN CHANGE (dB)
-- 6.0
-- 10
GAIN (dB)
10 k
350 Ω
-+
Vin
@ 1.0 kHz
-- 20
Figure 12. Level Detector AC Transfer Characteristics
-- 20
-- 30
CIRCUIT IN RECEIVE MODE
-- 12
-- 18
CIRCUIT IN RECEIVE MODE
0.5 VB ≤ VLC ≤ VB
-- 24
-- 40
MINIMUM RECOMMENDED LEVEL
0.2
0.4
0.6
VLC/VB
0.8
-- 30
1.0
36
MICROPHONE
AMP PHASE
80
72
HYBRID AMP
PHASE
60
GAIN
108
144
180
40
20
2.9
3.0
3.1
3.2
VCC (VOLTS)
3.3
3.4
3.5
100
80
INPUT CURRENT ( µA)
0
EXCESS PHASE (DEGREES)
+ 100
2.8
Figure 15. Receive Attenuation Gain versus VCC
Figure 14. Receive Attenuator versus Volume Control
A VOL (dB)
Vin = 10 mVrms
-- 5.0
INPUT SIGNAL (mVrms)
-- 50
Vin ≥ 10 mV
VALID FOR
0 ≤ CD, MUT ≤ VCC
60
40
20
0
100
1.0K
10K
100K
FREQUENCY (Hz)
Figure 16. Microphone Amplifier and 1st Hybrid
Amplifier Open Loop Gain and Phase
MC34118
12
1.0M
0
0
1.0
2.0
3.0
4.0
5.0
6.5
VCC + 1.0 V
INPUT VOLTAGE (VOLTS)
Figure 17. Input Characteristics @ CD, MUT
MOTOROLA
3.0
6.0
5.0
2.5
CD ≤ 0.8 V
V B (VOLTS)
ICC (mA)
4.0
3.0
2.0
2.0
1.5
VCC = 3.5 V
1.0
1.0
0
VCC = 6.0 V
0.5
2.0 ≤ CD ≤ VCC
0
1.0
2.0
3.0
4.0
5.0
0
6.0
0.5
0
VCC (VOLTS)
1.0
1.5
2.0
IB LOAD CURRENT (mA)
Figure 18. Supply Current versus Supply Voltage
Figure 19. VB Output Characteristics
60
60
40
220 µF
20
0
300
100 µF
CVB = 50 µF
1.0K
2.0K
HTO--, CVB = 220 µF
50
PSRR (dB)
PSRR (dB)
1000 µF
500 µF
80
40
30
MCO, CVB = 1000 µF
MCO, CVB = 220 µF
20
3.0K
HTO--, CVB = 1000 µF
MIC AMP GAIN = 31 dB
HYBRID AMP GAIN = 14 dB SEE TEXT
10
300
1.0K
FREQUENCY (Hz)
3.0K
FREQUENCY (Hz)
Figure 20. VB Power Supply Rejection versus
Frequency and VB Capacitor
Figure 21. Power Supply Rejection of the
Microphone and Hybrid Amplifiers
P--P OUTPUT SWING (VOLTS)
6.0
MCO
5.0
4.0
TXO, RXO
HTO--, +
3.0
2.0
TXO
1.0
0
3.0
FO
RXO
3.5
TYPICAL @ 25°C
4.0
4.5
5.0
5.5
6.0
6.5
VCC (VOLTS)
Figure 22. Typical Output Swing versus VCC
MOTOROLA
MC34118
13
DESIGN GUIDELINES
SWITCHING TIME
The switching time of the MC34118 circuit is dominated by
the components at CT (Pin 14, refer to Figure 6), and secondarily by the capacitors at the level detector outputs
(RLO1, RLO2, TLO1, TLO2).
The time to switch to receive or to transmit from idle is determined by the capacitor at CT, together with the internal
current sources (refer to Figure 6). The switching time is:
∆T =
∆V x C
I
T
For the typical case where ∆V = 240 mV, I = 60 µA, and CT
is 5.0 µF, ∆T = 20 ms. If the circuit switches directly from receive to transmit (or vice--versa), the total switching time
would be 40 ms.
The switching time from either receive or transmit to idle
depends on which type of idle mode is in effect. If the circuit
is going to “fast idle,” the time constant is determined by the
CT capacitor, and the internal 2.0 kΩ resistor (Figure 6). With
CT = 5.0 µF, the time constant is ≈10 ms, giving a switching
time to idle of ≈30 ms (for 95% change). Fast idle is an infrequent occurrence, however, occurring when both speakers
are talking and competing for control of the circuit. The
switching time from idle back to either transmit or receive is
described above.
If the circuit is switching to “slow idle,” the time constant is
determined by the CT capacitor and RT, the external resistor
(see Figure 6). With CT = 5.0 µF, and RT = 120 kΩ, the
time constant is ≈ 600 ms, giving a switching time of
≈1.8 seconds (for a 95% change). The switching period to
slow idle begins when both speakers have stopped talking.
The switching time back to the original mode will depend on
how soon that speaker begins speaking again. The sooner
the speaking starts during the 1.8 second period, the quicker
the switching time since a smaller voltage excursion is required. That switching time is determined by the internal current sources as described above.
The above switching times occur, however, after the level
detectors have detected the appropriate signal levels, since
their outputs operate the Attenuator Control Block. Referring
to Figure 4, the rise time of the level detectors’ outputs to
new speech is quick by comparison (≈1.0 ms), determined
by the internal 350 Ω resistor and the external capacitor (typically 2.0 µF). The output’s decay time is determined by the
external capacitor, and an internal 4.0 µA current source giving a decay rate of ≈60 ms for a 120 mV excursion at RLO
or TLO. However, the overall response time of the circuit is
not a constant since it depends on the relative strength of the
signals at the different level detectors, as well as the timing of
the signals with respect to each other. The capacitors at the
four outputs (RLO1, RLO2, TLO1, TLO2) must be equal
value (± 10%) to prevent problems in timing and level response.
MC34118
14
The rise time of the level detector’s outputs is not significant since it is so short. The decay time, however, provides a
significant part of the “hold time” necessary to hold the circuit
during the normal pauses in speech.
The components at the inputs of the level detectors (RLI1,
RLI2, TLI1, TLI2) do not affect the switching time, but rather
affect the relative signal levels required to switch the circuit,
as well as the frequency response of the detectors.
DESIGN EQUATIONS
Referring to Figure 24 (the coupling capacitors have been
omitted for simplicity), and the circuit of Figure 23, the following definitions will be used (all measurements are at
1.0 kHz):
— GMA is the gain of the microphone amplifier measured
from the microphone output to TXI (typically 35 V/V, or
31 dB);
— GTX is the gain of the transmit attenuator, measured from
TXI to TXO;
— GHA is the gain of hybrid amplifiers, measured from TXO
to the HTO--/HTO+ differential output (typically 10.2 V/V,
or 20.1 dB);
— GHT is the gain from HTO--/HTO+ to Tip/Ring for transmit
signals, and includes the balance network (measured at
0.4 V/V, or -- 8.0 dB);
— GST is the sidetone gain, measured from HTO--/HTO+ to
the filter input (measured at 0.18 V/V, or --15 dB);
— GHR is the gain from Tip/Ring to the filter input for receive
signals (measured at 0.833 V/V or -- 1.6 dB);
— GFO is the gain of the filter stage, measured from the input of the filter to RXI, typically 0 dB at 1.0 kHz;
— GRX is the gain of the receive attenuator measured from
RXI to RXO;
— GSA is the gain of the speaker amplifier, measured from
RXO to the differential output of the MC34119 (typically
22 V/V or 26.8 dB);
— GAC is the acoustic coupling, measured from the speaker
differential voltage to the microphone output voltage.
I) Transmit Gain
The transmit gain, from the microphone output (VM) to Tip
and Ring, is determined by the output characteristics of the
microphone, and the desired transmit level. For example, a
typical electret microphone will produce ≈0.35 mVrms under normal speech conditions. To achieve 100 mVrms at Tip/
Ring, an overall gain of 285 V/V is necessary. The gain of the
transmit attenuator is fixed at 2.0 (+ 6.0 dB), and the gain
through the hybrid of Figure 23 (G HT ) is nominally 0.4
(-- 8.0 dB). Therefore a gain of 357 V/V is required of the
microphone and hybrid amplifiers. It is desirable to have the
majority of that gain in the microphone amplifier for three reasons: 1) the low level signals from the microphone should be
MOTOROLA
MOTOROLA
25 Ω
SPEAKER
(300 mV)
8
7
-+
4
RLI2 20
R
200 pF
5.1 k
-+
6
110 k
15
VB
14
1
3 V
B
10 k
0.05
0.1
22
RXO
VOLUME
CONTROL
9.1 k
0.1
0.05
26 RLI1
TLI1
23
VB
51 k
-+
10 k
BNM
R
-+
R
FO 1
56 k
+1
FILTER
MC34118
VB
0.1
RHF
HTI
7
6 HTO--
0.1
5.1 k
FI
2
VCC
0.01
4700 pF
4700 pF
VB
2.0 µF
47 µF
100 k
2.0 µF
0.05
220 k
GND
28
CPR
27
RLO1
25
TLO1
24
HTO+
5
VCC
4
CD
3
820
300 k
1. These two resistors depend on the specific microphone selected.
2. Component values shown are recommendations only, and will vary in
different applications.
3. This capacitor must be physically adjacent to Pin 4 of the MC34118.
4. BNM = Background Noise Monitor; DTD = Dial Tone Detector.
5. Recommended transformer: Stancor TTPC--13, Microtran T5115.
6. Capacitor values are in µF except where noted.
20 k
21
RXI
VB
+ --
+ --
VB
TXO
8
RHI
10 k
VB
Rx
ATTENUATOR
DTD
-+
ATTENUATOR
CONTROL
AGC
VCC
Tx
ATTENUATOR
VLC 13
VB
--
CT
19
2.0 µF
CPT
16
RLO2
18
VB
--
MUT
TLO2
0.1
5.1 k
TXI
TLI2 17 9
VB
BNM
MCO
10
0.1
12
220 µF
120 k
MC34119
R
5.0 µF
47 µF
100 k
2.0 µF
MUTE
VB
VCC
-+
180 k
R MF
270 pF
MCI 11
RMI
5.1 k
VB
0.02
0.2
20 µF
+
5
VCC
620
MIKE
(NOTE 1)
1.0 k
VCC
+
Figure 23. MC34118 Application Circuit
(Basic Line Powered Speakerphone
MC34118
15
DISABLE
1000 µF
(NOTE 3)
1N4733
5.1 V
HOOK
SWITCH
RING
TIP
VM
MIKE
AMP V
1
I1
TXI
TXO
-+
C2
+
--
RLI2
I3
SPEAKER
AMP.
HYBRID
TIP
RING
RLI1
GHR
R3
V3
GST
+
--
C1
GHT
TLI1
-+
CONTROL
(GAC)
I2
R2
R1
TLI2
ACOUSTIC
COUPLING
HYBRID
AMP V
2
Tx ATTENUATOR
R4
RXO
RXI
I4
V4
FILTER
Rx ATTENUATOR
Figure 24. Basic Block Diagram for Design Purposes
amplified as soon as possible to minimize signal/noise problems; 2) to provide a reasonable signal level to the TLI2 level
detector; and 3) to minimize any gain applied to broadband
noise generated within the attenuator. However, to cover the
normal voiceband, the microphone amplifier’s gain should
not exceed 48 dB (see Figure 16). For the circuit of Figure 23, the gain of the microphone amplifier was set at
35 V/V (31 dB), and the differential gain of the hybrid amplifiers was set at 10.2 V/V (20.1 dB).
II) Receive Gain
The overall receive gain depends on the incoming signal
level, and the desired output power at the speaker. Nominal
receive levels (independent of the peaks) at Tip/Ring can be
35 mVrms (-- 27 dBm), although on long lines that level can
be down to 8.0 mVrms (-- 40 dBm). The speaker power is:
dBm∕10 x 0.6
(Equation 1)
R
S
where RS is the speaker impedance, and the dBm term is the
incoming signal level increased by the gain of the receive
path. Experience has shown that ≈30 dB gain is a satisfactory amount for the majority of applications. Using the above
numbers and Equation 1, it would appear that the resulting
power to the speaker is extremely low. However, Equation 1
does not consider the peaks in normal speech, which can be
10 to 15 times the rms value. Considering the peaks, the
overall average power approaches 20 -- 30 mW on long
lines, and much more on short lines.
Referring to Figure 23, the gain from Tip/Ring to the filter
input was measured at 0.833 V/V (-- 1.6 dB), the filter’s gain
P
SPK
= 10
MC34118
16
is unity, and the receive attenuator ’s gain is 2.0 V/V
(+ 6.0 dB) at maximum volume. The speaker amplifier’s gain
is set at 22 V/V (26.8 dB), which puts the overall gain at
≈31.2 dB.
III) Loop Gain
The total loop gain (of Figure 24) must add up to less than
zero dB to obtain a stable circuit. This can be expressed as:
GMA + GTX + GHA + GST + GFO + GRX
+ GSA + GAC < 0
(Equation 2)
Using the typical numbers mentioned above, and knowing
that GTX + GRX = -- 40 dB, the required acoustic coupling can
be determined:
GAC < -- [31 + 20.1 + (-- 15) + 0 + (-- 40)
+ 26.8] = -- 22.9 dB.
(Equation 3)
An acoustic loss of at least 23 dB is necessary to prevent instability and oscillations, commonly referred to as “singing.”
However, the following equations show that greater acoustic
loss is necessary to obtain proper level detection and switching.
IV) Switching Thresholds
To switch comparator C1, currents I1 and I3 need to be
determined. Referring to Figure 24, with a receive signal VL
applied to Tip/Ring, a current I3 will flow through R3 into RLI2
according to the following equation:
V
I3 = L
R3
G
HR
xG
FO
xG
RX
x
G
SA
2
(Equation 4)
MOTOROLA
where the terms in the brackets are the V/V gain terms. The
speaker amplifier gain is divided by two since GSA is the differential gain of the amplifier, and V3 is obtained from one
side of that output. The current I1, coming from the microphone circuit, is defined by:
Equations 7, 11, and 12 define the thresholds for switching,
and are represented in the following graph:
VM
MRX
V xG
MA
(Equation 5)
I1 = M
R1
where VM is the microphone voltage. Since the switching
threshold occurs when I1 = I3, combining the above two
equations yields:
V
= V x R1
M
L R3
MI
GHRx GFOx GRXx GSA
(Equation 6)
x2
MA
This is the general equation defining the microphone voltage
necessary to switch comparator C1 when a receive signal VL
is present. The highest VM occurs when the receive attenuator is at maximum gain (+ 6.0 dB). Using the typical numbers
for Equation 6 yields:
G
VM = 0.52 VL
G
MA
xG
TX
x
G
HA
2
(Equation 8)
Since GHA is the differential gain of the hybrid amplifiers, it is
divided by two to obtain the voltage V 2 applied to R2.
Comparator C2 switches when I4 = I2. I4 is defined by:
V
xG
I4 = L G
HR
FO
R4
(Equation 9)
Setting I4 = I2, and combining the above equations results in:
V = V x R4
L
M R2
GMA x GTX x GHA
GHR x GFO x 2
(Equation 10)
This equation defines the line voltage at Tip/Ring necessary
to switch comparator C2 in the presence of a microphone
voltage. The highest VL occurs when the circuit is in the
transmit mode (GTX = + 6.0 dB). Using the typical numbers
for Equation 10 yields:
VL = 840 VM
(or VM = 0.0019 VL)
(Equation 11)
At idle, where the gain of the two attenuators is -- 20 dB
(0.1 V/V), Equations 6 and 10 yield the same result:
VM = 0.024 VL
MOTOROLA
VL
Figure 25. Switching Thresholds
(Equation 7)
To switch comparator C2, currents I2 and I4 need to be determined. With sound applied to the microphone, a voltage
VM is created by the microphone, resulting in a current I2 into
TLI1:
V
I2 = M
R2
MTX
(Equation 12)
The “M” terms are the slopes of the lines (0.52, 0.024, and
0.0019) which are the coefficients of the three equations. The
MRX line represents the receive to transmit threshold in that it
defines the microphone signal level necessary to switch to
transmit in the presence of a given receive signal level. The
MTX line represents the transmit to receive threshold. The MI
line represents the idle condition, and defines the threshold
level on one side (transmit or receive) necessary to overcome noise on the other.
Some comments on the above graph:
— Acoustic coupling and sidetone coupling were not included in Equations 7 and 12. Those couplings will affect the
actual performance of the final speakerphone due to their interaction with speech at the microphone, and the receive signal coming in at Tip/Ring. The effects of those couplings are
difficult to predict due to their associated phase shifts and
frequency response. In some cases the coupling signal will
add, and other times subtract from the incoming signal. The
physical design of the speakerphone enclosure, as well as
the specific phone line to which it is connected, will affect the
acoustic and sidetone couplings, respectively.
— The MRX line helps define the maximum acoustic coupling allowed in a system, which can be found from the following equation:
G
=
R1
2 x R3 x G
(Equation 13)
MA
Equation 13 is independent of the volume control setting.
Conversely, the acoustic coupling of a designed system
helps determine the minimum slope of that line. Using the
component values of Figure 23 in Equation 13 yields a
AC–MAX
MC34118
17
GAC--MAX of -- 37 dB. Experience has shown, however, that
an acoustic coupling loss of > 40 dB is desirable.
— The MTX line helps define the maximum sidetone coupling (GST) allowed in the system, which can be found from
the following equation:
G
=
R4
2 x R2 x G
(Equation 14)
FO
Using the component values of Figure 23 in Equation 14
yields a maximum sidetone of 0 dB. Experience has shown,
however, that a minimum of 6.0 dB loss is preferable.
The above equations can be used to determine the resistor values for the level detector inputs. Equation 6 can be
used to determine the R1/R3 ratio, and Equation 10 can be
used to determine the R4/R2 ratio. In Figure 24, R1 -- R4
each represent the combined impedance of the resistor and
coupling capacitor at each level detector input. The magnitude of each RC’s impedance should be kept within the
range of 2.0 k -- 15 kΩ in the voiceband (due to the typical
signal levels present) to obtain the best performance from
the level detectors. The specific R and C at each location will
determine the frequency response of that level detector.
ST
APPLICATION INFORMATION
DIAL TONE DETECTOR
The threshold for the dial tone detector is internally set at
15 mV (10 mVrms) below VB (see Figure 5). That threshold
can be reduced by connecting a resistor from RXI to ground.
The resistor value is calculated from:
R = 10 k
V
B –1
∆V
where VB is the voltage at Pin 15, and ∆V is the amount of
threshold reduction. By connecting a resistor from VCC to
RXI, the threshold can be increased. The resistor value is
calculated from:
R = 10 k
V
trol of the circuit from idle will be easier for that side towards
which it is biased since that path will have less attenuation at
idle.
By connecting a resistor from CT (Pin 14) to ground, the
circuit will be biased towards the transmit side. The resistor
value is calculated from:
R=R
V
B –1
T ∆V
where R is the added resistor, RT is the resistor normally between Pins 14 and 15 (typically 120 kΩ), and ∆V is the difference between VB and the voltage at CT at idle (refer to
Figure 10).
By connecting a resistor from CT (Pin 14) to VCC, the circuit will be biased towards the receive side. The resistor value is calculated from:
R=R
V
T
–V
B –1
CC
∆V
R, RT, and ∆V are the same as above. Switching time will be
somewhat affected in each case due to the different voltage
excursions required to get to transmit and receive from idle.
For practical considerations, the ∆V shift should not exceed
100 mV.
VOLUME CONTROL
If a potentiometer with a standard linear taper is used for
the volume control, the graph of Figure 14 indicates that the
receive gain will not vary in a linear manner with respect to
the pot’s position. In situations where this may be objectionable, a potentiometer with an audio taper (commonly used in
radio volume controls) will provide a more linear relationship
as indicated in Figure 26. The slight non--linearity at each
end of the graph is due to the physical construction of the
potentiometer, and will vary among different manufacturers.
+10
–V
B –1
CC
∆V
0
BACKGROUND NOISE MONITORS
For testing or circuit analysis purposes, the transmit or receive attenuators can be set to the “on” position, by disabling
the background noise monitors, and applying a signal so as
to activate the level detectors. Grounding the CPR pin will
disable the receive background noise monitor, thereby indicating the “presence of speech” to the attenuator control
block. Grounding CPT does the same for the transmit path.
Additionally, the receive background noise monitor is automatically disabled by the dial tone detector whenever the receive signal exceeds the detector’s threshold.
TRANSMIT/RECEIVE DETECTION PRIORITY
Although the MC34118 was designed to have an idle mode
such that the attenuators are halfway between their full on
and full off positions, the idle mode can be biased towards
the transmit or the receive side. With this done, gaining con-
MC34118
18
GAIN (dB)
where ∆V is the amount of the threshold increase.
--10
--20
--30
-- 40
0
40
80
120
160
200
240
280
320
DEGREES OF ROTATION
Figure 26. Receive Attenuator Gain versus
Potentiometer Position Using Audio Taper
APPLICATION CIRCUIT
The circuit of Figure 23 is a basic speakerphone, to be
used in parallel with any other telephone which contains the
MOTOROLA
ringer, dialer, and handset functions. The circuit is powered
entirely by the telephone line’s loop current, and its characteristics are shown in Figures 27 -- 30.
28
26
GAIN (dB)
24
VOLTAGE AT TIP/RING (VOLTS)
20
16
24
22
600 T
VL R FIGURE 23
20
12
GAIN = VSPKR/VL
8.0
100
VSPKR
500
1.0K
FREQUENCY (Hz)
4.0
5.0K
Figure 30. Receive Gain
0
20
40
60
80
100
120
LOOP CURRENT (mA)
ZAC (OHMS)
Figure 27. DC V--1 Characteristics
Figure 31 shows how the same circuit can be configured to
be powered from a 3.5 -- 6.0 volt power supply rather than
the phone line.
1000
TO
HTO--
800
TO
FILTER
600
TO
HTO+
TO VCC
400
600
FIGURE 23
Zac
R
200
0
T
300
820
1.0K
FREQUENCY (Hz)
TIP
RING
0.01
100 µF
(NOTE 1)
TO CD
TO CD
(MC34119)
100
HOOK
SWITCH
0.05
+
--
FROM
POWER
SUPPLY
DISABLE 1. This capacitor must be
physically adjacent to
Pin 4 of the MC34118.
5.0K
Figure 31. Operating from a Power Supply
Figure 28. AC Termination Impedance
ADDING A DIALER
50
GAIN (dB)
48
46
44
T
0.2
5.1 k
VM
40
MCI
FIGURE 23
GAIN = VLINE/VM
100
1.0K
600 VLINE
R
5.0K
FREQUENCY (Hz)
Figure 29. Transmit Gain — Microphone to Tip/Ring
MOTOROLA
Figure 32 shows the addition of a dialer to the circuit of Figure 23, with the additional components shown in bold. The
MC145412 pulse/tone dialer is shown configured for DTMF
operation. The DTMF output (Pin 18) is fed to the hybrid amplifiers at HTI, and the DTMF levels at Tip/Ring are adjusted
by varying the 39 kΩ resistor. The Mute Output (active low at
Pin 11) mutes the microphone amplifier, and attenuates the
DTMF signals in the receive path (by means of the 10 k/3.0 k
divider). The MC34118 is forced into the fast idle mode during dialing. The 3.0 volt battery provides for memory retention of the dialer’s 10 number storage when the circuit is
unpowered.
RFI INTERFERENCE
Potential radio frequency interference problems should be
addressed early in the electrical and mechanical design of
the speakerphone. RFI may enter the circuit through Tip and
MC34118
19
Ring, through the microphone wiring to the microphone amplifier, or through any of the PC board traces. The most sensitive pins on the MC34118 are the inputs to the level
detectors (RLI1, RLI2, TLI1, TLI2) since, when there is no
speech present, the inputs are high impedance and these op
amps are in a near open loop condition. The board traces to
these pins should be kept short, and the resistor and capacitor for each of these pins should be physically close to the
pins. Any other high impedance input pin (MCI, HTI, FI, VLC)
should be considered sensitive to RFI signals.
IN THE FINAL ANALYSIS . . .
Proper operation of a speakerphone is a combination of
proper mechanical (acoustic) design as well as proper electronic design. The acoustics of the enclosure must be considered early in the design of a speakerphone. In general,
electronics cannot compensate for poor acoustics, low
speaker quality, or any combination of the two. Proper
acoustic separation of the speaker and microphone, as described in the Design Equations, is essential. The physical
location of the microphone, along with the characteristics of
the selected microphone, will play a large role in the quality
of the transmitted sound. The microphone and speaker vendors can usually provide additional information on the use of
their products.
In the final analysis, the circuits shown in this data sheet
will have to be “fine tuned” to match the acoustics of the enclosure, the specific hybrid, and the specific microphone and
speaker selected. The component values shown in this data
sheet should be considered as starting points only. The gains
of the transmit and receive paths are easily adjusted at the
microphone and speaker amplifiers, respectively. The
switching response can then be fine tuned by varying (in
small steps) the components at the level detector inputs until
satisfactory operation is obtained for both long and short
lines.
SUGGESTED VENDORS
Microphones
Primo Microphones Inc.
Bensenville, IL 60106
312--595--1022
Model EM--60
Hosiden America Corp.
Elk Grove Village, IL 60007
312--981--1144
Model KUC2123
25 Ω Speakers
Panasonic Industrial Co.
Seacaucus, N.J. 07094
201--348--5233
Model EAS--45P19S
Telecom Transformers
Microtran Co., Inc.
Valley Stream, N.Y. 11528
516--561--6050
Various models — ask for
catalog and Application
Bulletin F232
39 k
18
16
Motorola Inc. does not endorse or warrant the suppliers
referenced.
15
300
13
2
5
9
11
10
12
6
4
3
2
3 A
4
5
6
7
8
0
9 C
# D
*
B
0.05
820
HTO--
R
VB
HTO+
-+
5
FILTER
+1
VCC
MUT
12
TO TIP
& RING
0.01
R
3.58
MHz
MUTE
1
-+
MC34118
8
MC145412
6
4
0.1
14
10 k
HTI 7
VB
VCC
1
Onan Power/Electronics
Minneapolis, MN 55437
612--921--5600
Model TC 38--6
0.1
8 TXO
0.1
2.0 k
Stancor Products
Logansport, IN 46947
219--722--2244
Various models — ask for
catalog
PREM Magnetics, Inc.
McHenry, IL 60050
815--385--2700
Various models — ask for
catalog
51 k
3.0 V
MURA Corp.
Westbury, N.Y. 11590
516--935--3640
Model EC--983--7
4700 pF
2
FI
10 k
3.0 k
FO 1
56 k
27 k
240 k
3300
180 k
2N2222A
OR EQUIVALENT
Figure 32. Adding a Dialer to the Speakerphone
MC34118
20
MOTOROLA
PACKAGE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 710--02
ISSUE B
28 PDIP
28
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D), SHALL
BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL
CONDITION, IN RELATION TO SEATING PLANE
AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
15
B
DIM
A
B
C
D
F
G
H
J
K
L
M
N
14
1
L
C
A
N
G
H
F
M
K
D
J
SEATING
PLANE
MILLIMETERS
MIN
MAX
36.45
37.21
13.72
14.22
3.94
5.08
0.36
0.56
1.02
1.52
2.54 BSC
1.65
2.16
0.20
0.38
2.92
3.43
15.24 BSC
0_
15_
0.51
1.02
INCHES
MIN
MAX
1.435
1.465
0.540
0.560
0.155
0.200
0.014
0.022
0.040
0.060
0.100 BSC
0.065
0.085
0.008
0.015
0.115
0.135
0.600 BSC
0_
15_
0.020
0.040
EG (Pb--free) SUFFIX
DW SUFFIX
PLASTIC PACKAGE
CASE 751F--05
ISSUE F
28 SOICW
D
A
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSIONS.
4. MAXIMUM MOLD PROTRUSION 0.015 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS
OF B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
15
M
0.25
E
H
B
M
28
1
14
PIN 1 IDENT
A1
A
B
e
B
0.025
MOTOROLA
M
C A
S
B
C
S
L
0.10
SEATING
PLANE
C
θ
DIM
A
A1
B
C
D
E
e
H
L
θ
MILLIMETERS
MIN
MAX
2.35
2.65
0.13
0.29
0.35
0.49
0.23
0.32
17.80
18.05
7.40
7.60
1.27 BSC
10.05
10.55
0.41
0.90
0_
8_
MC34118
21
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
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MC34118
22
◊
MC34118/D
MOTOROLA
*MC34118/D*