NX30P6093
High-voltage I2C controlled overvoltage protection load
switch
Rev. 1.1 — 18 September 2018
Product data sheet
1. General description
NX30P6093 is an 8 A I2C controlled overvoltage protection load switch for USB Type-C
and PD applications. It includes undervoltage lockout, overvoltage lockout and
overtemperature protection circuits, designed to automatically isolate the power switch
terminals when a fault condition occurs. It features input pin impedance detection function,
providing USB power supply pin status to system to avoid short circuit damage for the
Type-C port power supply pin.
NX30P6093 has a default overvoltage protection threshold, and the OVLO threshold can
be adjusted by both external resistor divider on ADJ pin and internal I2C register. A
22.5 ms debounce time is deployed every time before the device is switched ON, followed
by a soft start to limit the inrush current.
Designed for operation from 2.8 V to 20.0 V, it can be used in USB Type-C and PD power
control applications to offer essential protection and enhance system reliability.
NX30P6093 is offered in a small 20-bump 1.7 x 2.16 mm, 0.4 mm pitch WLCSP package.
2. Features and benefits
Wide supply voltage range for VIN from 2.8 V to 20.0 V
System Power supply VDD from 3.0 V to 4.5 V
ISW maximum 8 A continuous current
29 V tolerance on VIN pin
8.95 m (typical) ultra-low ON resistance
Adjustable VIN overvoltage protection by both external resistor and I2C
Built in slew rate control for inrush current limit
Integrated current source for VIN pin impedance detection
Protection circuitry
Overtemperature protection
Overvoltage protection
Undervoltage lockout
Surge protection:
IEC61000-4-5 exceeds 100 V on VIN
ESD protection
IEC61000-4-2 contact discharge exceeds 8 kV on VIN
IEC61000-4-2 air discharge exceeds 15 kV on VIN
HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV on all pins
MM Class B exceeds 100 V on all the pins
NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
Specified from 40 C to +85 C
3. Applications
Smart and feature phones
Tablets, eBooks
Notebook
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
NX30P6093UK 40 C to +85 C
WLCSP20
Description
Version
wafer level chip-scale package; 20 bumps;
1.70 mm x 2.16 mm x 0.525 mm body (backside
coating included)
SOT1397-6
4.1 Ordering options
Table 2.
Ordering options
Type number
Orderable
part number
Package
Packing method
Minimum
order quantity
NX30P6093UK
NX30P6093UKAZ
WLCSP20
REEL 7" Q2/T3
4000
*STANDARD MARK
CHIPS, DP
Temperature
Tamb = 40 C to +85 C
5. Marking
Table 3.
Marking
Line
Marking
Description
A
X30P2
basic type name
B
mmmmmnn
wafer lot code (mmmmm) and wafer
number (nn)
C
ZAYWW
manufacturing code:
Z = foundry location
A = assembly location
Y = assembly year code
WW = assembly week code
D
NX30P6093
Product data sheet
CCC-RRR
Die X-Y Coordinate
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NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
6. Functional diagram
INTERNAL
POWER
VDD
ADC
VOUT
VIN
SURGE
PROTECTION
CHARGE PUMP
AND DRIVER
OVP
ADJ
SCL
SDA
OTP
CONTROL
I2C
INT
EN
GND
Fig 1.
aaa-028615
Block diagram
7. Pinning information
7.1 Pinning
Bottom View
Top View
D
VOUT
VOUT
VOUT
SDA
SCL
D
SCL
SDA
VOUT
VOUT
VOUT
C
VIN
VIN
VIN
GND
VDD
C
VDD
GND
VIN
VIN
VIN
B
VIN
VIN
VIN
GND
INT
B
INT
GND
VIN
VIN
VIN
A
VOUT
VOUT
VOUT
ADJ
EN
A
EN
ADJ
VOUT
VOUT
VOUT
5
4
3
2
1
2
3
4
1
aaa-028616
Fig 2.
Top view pin map WLCSP20
NX30P6093
Product data sheet
5
aaa-028617
Fig 3.
Bottom view pin map WLCSP20
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
7.2 Pin description
Table 4.
Pin description
Symbol
Pin
Type
VIN
B3, B4, B5 Power I/O
Description
Power Input pins, these pins should be connected together on PCB
C3, C4, C5
VOUT
A3, A4, A5 Power I/O
Power Input pins, these pins should be connected together on PCB
GND
B2, C2
Ground
Ground pin, these pin should be connected to system ground with good
connection for surge protection discharge current
EN
A1
Input
Enable pin, active low. When it is tied to high, the device enters low power
standby mode and VOUT is disconnected from VIN. Internal pull down resistor
integrated
INT
B1
Output
I2C-bus interface interrupt to be connected to the I2C-bus master of the host
processor
D3, D4, D5
VDD
C1
Power
System Power supply for chip
SDA
D2
I/O
I2C-bus interface serial data to be connected to the I2C-bus master of the host
processor
SCL
D1
Input
I2C-bus interface serial clock to be connected to the I2C-bus master of the host
processor
ADJ
A2
Input
External OVLO adjust pin. Connect to OVLO resistor divider when select OVLO
level by this pin. Connect to ground when it is not used, in this case OVLO
determined internally
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
8. Functional description
NX30P6093 is an integrated device with two major functions: programmable overvoltage
protection and VIN pin impedance detection. It protects the USB Type-C power supply pin
and internal system by isolating high voltage when it is exceeds OVLO threshold. The VIN
pin impedance detection provides status monitoring for the system to avoid damage by
short circuit of the USB Type-C power supply pin.
The impedance detection feature is activated when VIN < VUVLO; in this case NX30P6093
supplied by system power VDD. When VIN > VUVLO, this feature is disabled automatically.
8.1 EN input
A HIGH on EN disables the channel MOSFET, all protection circuits, and VIN impedance
detection circuits, putting the device into a low power mode. A LOW on EN enables the
protection circuits and the MOSFET. There is an internal 1 M pull-down resistor on the
EN pin to ensure the power switch conducting in a dead-battery situation. A 22.5 ms
debounce time is deployed before device turn-on.
8.2 Slew rate tune
The slew rate control is integrated to avoid inrush current when the load switch turns on.
In order to increase the design flexibility on system level, the slew rate can be tuned
through I2C through register 0x0F as follows.
Table 5.
Slew rate tune setting by I2C register
Register Value SRT[2:0]
Switch turn-on slew rate (TYP)
000
0.85 ms
001
0.9 ms
010
1 ms
011
1.35 ms (default)
100
1.8 ms
101
3 ms
110
5.5 ms
111
11 ms
8.3 Undervoltage lockout
When EN is LOW and VIN < VUVLO, the Undervoltage Lockout (UVLO) circuit disables the
power MOSFET. Once VIN exceeds VUVLO, if no other protection circuit is active and EN
is LOW, the MOSFET is turned on automatically regardless of the status of VOUT_EN in
register 0x01h. If EN is HIGH, the MOSFET remains at off and at low power mode.
8.4 Overvoltage lockout
When EN is LOW and VIN > VOVLO, the overvoltage lockout (OVLO) circuit disables the
power MOSFET. The OV_FLG in register 0x03h is set as “1” and an interrupt is issued to
notify the host. Once VIN drops below VOVLO and no other protection circuit is active, the
power MOSFET resumes operation.
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
The OVLO feature can be adjusted by both external resistor divider with ADJ pin and
internal I2C register. The sequences are:
• When NX30P6093 is powering up, the initial OVLO threshold is set by ADJ pin. If
there is a resistor divider connected to ADJ pin, the OVLO threshold is set by resistor
divider value. If ADJ is floating or pull to ground, the OVLO threshold is set by default
value in Table 6.
• After power up, the OVLO threshold can be adjusted by system through the I2C
register 0x05h according to the flow chart in Figure 4.
Power-up
Resistor divider
connected to ADJ?
N
Y
Set OVLO according
to ADJ pin resistor
divider value
ADJ is GND or
floating, set OVLO
according to default
value
If host wants to
program OVLO, write
the bit of OV[1:0] and
RNG[2:0]
N
OV_SEL=1?
Y
Set OVLO level by
I2C register 0x02h
aaa-028640
Fig 4.
OVLO setting flowchart
When the overvoltage threshold is set by the ADJ pin with the connected resistor divider
(see Figure 7), the overvoltage threshold is adjustable from 4 V to 23 V with below
equation:
Vovlo = Vth ovlo R1 + R2 R2
(1)
If the voltage on ADJ pin is below 0.1 V, the device uses internal default OVLO threshold.
When the overvoltage threshold is set by system through I2C-bus, it is set by bit0 and bit1
of register 0x05h. The OVLO thresholds are shown in Table 6.
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
Table 6.
OVLO threshold setting by I2C register
Register Value OV[1:0]
OVLO Threshold
00
6.8 V (default)
01
11.5 V
10
17 V
11
23 V
In additional, NX30P6093 provides two additional OVLO thresholds by bit0, bit1 of register
0x0Eh. The additional OVLO thresholds are shown in Table 7.
Table 7.
Additional OVLO threshold setting by I2C register
Register Value AOVP[1:0]
OVLO Threshold
00
OVLO set by Table 6.
01
OVLO set by Table 6.
10
10 V
11
14 V
Furthermore when the OVLO threshold is set by I2C register, it can be fine tuned by
bit6-bit4 of register 0x05h. The fine tune values are shown in Table 8.
Table 8.
OVLO threshold fine tune setting by I2C register
Register Value RNG[2:0]
OVLO Threshold Fine Tune value
000
-600 mV
001
-400 mV
010
-200 mV
011
0 mV (default)
100
+200 mV
101
+400 mV
110
+600 mV
111
+800 mV
8.5 Overtemperature protection
When EN is LOW and the device temperature exceeds 140 °C, the Overtemperature
Protection (OTP) circuit disables the power MOSFET and an interrupt is issued by set
OT_FLG as “1” in register 0x03h. Once the device temperature decreases below 120 °C
and no other protection circuit is active, the state of the N-channel MOSFET is controlled
by the EN pin again.
8.6 Short circuit protection
NX30P6093 has short circuit protection; after the MOSFET is fully turned on and when the
current through it exceeds 12 A, it turns the MOSFET off to protect the device and system.
An interrupt is issued when short circuit protection is triggered by set OC_FLG as “1” in
register 0x03h. Once the short circuit condition is removed and no other protection circuit
is active, the state of the N-channel MOSFET is controlled by the EN pin again.
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
8.7 VIN Impedance detection
A VIN impedance detection function is integrated in NX30P6093. When EN is LOW and
VIN < VUVLO, NX30P6093 enters VIN detection sleep mode. The host can start the VIN
impedance detection according to the following sequences. First, the host can write
DETC_EN bit to “1” through I2C, which activates NX30P6093 to VIN detection standby
mode. In this mode, NX30P6093 turns on internal function circuits and is ready to run
detection. After a wake up time tWAKEUP, the host can configure tDET, tDUTY and Tag
voltage by writing to register 0x07h and 0x09h through I2C. When Isource is changed from
default 0 A to any of valid current values in Table 8, NX30P6093 starts the VIN detection
according to configured tDET and tDUTY time.
In any of VIN detection modes, while VIN is plugged and the voltage on VIN pin exceeds
VUVLO, NX30P6093 exits from VIN detection modes to OVP operation modes
immediately.
When the VIN detection ADC result is valid after tDET timer out, the TMR_OUT_STS is set
to “1” and an interrupt issued. The host can read the VIN detection voltage at register
0x08h by then. Meanwhile, NX30P6093 can compare the detection result versus the host
set VIN TAG voltage in register 0x09h. When the detected voltage is larger than the set
VIN TAG voltage, the OVER_TAG_STS is set to “1” in register 0x02h and an interrupt is
issued.
The VIN pin impedance can be the following two different cases according to the
application in system:
• When there is no resistor divider connected to VIN and ADJ pins, the measured
impedance (RM) is VIN impedance (RP).
• When an OVLO resistor divider connected to VIN and ADJ pins, the measured
impedance (RM) is VIN impedance (RP) parallels with external OVLO resistor divider
R1+R2, (see Figure 7).
Table 9 shows the current source values, which can be programmed by bit 3 to bit 0 of
register 0x06h. Please note there are several internal circuits connected to VIN pin, e.g.,
Surge protection and UVLO resistor ladder. That generates a leakage current according to
a different VIN voltage specified in Table 28 as IDET_LEAKAGE. This leakage should be
excluded in the resistor calculation of VIN impedance detection.
Table 9.
NX30P6093
Product data sheet
Current source set by I2C register
Register value ISRC[3:0]
Current source value
0000
0 A (default)
0001
1 A
0010
2 A
0011
3 A
0100
4 A
0101
5 A
0110
10 A
0111
20 A
1000
50 A
1001
100 A
1010
200 A
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
Table 9.
Current source set by I2C register …continued
Register value ISRC[3:0]
Current source value
1011
500 A
1100
1000 A
1101
2000 A
1110
5000 A
1111
10000 A
NX30P6093 turns on the Isource according to the following system required timing
sequence.
tDET
tDUTY
Fig 5.
aaa-028650
VIN Impedance detection timing sequence
The current source turn-on pulse width tDET is set by bit7 - bit4 of register 0x07h as
follows.
Table 10.
Current source turn-on pulse width set by I2C register
Register Value TDET[3:0]
Isource turn-on Pulse Width (tDET)
0000
200 s (default)
0001
400 s
0010
1000 s
0011
2000 s
0100
4000 s
0101
10000 s
0110
20000 s
0111
40000 s
1000
100000 s
1001
200000 s
1010
400000 s
1011
1000000 s
1100
2000000 s
1101
4000000 s
1110
10000000 s
1111
Always on
The detection duty cycle is set by bit3 to bit0 of register 0x07h according to the following
table.
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
Table 11.
Detection duty cycle setting by I2C register
Register Value DUTY[3:0]
Detection duty cycle (tDUTY)
0000
single pulse (default)
0001
10 ms
0010
20 ms
0011
50 ms
0100
100 ms
0101
200 ms
0110
500 ms
0111
1000 ms
1000
2000 ms
1001
3000 ms
1010
6000 ms
1011
12000 ms
1100
30000 ms
1101
60000 ms
1110
120000 ms
1111
300000 ms
8.8 Interrupt
NX30P6093 has two types of interrupt. One is the interrupt generated by Flag register
0x03h, which includes the alarms for overvoltage, overtemperature and short circuit. The
second type of interrupt is generated by Status register 0x02h. The following is a detailed
description of the two interrupts.
Interrupt Trigger
Interrupt Release
aaa-028651
Fig 6.
Interrupt trigger and release
• The interrupt trigger is by all 3 bits of Flag register (0x03h) and 4 bits of Status register
(0x02h). When one of them changes from “0” to “1”, the interrupt is triggered. An
event will be latched and only the first occurrence triggers an interrupt (if not masked).
Reoccurring events will not trigger an additional interrupt.
• The interrupt release of the Flag register is by read on clear, tDET timer start, the
interrupt status over 1000 ms or NX30P6093 disabled by EN. For OV_FLG and
OT_FLG interrupt, if it is not read by host and the fault condition is back to normal in
1000ms, the INT will be released. The bit values of register 0x03h are cleared only by
host read or VIN dropping below UVLO.
NX30P6093
Product data sheet
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NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
• The interrupt release of Status register is by read on clear, tDET timer start, the
interrupt status over 1000ms or NX30P6093 disabled by EN. The 4 bit values are the
real status of the circuit status and will not be cleared when the host reads them after
an interrrupt.
8.9 I2C-bus interface
NX30P6093 implements an I2C-bus slave interface which interfaces with the host system.
The host processor can issue commands, monitor status and receive response through
this bus. A detailed description of the I2C-bus specification, with applications, is given in
UM10204, “I2C-bus specification and user manual”. NX30P6093 supports I2C-bus data
transfers in both Standard-mode (100 kbit/s), Fast-mode (400 kbit/s) and Fast-mode (2
Mbit/s).
As an exception to the I2C-bus specification, the NX30P6093 does not support the I2C
‘General Call’ address (and therefore does not issue an Acknowledge), clock stretching,
Software Reset command, nor 10-bit address. The various registers, address offsets and
bit definitions are shown in Table 12.
The I2C address at Power-On Reset is as follows:
• Write address: 0x6C
• Read address: 0x6D
NX30P6093
Product data sheet
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Addr
NXP Semiconductors
NX30P6093
Product data sheet
Table 12.
NX30P6093 Register map
Name
Type
Reset
Value
Bit 7
Bit 6
Bit 5
Device ID
Register
R
0x01h
Enable Register
R/W
00h
VOUT_EN
0x02h
Status Register
R
00h
PWRON_
STS
0x03h
Flag
C/R
00h
Reserved
0x04h
Interrupt Mask
R/W
F7h
PWRON_
STS
0x05h
OVLO Trigger
level
R/W
30h
Reserved
RNG2
RNG1
0x06h
Isource to VIN
R/W
00h
Reserved
Reserved
0x07h
Isource working
time
R/W
00h
TDET3
0x08h
Voltage to VIN
R
00h
0x09h
Set Tag on VIN
R/W
0x0Ah
Reserved
-
Bit 3
Bit 2
Vendor ID
DETC_EN
Reserved
Bit 1
Bit 0
Version ID
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OV_FLG
OC_FLG
OT_FLG
Reserved
OV_FLG
OC_FLG
OT_FLG
RNG0
OV_SEL
Reserved
OV1
OV0
Reserved
Reserved
ISRC3
ISRC2
ISRC1
ISRC0
TDET2
TDET1
TDET0
DUTY3
DUTY2
DUTY1
DUTY0
VIN7
VIN6
VIN5
VIN4
VIN3
VIN2
VIN1
VIN0
FFh
TVIN7
TVIN6
TVIN5
TVIN4
TVIN3
TVIN2
TVIN1
TVIN0
R/W
00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OVER_TAG TMR_OUT_
SWON_STS
_STS
STS
Reserved
Reserved
Reserved
OVER_TAG TMR_OUT_
SWON_STS
_STS
STS
0x0Bh
Reserved
R/W
00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x0Ch
Reserved
R/W
00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x0Dh
Reserved
R/W
00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x0Eh
Additional OVP
R/W
00h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
AOVP1
AOVP0
0x0Fh
Slew rate Tune
R/W
03h
Reserved
Reserved
Reserved
Reserved
Reserved
SRT2
SRT1
SRT0
NX30P6093
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High-voltage I2C controlled overvoltage protection load switch
Rev. 1.1 — 18 September 2018
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0x00h
Bit 4
NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
8.9.1 Device ID Register (Address 0x00h)
Table 13.
Device ID Register
Bit
Name
Type
Reset
Value
Description
7:3
Vendor ID
R
10011
NXP Vendor ID 00011
2:0
Version ID
R
010
Device revision number 010
8.9.2 Enable Register (Address 0x01h)
Table 14.
Enable Register
Bit
Name
Type
Reset
Value
Description
7
VOUT_EN
R/W
0h
0h = Main switch MOSFET turned on
1h = Main switch MOSFET turned off
6
DETC_EN
R/W
0h
0h = ISOURCE VIN impedance detection
turn off
1h = ISOURCE VIN impedance detection
turn on
5:0
Reserved
R/W
0h
0h = default
8.9.3 Status Register (Address 0x02h)
Table 15.
Status Register
Bit
Name
Type
Reset
Value
Description
7
PWRON_STS
R
0h
0h = VIN voltage less than VUVLO
1h= VIN voltage larger than VUVLO. An
interrupt will be issued, please refer to
Section 8.7 for the details
6
OVER_TAG_STS
R
0h
0h = VIN detected voltage less than Tag
voltage
1h = VIN detected voltage larger than Tag
voltage. An interrupt will be issued, please
refer to Section 8.7 for the details
5
TMR_OUT_STS
R
0h
0h = tDET timer is not out
1h = tDET timer out. An interrupt will be
issued, please refer to Section 8.7 for the
details
4
SWON_STS
R
0h
0h = The main switch is turned off
1h= The main switch is turned on. An
interrupt will be issued, please refer to
Section 8.7 for the details
3:0
Reserved
R
0h
0h = default
8.9.4 Flag Register (Address 0x03h)
This is the interrupt register, when one of the FLAGs is “1”, the INT pin will be pulled LOW.
Please refer to Section 8.8.
NX30P6093
Product data sheet
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High-voltage I2C controlled overvoltage protection load switch
Table 16.
FLAG Register
Bit
Name
Type
Reset
Value
Description
7:3
Reserved
C/R
0h
0h = Default
2
OV_FLG
C/R
0h
overvoltage protection flag
When overvoltage protection triggered, set
this bit as “1”
1
OC_FLG
C/R
0h
Short circuit protection flag
When short circuit protection triggered, set
this bit as “1”
0
OT_FLG
C/R
0h
Overtemperature protection flag
When Overtemperature protection triggered,
set this bit as “1”
8.9.5 Interrupt Mask Register (Address 0x04h)
This is the register to enable masking of the interrupts of both Flag Register and Status
Register.
Table 17.
Interrupt Mask Register
Bit
Name
Type
Reset
Value
Description
7
PWRON_STS
R/W
1h
0h = mask OVER_TAG_STS interrupt
1h = Do not mask OVER_TAG_STS
interrupt
6
OVER_TAG_STS
R/W
1h
0h = mask OVER_TAG_STS interrupt
1h = Do not mask OVER_TAG_STS
interrupt
5
TMR_OUT_STS
R/W
1h
0h = mask TMR_OUT_STS interrupt
4
SWON_STS
R/W
1h
0h = mask OVER_TAG_STS interrupt
1h = Do not mask TMR_OUT_STS interrupt
1h = Do not mask OVER_TAG_STS
interrupt
3
Reserved
R/W
0h
0h = Default
2
OV_FLG
R/W
1h
0h = mask OV_FLG interrupt
1h = Do not mask OV_FLG interrupt
1
OC_FLG
R/W
1h
0h = mask OC_FLG interrupt
0
OT_FLG
R/W
1h
0h = mask OT_FLG interrupt
1h = Do not mask OC_FLG interrupt
1h = Do not mask OT_FLG interrupt
8.9.6 OVLO trig level Register (Address 0x05h)
This is the register to set OVLO trig level and also another 2 bits for enable signal.
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High-voltage I2C controlled overvoltage protection load switch
Table 18.
OVLO trig level Register
Bit
Name
Type
Reset
Value
Description
7
Reserved
R/W
0h
0h = Default
6:4
RNG[2:0]
R/W
03h
OVLO fine tune bits, please refer to
Section 8.4
3
OV_SEL
R/W
0h
0h= OVLO level adjusted by ADJ pin
1h=OVLO level adjusted by I2C register bit
2
Reserved
R/W
0h
0h = Default
1:0
OV[1:0]
R/W
0h
OVLO threshold set bits, please refer to
Section 8.4
8.9.7 Isource to VIN Register (Address 0x06h)
This is the register to set Isource value for VIN impedance detection; please refer to
Section 8.7.
Table 19.
Isource to VIN register
Bit
Name
Type
Reset
Value
Description
7:4
Reserved
R/W
0h
0h = Default
3:0
ISRC[3:0]
R/W
0h
Isource current value setting bits
8.9.8 Isource timing Register (Address 0x07h)
This is the register to set Isource timing for VIN impedance detection; please refer to
Section 8.7.
Table 20.
Isource timing Register
Bit
Name
Type
Reset
Value
Description
7:4
TDET[3:0]
R/W
0h
Isource current pulse width setting bits
3:0
DUTY[3:0]
R/W
0h
VIN Impedance detection duty cycle setting
bits
8.9.9 Voltage on VIN Register (Address 0x08h)
This is the register to store the VIN voltage detection results from ADC; please refer to
Section 8.7.
Table 21.
Voltage on VIN Register
Bit
Name
Type
Reset
Value
Description
7:0
VIN[7:0]
R
0h
VIN voltage detection results. The detected
VIN voltage can be calculated as:
VIN 7:0
V DET = 2.7 ----------------------256
Where VIN[7:0] is the decimal value of this
register
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High-voltage I2C controlled overvoltage protection load switch
8.9.10 Set tag on VIN Register (Address 0x09h)
This is the register to set the tag of VIN voltage in VIN impedance detection, please refer
to Section 8.7.
Table 22.
Set tag on VIN Register
Bit
Name
Type
Reset
Value
Description
7:0
TVIN[7:0]
R/W
FFh
Set tag of VIN voltage bits. The TVIN [7:0]
can be calculated as:
V TAG
TVIV = -----------2.7
Where TVIN is decimal data and should be
transfered to binary to TVIN[7:0]
8.9.11 Additional OVP Register (Address 0x0Eh)
This is the register to set additional OVLO trip level, please refer to Section 8.4 for the
details.
Table 23.
Additional OVP Register
Bit
Name
Type
Reset
Value
Description
7:2
Reserved
R/W
00h
00h = Default
1:0
AOVP[1:0]
R/W
00h
Set additional OVLO trip level
8.9.12 Slew rate tune Register (Address 0x0Fh)
This is the register to set the load switch slew rate. please refer to Section 8.2 for the
details.
Table 24.
Additional OVP Register
Bit
Name
Type
Reset
Value
Description
7:3
Reserved
R/W
00h
00h = Default
2:0
SRT[2:0]
R/W
03h
Set slew rate tune
9. Application diagram
The NX30P6093 is typically used on a USB port charging path in a portable, battery
operated device. The I2C signals require an external pull-up resistor which should be
connected to a supply voltage matching the logic input pin supply level that it is connected
to.
When the default internal OVLO threshold is used, the ADJ pin shall be shorted to GND.
While OVLO threshold is adjusted by ADJ pin, a resister divider shall be connected.
In order to have better VIN pin impedance detection range, it is recommended that the
total resistance of R1 and R2 are larger than 1 M.
NX30P6093
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High-voltage I2C controlled overvoltage protection load switch
For the best performance, it is recommended to keep input and output trace short and
capacitors as close to the device as possible. Regarding the thermal performance, it is
recommended to increase the PCB area around VIN and VOUT pins.
The NX30P6093 does not support OTG mode.
VDD
VIN
VOUT
CHARGER
USB PORT
R1
COUT
CIN
ADJ
R2
NX30P6093
SCL
SDA
SYSTEM
CHIP
INT
EN
GND
aaa-028652
R1 and R2 are only needed for adjustable VOVLO; To use default VOVLO threshold, connect OVLO
to GND
The recommended resistor value R1 + R2 > 1 M
CIN and COUT minimum are recommended to be 1 F;
Fig 7.
NX30P6093
Product data sheet
NX30P6093 application diagram
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High-voltage I2C controlled overvoltage protection load switch
10. Limiting values
Table 25. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
input voltage
VI
Conditions
[1]
VIN
VDD
ADJ
[2]
EN
output voltage
VO
Min
Max
Unit
2
+29
V
0.3
+7.0
V
0.3
VIN
V
0.3
+7.0
V
SCL, SDA
0.3
+7.0
V
VOUT
0.3
+22
V
EN
0.3
+7.0
V
EN: VI < 0.5 V
50
-
mA
IIK
input clamping current
ISK
switch clamping current
VIN; VOUT; VI < 0.5 V
50
-
mA
ISW
continuous switch
current
Tamb = 85 C
-
8
A
peak switch current
100 s pulse, 2 % duty cycle
-
10
A
65
+150
C
-
1.7
W
Tstg
storage temperature
Ptot
total power dissipation
[3]
[1]
The -2 V limiting value is 200 ms non-repetitive pulse
[2]
The minimum input voltage rating may be exceeded if the input current rating is observed.
[3]
The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed in conjunction
with lower ambient temperatures. The conditions to determine the specified values are Tamb = 25 C and the use of a 4 layer PCB.
11. Recommended operating conditions
Table 26.
Recommended operating conditions
Symbol
Parameter
VI
input voltage
Conditions
Min
Max
Unit
VIN
2.8
20
V
EN
0
5.5
V
VDD
3.0
4.5
V
INT
0
5.5
V
VO
output voltage
Tj(max)
maximum junction temperature
40
+125
C
Tamb
ambient temperature
40
+85
C
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High-voltage I2C controlled overvoltage protection load switch
12. Thermal characteristics
Table 27.
Symbol
Rth(j-a)
Thermal characteristics
Parameter
Conditions
thermal resistance from junction to ambient
[1][2]
Typ
Unit
58.6
K/W
[1]
The overall Rth(j-a) can vary depending on the board layout. To minimize the effective Rth(j-a), all pins must have a solid connection to
larger Cu layer areas e.g. to the power and ground layer. In multi-layer PCB applications, the second layer should be used to create a
large heat spreader area right below the device. If this layer is either ground or power, it should be connected with several vias to the top
layer connecting to the device ground or supply.Try not to use any solder-stop varnish under the chip.
[2]
This Rth(j-a) is calculated based on JEDEX2S2P board. The actual Rth(j-a) value may vary in applications using different layer stacks and
layouts.
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High-voltage I2C controlled overvoltage protection load switch
13. Static characteristics
Table 28. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Tamb = 25 C
Tamb = 40 C to +85 C Unit
Symbol
Parameter
Conditions
Min
Typ
Max
Min
Max
VIH
HIGH-level input
voltage
EN pin; VI(VIN) = 2.8 V to 20 V
1.2
-
-
1.2
-
V
VIL
LOW-level input
voltage
EN pin; VI(VIN) = 2.8 V to 20 V
-
-
0.4
-
0.4
V
IEN
Input leakage
current
EN pin; VI(EN) = 0 V
-
0.1
-
-1
1
A
CI
input capacitance
EN pin; VI(VIN) = 5 V
-
5
-
-
-
pF
Rpd
pull-down resistance EN pin
-
1
-
-
-
M
Iq
VIN quiescent
current
EN = 0 V; VI(VIN) = 5.0 V; IO =
0A
-
150
-
-
200
A
EN = 5.0 V; VI(VIN) = 5.0 V; IO
=0A
-
1
-
-
3
A
Iq_SLEEP
VDD Sleep mode
current
EN = 0 V; VI(VIN) VOVLO to V(VOUT) =
time
80 % of V(VIN); Rload = 100 ,; Cload
= 0 F; VI(VIN) = 20 V; ADJ pin short
to GND; VIN rise >2 V/us
-
30
-
-
100
ns
tstart
VIN start time EN = 0; from VIN > VUVLO to
V(VOUT) = 10 % of V(VIN)
-
23.5
-
15
30
ms
tdis
Disable time
From EN to V(VOUT) = 90 % of
V(VIN); VI(VIN) = 5 V; CLoad =
0 F; RLoad = 100
-
0.2
-
0.1
0.5
s
tDEB
Debounce
time
Time from VUVLO < VIN <
VOVLO to V(VOUT) = 10 % of
V(VIN)
-
23.5
-
-
-
ms
Time from DETC_EN = 1 to
device ready for VIN
impedance detection
-
1.5
3
-
3
ms
-
3
-
-
-
s
tVINDISCHA Time taken for VDD = 3.3 V;
VIN discharge Load Capacitance = 10 F
RGE
VBUS pin going down below
Vsafe0V after VBUS
detached and switch disabled
-
-
-
-
650
ms
VDD = 3.3 V;
Load Capacitance = 10 F
VBUS pin going down below
Vsafe5V (when initial voltage
is >5 V) after VBUS detached
and switch disabled
-
-
-
-
275
ms
tWAKEUP[1] Sleep to VIN
detection
wake up time
tSCP
[1]
Short circuit
VIN=5 V; Time from short
protection
circuit happened to switch
response time turn off
Guaranteed by design
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High-voltage I2C controlled overvoltage protection load switch
Table 31. I2C-bus interface timing requirements
At recommended operating conditions; Tamb = 40 C to +85 C; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Standard Mode
Fast Mode
Unit
Min
Max
Min
Max
fSCL
I2C SCL clock frequency
0
100
0
1000
kHz
tHIGH
HIGH period of the SCL clock
4
-
0.6
-
s
4.7
-
1.3
-
s
-
50
-
50
ns
250
-
100
tLOW
LOW period of the SCL clock
tSP
pulse width of spikes that will be
suppressed by the input filter
tSU;DAT
data set-up time
-
ns
[1]
300
ns
tr
rise time of both SDA and SCL
signals
-
1000
20+0.1Cb
tf
fall time of both SDA and SCL
signals
-
300
20+0.1Cb [1]
300
ns
tBUF
bus free time between a STOP and
START condition
4.7
-
1.3
-
s
tSU;STA
set-up time for a repeated START
condition
4.7
-
0.6
-
s
tHD;STA
hold time (repeated) START
condition
4
-
0.6
-
s
tSU;STO
set-up time for STOP condition
4
-
0.6
-
s
tVD;DAT
data valid time
SCL LOW to SDA
output valid
-
3.45
-
0.9
s
tVD;ACK
data valid acknowledge time
ACK signal from
SCL LOW to SDA
LOW
-
3.45
-
0.9
s
[1]
Cb = total capacitance of one bus line in pF.
14.1 Waveforms and test circuit
VOVLO
VIN
0V
tTLH
90%
VOUT
10%
0V
tSTART
Including
debounce time
tdis(OVP)
Thermal
shut down
80% VIN
10%
tDEB
80%
10%
tDEB
tdis
EN
aaa-028669
Fig 16. Timing diagram
NX30P6093
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High-voltage I2C controlled overvoltage protection load switch
(1
9%86
*
5/
9,
9(;7
&/
aaa-028670
Test Condition is given in Table 32
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 17. Test circuit for measuring switching times
Table 32.
Test Condition
Supply voltage VEXT
Load
VIN
CL
RL
2.8 V to 20 V
22 F
100
9
DDD
9,1
,9,1
, $
(1
9287
9
7LPH PV
9,1
(1
9287
7LPH PV
VI(VIN) = 20.0 V; RL = 100 ; CL = 22F
(1) VOUT
(2) EN
(2) EN
(3) II(VIN)
(3) II(VIN)
Fig 18. Turn-on time and in-rush current at 20 V
Product data sheet
,9,1
(1) VOUT
NX30P6093
, $
VI(VIN) = 20.0 V; RL = 100 ; CL = 22F
DDD
Fig 19. Turn-off time at 20 V
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High-voltage I2C controlled overvoltage protection load switch
9
DDD
, $
9,1
(1
9
DDD
, $
9,1
9287
,
9,1
9287
7LPH PV
VI(VIN) = 5 V; RL = 100 ; CL = 22 F
,
9,1
(1
(1) VOUT
(2) EN
(2) EN
(3) II(VIN)
(3) II(VIN)
Fig 20. Turn-on time and in-rush current at 5 V
Product data sheet
7LPH PV
VI(VIN) = 5 V; RL = 100 ; CL = 22 F
(1) VOUT
NX30P6093
Fig 21. Turn-off time at 5 V
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NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
15. Packing information
15.1 SOT1397-6 (WLCSP20); Reel dry pack, SMD, 7" Q2 standard product
orientation; Ordering code (12NC) ending 080
15.1.1 Dimensions and quantities
Table 33.
Dimensions and quantities
Reel dimensions
d w (mm) [1]
SPQ/PQ
(pcs)
Reels
per box
180 8
4000
1
[1]
d = reel diameter; w = tape width.
15.1.2 Product orientation
ball 1
aaa-018392
Ball 1 is in quadrant 2.
Fig 22. Product orientation in carrier tape
15.1.3 Carrier tape dimensions
4 mm
W
K0
A0
B0
P1
T
direction of feed
001aao148
Not drawn to scale.
Fig 23. Carrier tape dimensions
Table 34. Carrier tape dimensions
In accordance with IEC 60286-3/EIA-481.
NX30P6093
Product data sheet
A0 (mm)
B0 (mm)
K0 (mm)
T (mm)
P1 (mm)
W (mm)
2.00 0.05
2.30 0.05
0.75 0.05
0.25 0.03
4.0 0.10
8.0 0.10
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High-voltage I2C controlled overvoltage protection load switch
16. Package outline
Fig 24. Package outline SOT1397-6 (WLCSP20)
NX30P6093
Product data sheet
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High-voltage I2C controlled overvoltage protection load switch
17. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
NX30P6093 v1.1
20180918
Product data sheet
-
NX30P67093 v1.0
Modifications:
NX30P6093 v1.0
NX30P6093
Product data sheet
•
•
•
Removed “Company confidential” status
Table 25 “Limiting values”: ISW, continuous switch current; changed max from 6 to 8
Table 26 “Recommended operating conditions”: VI, input voltage VIN; changed min from 0
to 2.8
20180424
Product data sheet
-
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Rev. 1.1 — 18 September 2018
-
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High-voltage I2C controlled overvoltage protection load switch
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
NX30P6093
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 18 September 2018
© NXP B.V. 2018. All rights reserved.
32 of 34
NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NX30P6093
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 18 September 2018
© NXP B.V. 2018. All rights reserved.
33 of 34
NX30P6093
NXP Semiconductors
High-voltage I2C controlled overvoltage protection load switch
20. Contents
1
2
3
4
4.1
5
6
7
7.1
7.2
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.9.7
8.9.8
8.9.9
8.9.10
8.9.11
8.9.12
9
10
11
12
13
13.1
13.2
13.3
14
14.1
15
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
EN input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Slew rate tune. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Undervoltage lockout . . . . . . . . . . . . . . . . . . . . 5
Overvoltage lockout . . . . . . . . . . . . . . . . . . . . . 5
Overtemperature protection . . . . . . . . . . . . . . . 7
Short circuit protection . . . . . . . . . . . . . . . . . . . 7
VIN Impedance detection . . . . . . . . . . . . . . . . . 8
Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
I2C-bus interface. . . . . . . . . . . . . . . . . . . . . . . 11
Device ID Register (Address 0x00h) . . . . . . . 13
Enable Register (Address 0x01h). . . . . . . . . . 13
Status Register (Address 0x02h) . . . . . . . . . . 13
Flag Register (Address 0x03h) . . . . . . . . . . . . 13
Interrupt Mask Register (Address 0x04h) . . . . 14
OVLO trig level Register (Address 0x05h) . . . 14
Isource to VIN Register (Address 0x06h) . . . . . 15
Isource timing Register (Address 0x07h) . . . . . 15
Voltage on VIN Register (Address 0x08h) . . . 15
Set tag on VIN Register (Address 0x09h). . . . 15
Additional OVP Register (Address 0x0Eh) . . . 16
Slew rate tune Register (Address 0x0Fh). . . . 16
Application diagram . . . . . . . . . . . . . . . . . . . . 16
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 18
Recommended operating conditions. . . . . . . 18
Thermal characteristics . . . . . . . . . . . . . . . . . 19
Static characteristics. . . . . . . . . . . . . . . . . . . . 20
Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . 24
ON resistance test circuit and graphs. . . . . . . 24
Dynamic characteristics . . . . . . . . . . . . . . . . . 25
Waveforms and test circuit . . . . . . . . . . . . . . . 26
Packing information . . . . . . . . . . . . . . . . . . . . 29
15.1
15.1.1
15.1.2
15.1.3
16
17
18
18.1
18.2
18.3
18.4
19
20
SOT1397-6 (WLCSP20); Reel dry pack, SMD, 7"
Q2 standard product orientation; Ordering code
(12NC) ending 080. . . . . . . . . . . . . . . . . . . . . 29
Dimensions and quantities. . . . . . . . . . . . . . . 29
Product orientation . . . . . . . . . . . . . . . . . . . . . 29
Carrier tape dimensions . . . . . . . . . . . . . . . . . 29
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 30
Revision history . . . . . . . . . . . . . . . . . . . . . . . 31
Legal information . . . . . . . . . . . . . . . . . . . . . . 32
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 32
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Contact information . . . . . . . . . . . . . . . . . . . . 33
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2018.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 18 September 2018
Document identifier: NX30P6093
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