NX3L2267SGU,115

NX3L2267 Low-ohmic dual single-pole double-throw analog switch Rev. 5 — 18 June 2012 Product data sheet 1. General description The NX3L2267 is a dual low-ohmic single-pole double-throw analog switch suitable for use as an analog or digital 2:1 multiplexer/demultiplexer. Each switch has a digital select input (nS), two independent inputs/outputs (nY0 and nY1) and a common input/output (nZ). Schmitt trigger action at the digital inputs makes the circuit tolerant to slower input rise and fall times. Low threshold digital inputs allows this device to be driven by 1.8 V logic levels in 3.3 V applications without significant increase in supply current ICC. This makes it possible for the NX3L2267 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level translation. The NX3L2267 allows signals with amplitude up to VCC to be transmitted from nZ to nY0 or nY1, or from nY0 or nY1 to nZ. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal attenuation and distortion of transmitted signals. 2. Features and benefits  Wide supply voltage range from 1.4 V to 4.3 V  Very low ON resistance (peak):  1.65  (typical) at VCC = 1.4 V  0.95  (typical) at VCC = 1.65 V  0.55  (typical) at VCC = 2.3 V  0.50  (typical) at VCC = 2.7 V  0.50  (typical) at VCC = 4.3 V  Break-before-make switching  High noise immunity  ESD protection:  HBM JESD22-A114F Class 3A exceeds 7500 V  MM JESD22-A115-A exceeds 200 V  CDM AEC-Q100-011 revision B exceeds 1000 V  IEC61000-4-2 contact discharge exceeds 6000 V for switch ports  CMOS low-power consumption  Latch-up performance exceeds 100 mA per JESD 78B Class II Level A  1.8 V control logic at VCC = 3.6 V  Control input accepts voltages above supply voltage  Very low supply current, even when input is below VCC  High current handling capability (350 mA continuous current under 3.3 V supply)  Specified from 40 C to +85 C and from 40 C to +125 C NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 3. Applications  Cell phone  PDA  Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version NX3L2267GM 40 C to +125 C XQFN10 plastic extremely thin quad flatpackage; no leads; 10 terminals; body 2  1.55  0.5 mm SOT1049-3 NX3L2267GU 40 C to +125 C XQFN10 plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.40  1.80  0.50 mm SOT1160-1 5. Marking Table 2. Marking Type number Marking code NX3L2267GM M67 NX3L2267GU M7 6. Functional diagram Y1 1Y0 2Y0 1S 2S 1Z 2Z 1Y1 S Y0 2Y1 001aac355 001aaj085 Fig 1. Logic symbol NX3L2267 Product data sheet Z Fig 2. Logic diagram (one switch) All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 7. Pinning information 7.1 Pinning 1Y1 8 1Z 1S 1Y1 1 7 1S 2Y0 3 7 2S 2Y0 2 6 2S 2Y1 4 6 2Z GND aaa-003426 2Z 5 8 GND 4 2 2Y1 3 1Z 5 9 Transparent top view Fig 3. 10 1Y0 VCC 1 10 1Y0 terminal 1 index area 9 VCC NX3L2267 NX3L2267 001aam198 Transparent top view Pin configuration SOT1049-3 (XQFN10) Fig 4. Pin configuration SOT1160-1 (XQFN10) 7.2 Pin description Table 3. Pin description Symbol Pin Description SOT1049-3 SOT1160-1 1Y0 1 10 independent input or output 1Y1 2 1 independent input or output 2Y0 3 2 independent input or output 2Y1 4 3 independent input or output GND 5 4 ground (0 V) 2Z 6 5 common output or input 2S 7 6 select input 1S 8 7 select input 1Z 9 8 common output or input VCC 10 9 supply voltage NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 8. Functional description Table 4. Function table[1] Input nS Channel on L nY0 = nZ H nY1 = nZ [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage Conditions select input nS Min Max Unit 0.5 +4.6 V [1] 0.5 +4.6 V [2] 0.5 VCC + 0.5 V VSW switch voltage IIK input clamping current VI < 0.5 V 50 - mA ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V - 50 mA ISW switch current VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current - 350 mA VSW > 0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current - 500 mA 65 +150 C - 250 mW Tstg storage temperature total power dissipation Ptot Tamb = 40 C to +125 C [3][4] [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. [3] For XQFN10 (SOT1049-3) package: above 132 C the value of Ptot derates linearly with 14.1 mW/K. [4] For XQFN10 (SOT1160-1) package: above 128 C the value of Ptot derates linearly with 11.5 mW/K. 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW switch voltage Tamb ambient temperature t/V input transition rise and fall rate Conditions select input nS Min Max Unit 1.4 4.3 V 0 4.3 V switch input nY0 or nY1 [1] 0 VCC V 40 +125 C VCC = 1.4 V to 4.3 V [2] - 200 ns/V [1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nYn. In this case, there is no limit for the voltage drop across the switch. [2] Applies to select input nS signal levels. NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter VIH VIL HIGH-level input voltage LOW-level input voltage Tamb = 25 C Conditions Typ Max Min VCC = 1.4 V to 1.6 V 0.9 - - 0.9 - - V VCC = 1.65 V to 1.95 V 0.9 - - 0.9 - - V VCC = 2.3 V to 2.7 V 1.1 - - 1.1 - - V VCC = 2.7 V to 3.6 V 1.3 - - 1.3 - - V VCC = 3.6 V to 4.3 V 1.4 - - 1.4 - - V VCC = 1.4 V to 1.6 V - - 0.3 - 0.3 0.3 V VCC = 1.65 V to 1.95 V - - 0.4 - 0.4 0.3 V VCC = 2.3 V to 2.7 V - - 0.5 - 0.5 0.4 V - - 0.5 - 0.5 0.5 V VCC = 3.6 V to 4.3 V - - 0.6 - 0.6 0.6 V - - - - 0.5 1 A VCC = 1.4 V to 3.6 V - - 5 - 10 100 nA VCC = 3.6 V to 4.3 V - - 10 - 50 200 nA VCC = 1.4 V to 3.6 V - - 5 - 20 200 nA VCC = 3.6 V to 4.3 V - - 10 - 50 400 nA VCC = 3.6 V - - 100 - 300 3000 nA VCC = 4.3 V - - 150 - 500 5000 nA additional VSW = GND or VCC supply current VI = 2.6 V; VCC = 4.3 V - 2.0 4.0 - 7 7 A VI = 2.6 V; VCC = 3.6 V - 0.35 0.7 - 1 1 A VI = 1.8 V; VCC = 4.3 V - 7.0 10.0 - 15 15 A VI = 1.8 V; VCC = 3.6 V - 2.5 4.0 - 5 5 A VI = 1.8 V; VCC = 2.5 V - 50 200 - 300 500 nA - 1.0 - - - - pF select input nS; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V IS(OFF) OFF-state leakage current nYn port; see Figure 5 ON-state leakage current nZ port; see Figure 6 ICC Max Max (85 C) (125 C) VCC = 2.7 V to 3.6 V input leakage current ICC Unit Min II IS(ON) Tamb = 40 C to +125 C supply current VI = VCC or GND; VSW = GND or VCC CI input capacitance CS(OFF) OFF-state capacitance port nYn - 35 - - - - pF CS(ON) ON-state capacitance port nYn - 135 - - - - pF NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 11.1 Test circuits VCC VIL or VIH nS nY0 1 nZ nY1 2 switch switch nS 1 VIH 2 VIL IS VI VO GND 012aaa000 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 5. Test circuit for measuring OFF-state leakage current VCC VIL or VIH IS nS nY0 1 nZ nY1 2 switch nS 1 VIH 2 VIL switch VI VO GND 012aaa001 VI = 0.3 V or VCC  0.3 V; VO = VCC  0.3 V or 0.3 V. Fig 6. Test circuit for measuring ON-state leakage current NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14. Symbol Parameter 40 C to +85 C Conditions Min RON(peak) ON resistance (peak) Min Max VCC = 1.4 V - 1.65 3.7 - 4.1  VCC = 1.65 V - 0.95 1.6 - 1.7  VCC = 2.3 V - 0.55 0.8 - 0.9  VCC = 2.7 V - 0.50 0.75 - 0.9  - 0.50 0.75 - 0.9  VCC = 1.4 V - 0.20 0.35 - 0.35  VCC = 1.65 V - 0.20 0.25 - 0.30  VCC = 2.3 V - 0.09 0.13 - 0.15  VCC = 2.7 V - 0.09 0.125 - 0.15  - 0.09 0.125 - 0.15  VCC = 1.4 V - 1.05 3.35 - 3.65  VCC = 1.65 V - 0.55 1.25 - 1.35  VCC = 2.3 V - 0.20 0.35 - 0.40  VCC = 2.7 V - 0.18 0.35 - 0.40  VCC = 4.3 V - 0.23 0.40 - 0.45  ON resistance mismatch VI = GND to VCC; between channels ISW = 100 mA [2] VCC = 4.3 V RON(flat) Max Unit port nYn; VI = GND to VCC; ISW = 100 mA; see Figure 7 VCC = 4.3 V RON 40 C to +125 C Typ[1] ON resistance (flatness) port nYn; VI = GND to VCC; ISW = 100 mA [3] [1] Typical values are measured at Tamb = 25 C. [2] Measured at identical VCC, temperature and input voltage. [3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 11.3 ON resistance test circuit and graphs 001aag564 1.6 RON (Ω) 1.2 (1) VSW V VCC nS VIL or VIH nZ nY0 1 switch nY1 2 VI 0.8 switch nS 1 VIL 2 VIH (2) (3) (4) 0.4 (5) (6) ISW 0 GND 0 1 2 RON = VSW / ISW. 3 4 5 VI (V) 012aaa002 (1) VCC = 1.5 V. (2) VCC = 1.8 V. (3) VCC = 2.5 V. (4) VCC = 2.7 V. (5) VCC = 3.3 V. (6) VCC = 4.3 V. Measured at Tamb = 25 C. Fig 7. Test circuit for measuring ON resistance NX3L2267 Product data sheet Fig 8. Typical ON resistance as a function of input voltage (Yn port) All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 001aag565 1.6 001aag566 1.0 RON (Ω) RON (Ω) 0.8 1.2 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.8 0.4 0.4 0.2 0 0 0 1 2 3 0 1 2 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 9. ON resistance as a function of input voltage; VCC = 1.5 V (nYn port) 001aag567 1.0 3 VI (V) Fig 10. ON resistance as a function of input voltage; VCC = 1.8 V (nYn port) 001aag568 1.0 RON (Ω) RON (Ω) 0.8 0.8 0.6 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 (1) (2) (3) (4) 0 0 1 2 3 0 VI (V) (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 11. ON resistance as a function of input voltage; VCC = 2.5 V (nYn port) Product data sheet 2 3 VI (V) (1) Tamb = 125 C. NX3L2267 1 Fig 12. ON resistance as a function of input voltage; VCC = 2.7 V (nYn port) All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 001aag569 1.0 001aaj896 1.0 RON (Ω) RON (Ω) 0.8 0.8 0.6 0.6 (1) (2) (3) (4) 0.4 (1) (2) (3) (4) 0.4 0.2 0.2 0 0 0 1 2 3 4 0 1 2 3 4 VI (V) 5 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V Fig 14. ON resistance as a function of input voltage; VCC = 4.3 V 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter ten tdis enable time disable time Tamb = 25 C Conditions Product data sheet Unit Min Max Min Max (85 C) Max (125 C) VCC = 1.4 V to 1.6 V - 50 90 - 120 120 ns VCC = 1.65 V to 1.95 V - 36 70 - 80 90 ns VCC = 2.3 V to 2.7 V - 24 45 - 50 55 ns VCC = 2.7 V to 3.6 V - 22 40 - 45 50 ns VCC = 3.6 V to 4.3 V - 22 40 - 45 50 ns - 32 70 - 80 90 ns nS to nZ or nYn; see Figure 15 nS to nZ or nYn; see Figure 15 VCC = 1.4 V to 1.6 V NX3L2267 Tamb = 40 C to +125 C Typ[1] VCC = 1.65 V to 1.95 V - 20 55 - 60 65 ns VCC = 2.3 V to 2.7 V - 12 25 - 30 35 ns VCC = 2.7 V to 3.6 V - 10 20 - 25 30 ns VCC = 3.6 V to 4.3 V - 10 20 - 25 30 ns All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch Table 9. Dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17. Symbol Parameter tb-m Tamb = 25 C Conditions Tamb = 40 C to +125 C Unit Min Typ[1] Max Min Max (85 C) Max (125 C) - 19 - 9 - - ns VCC = 1.65 V to 1.95 V - 17 - 7 - - ns VCC = 2.3 V to 2.7 V - 13 - 4 - - ns VCC = 2.7 V to 3.6 V - 10 - 3 - - ns VCC = 3.6 V to 4.3 V - 10 - 2 - - ns break-before-make see Figure 16 time VCC = 1.4 V to 1.6 V [2] [1] Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. [2] Break-before-make guaranteed by design. 12.1 Waveform and test circuits VI VM nS input GND ten VOH nY1 connected to VEXT tdis VX nZ output OFF to HIGH HIGH to OFF VX GND tdis nY0 connected to VEXT nZ output HIGH to OFF OFF to HIGH VOH ten VX VX 001aak762 GND Measurement points are given in Table 10. Logic level: VOH is typical output voltage level that occurs with the output load. Fig 15. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VX 1.4 V to 4.3 V 0.5VCC 0.9VOH NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 11 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch VCC nS nY0 nZ G VI V VO RL nY1 VEXT = 1.5 V CL GND 012aaa004 a. Test circuit. VI 0.5VI 0.9VO 0.9VO VO tb-m 001aag572 b. Input and output measurement points Fig 16. Test circuit for measuring break-before-make timing VCC G VI V VO RL nS nY0 1 nZ nY1 2 switch VEXT = 1.5 V CL GND 012aaa005 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 17. Test circuit for measuring switching times Table 11. Test data Supply voltage Input VCC VI tr, tf CL RL 1.4 V to 4.3 V VCC  2.5 ns 35 pF 50  NX3L2267 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 12 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf 2.5 ns. Tamb = 25 C Symbol Parameter Conditions THD fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 18 total harmonic distortion Min Typ Max VCC = 1.4 V; VI = 1 V (p-p) - 0.15 - % VCC = 1.65 V; VI = 1.2 V (p-p) - 0.10 - % [1] VCC = 2.3 V; VI = 1.5 V (p-p) - 0.02 - % VCC = 2.7 V; VI = 2 V (p-p) - 0.02 - % VCC = 4.3 V; VI = 2 V (p-p) - 0.02 - % - 0.01 - % - 60 - MHz - 90 - dB - 0.21 - V - 0.30 - V - 90 - dB VCC = 1.5 V - 4 - pC VCC = 1.8 V - 6 - pC VCC = 2.5 V - 16 - pC VCC = 3.3 V - 24 - pC VCC = 4.3 V - 37 - pC VCC = 3.0 V; VI = 1 V (p-p); RL = 600  f(3dB) iso 3 dB frequency response RL = 50 ; see Figure 19 isolation (OFF-state) fi = 100 kHz; RL = 50 ; see Figure 20 [1] port nYn; VCC = 1.4 V to 4.3 V [1] VCC = 1.4 V to 4.3 V crosstalk voltage Vct between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 21 VCC = 1.4 V to 3.6 V VCC = 3.6 V to 4.3 V Xtalk crosstalk between switches; fi = 100 kHz; RL = 50 ; see Figure 22 VCC = 1.4 V to 4.3 V charge injection Qinj [1] Unit [1] fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V; Rgen = 0 ; see Figure 23 fi is biased at 0.5VCC. NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 13 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 12.3 Test circuits VCC 0.5VCC RL nS VIL or VIH switch nS 1 VIL 2 VIH nY0 1 switch nY1 2 nZ fi D GND 012aaa006 Fig 18. Test circuit for measuring total harmonic distortion VCC 0.5VCC RL nS VIL or VIH nZ nY0 1 switch nY1 2 fi switch nS 1 VIL 2 VIH dB GND 012aaa007 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB. Fig 19. Test circuit for measuring the frequency response when channel is in ON-state 0.5VCC VCC 0.5VCC RL RL nS VIL or VIH nY0 1 switch nY1 2 nZ fi switch nS 1 VIH 2 VIL dB GND 012aaa008 Adjust fi voltage to obtain 0 dBm level at input. Fig 20. Test circuit for measuring isolation (OFF-state) NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 14 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch switch nS 1 VIL 2 VIH VCC VI G logic input nS nY0 1 nZ nY1 2 switch RL RL 0.5VCC 0.5VCC CL V VO 012aaa009 a. Test circuit logic input (nS) off on off Vct VO 012aaa010 b. Input and output pulse definitions Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch 0.5VCC 1S VIH RL 1Y0 or 1Z 50 fi 1Z or 1Y0 CHANNEL ON V VO1 0.5VCC 2S VIL RL 2Y0 or 2Z Ri 50 2Z or 2Y0 CHANNEL OFF V VO2 001aaj088 20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2). Fig 22. Test circuit for measuring crosstalk between switches NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 15 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch VCC nS nY0 1 nZ nY1 2 switch Rgen VI G VO RL CL Vgen GND 012aaa011 a. Test circuit. logic (nS) off input on VO off ΔVO 012aaa012 b. Input and output pulse definitions Definition: Qinj = VO  CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 23. Test circuit for measuring charge injection NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 16 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 13. Package outline XQFN10: plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.55 x 2.00 x 0.50 mm SOT1049-3 X B D A terminal 1 index area E A A1 c detail X C C A B C Æv Æw b 5 y y1 C 6 4 e1 e 9 b1 1 10 terminal 1 index area L1 L 0 1 Dimensions Unit(1) mm max nom min 2 mm scale A 0.5 A1 b b1 c D 0.05 0.25 0.33 1.65 0.20 0.28 0.127 1.55 0.00 0.15 0.23 1.45 E e e1 2.1 2.0 1.9 0.5 1.5 L L1 0.48 0.40 0.43 0.35 0.38 0.30 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1049-3 --- MO255 --- sot1049-3_po European projection Issue date 10-12-06 11-03-30 Fig 24. Package outline SOT1049-3 (XQFN10) NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 17 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch XQFN10: plastic, extremely thin quad flat package; no leads; 10 terminals; body 1.40 x 1.80 x 0.50 mm SOT1160-1 X A B D terminal 1 index area E A A1 A3 detail X e1 e 3 5 C C A B C v w b y y1 C L 2 6 1 7 e2 terminal 1 index area 10 L1 8 0 1 scale Dimensions Unit(1) mm max nom min 2 mm A A1 0.5 0.05 A3 b 0.25 0.127 0.20 0.15 0.00 D E 1.5 1.4 1.3 1.9 1.8 1.7 e e1 0.4 0.8 e2 0.4 L L1 0.45 0.55 0.40 0.50 0.35 0.45 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1160-1 --- --- --- sot1160-1_po European projection Issue date 09-12-28 09-12-29 Fig 25. Package outline SOT1160-1 (XQFN10) NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 18 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3L2267 v.5 20120618 Product data sheet - NX3L2267 v.4 Modifications: NX3L2267 v.4 Modifications: • Package outline drawing SOT1049-2 changed to SOT1049-3 (Figure 24). 20111108 • Product data sheet - NX3L2267 v.3 - NX3L2267 v.2 Legal pages updated. NX3L2267 v.3 20101223 Product data sheet NX3L2267 v.2 20100713 Product data sheet - NX3L2267 v.1 NX3L2267 v.1 20091109 Product data sheet - - NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 19 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. NX3L2267 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 20 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com NX3L2267 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 June 2012 © NXP B.V. 2012. All rights reserved. 21 of 22 NX3L2267 NXP Semiconductors Low-ohmic dual single-pole double-throw analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 ON resistance test circuit and graphs. . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Waveform and test circuits . . . . . . . . . . . . . . . 11 Additional dynamic characteristics . . . . . . . . . 13 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Legal information. . . . . . . . . . . . . . . . . . . . . . . 20 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Contact information. . . . . . . . . . . . . . . . . . . . . 21 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 June 2012 Document identifier: NX3L2267