PHB78NQ03LT,118

PHB78NQ03LT N-channel TrenchMOS logic level FET Rev. 05 — 13 June 2005 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features ■ Logic level threshold ■ Fast switching 1.3 Applications ■ Computer motherboards ■ DC-to-DC converters 1.4 Quick reference data ■ VDS ≤ 25 V ■ RDSon ≤ 9 mΩ ■ ID ≤ 40 A ■ QGD = 4 nC (typ) 2. Pinning information Table 1: Pinning Pin Description 1 gate (G) 2 drain (D) 3 source (S) mb mounting base; connected to drain Simplified outline Symbol D mb [1] G mbb076 2 1 3 SOT404 (D2PAK) [1] It is not possible to make a connection to pin 2. S PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 3. Ordering information Table 2: Ordering information Type number PHB78NQ03LT Package Name Description Version D2PAK plastic single-ended surface mounted package; 3 leads (one lead cropped) SOT404 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage 25 °C ≤ Tj ≤ 175 °C - 25 V VDGR drain-gate voltage 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ - 25 V VGS gate-source voltage - ±20 V ID drain current Tmb = 25 °C; VGS = 5 V - 40 A Tmb = 100 °C; VGS = 5 V - 40 A Tmb = 25 °C; VGS = 10 V; Figure 2 and 3 - 40 A Tmb = 100 °C; VGS = 10 V; Figure 2 - 40 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 160 A Ptot total power dissipation Tmb = 25 °C; Figure 1 - 107 W Tstg storage temperature −55 +175 °C Tj junction temperature −55 +175 °C - 40 A - 160 A - 100 mJ Source-drain diode Tmb = 25 °C IS source (diode forward) current ISM peak source (diode forward) current Tmb = 25 °C; pulsed; tp ≤ 10 µs Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy unclamped inductive load; ID = 32 A; tp = 0.17 ms; VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 2 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 03aa16 120 003aaa756 120 Ider (%) Pder (%) 80 80 40 40 0 0 0 50 100 150 Tmb (°C) 0 200 P tot P der = ----------------------- × 100% P ° 50 100 150 ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature Fig 2. Normalized continuous drain current as a function of mounting base temperature 003aaa757 103 ID (A) 200 Tmb (°C) Limit RDSon = VDS / ID tp = 10 µs 102 100 µ s DC 10 1 ms 10 ms 1 10-1 1 10 VDS (V) 102 Tmb = 25 °C; IDM is single pulse; VGS = 10 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 3 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 5. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Figure 4 - - 1.4 K/W Rth(j-a) thermal resistance from junction to ambient - 50 - K/W mounted on a printed-circuit board; minimum footprint; vertical in still air 003aaa759 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10-1 δ= P 0.05 tp T 0.02 single pulse t tp 10-2 10-5 T 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 4 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 6. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 25 - - V Tj = −55 °C 22 - - V Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) IDSS gate-source threshold voltage drain-source leakage current ID = 250 µA; VGS = 0 V ID = 1 mA; VDS = VGS; Figure 9 and 10 Tj = 25 °C 1 1.5 2 V Tj = 175 °C 0.5 - - V Tj = −55 °C - - 2.2 V VDS = 25 V; VGS = 0 V Tj = 25 °C - - 1 µA Tj = 175 °C - - 500 µA RG gate resistance f = 1 MHz - 1 - Ω IGSS gate-source leakage current VGS = ±15 V; VDS = 0 V - 10 100 nA RDSon drain-source on-state resistance VGS = 5 V; ID = 25 A; Figure 6 and 8 Tj = 25 °C - 10.5 13.5 mΩ Tj = 175 °C - 18.9 24.3 mΩ VGS = 10 V; ID = 25 A; Figure 6 and 8 - 7.65 9 mΩ ID = 25 A; VDS = 12 V; VGS = 4.5 V; Figure 11 and 12 - 11 - nC - 3.6 - nC Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGS1 pre-VGS(th) gate-source charge - 1.8 - nC QGS2 post-VGS(th) gate-source charge - 1.8 - nC QGD gate-drain (Miller) charge - 4 - nC VGS(pl) gate-source plateau voltage - 3 - V QG(tot) total gate charge ID = 0 A; VDS = 0 V; VGS = 4.5 V - 8.6 - nC Ciss input capacitance 970 - pF output capacitance VGS = 0 V; VDS = 12 V; f = 1 MHz; Figure 14 - Coss - 415 - pF Crss reverse transfer capacitance - 170 - pF Ciss input capacitance VGS = 0 V; VDS = 0 V; f = 1 MHz - 1460 - pF VDS = 12 V; RL = 0.5 Ω; VGS = 5 V; RG = 5.6 Ω - 13 - ns - 46 - ns td(on) turn-on delay time tr rise time td(off) turn-off delay time - 20 - ns tf fall time - 15 - ns - 0.78 1.2 V - 35 - ns - 20 - nC Source-drain diode VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 13 trr reverse recovery time Qr recovered charge IS = 20 A; dIS/dt = −100 A/µs; VGS = 0 V 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 5 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 003aaa760 80 10 8 VGS (V) = ID (A) 6 003aaa761 30 VGS (V) = 5 4.5 60 3.6 RDSon (mΩ) 4 20 4 4.5 40 3.6 5 6 8 10 3.2 20 10 2.8 2.4 0 0 0 0.2 0.4 0.6 0.8 VDS (V) 0 1 Tj = 25 °C 20 40 60 ID (A) 80 Tj = 25 °C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of drain current; typical values 003aaa762 80 ID (A) 03af18 2 a 1.5 60 25 °C Tj = 175 °C 40 1 20 0.5 0 0 2 4 VGS (V) 6 Tj = 25 °C and 175 °C; VDS > ID × RDSon 0 -60 60 120 Tj (°C) 180 R DSon a = ---------------------------R DSon ( 25 °C ) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature 9397 750 15071 Product data sheet 0 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 6 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 03aa33 2.5 VGS(th) (V) 2 1.5 03aa36 10-1 ID (A) max 10-2 typ 10-3 min max 10-4 min 1 typ 10-5 0.5 0 -60 10-6 0 60 120 Tj (°C) 180 0 1 2 VGS (V) 3 Tj = 25 °C; VDS = 5 V ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage 003aaa763 10 ID = 25 A Tj = 25 °C VGS (V) 8 VDS ID 6 12 V VDD = 19 V VGS(pl) 4 VGS(th) VGS 2 QGS1 QGS2 QGS 0 0 10 20 QG (nC) 30 QGD QG(tot) 003aaa508 ID = 25 A; VDS = 12 V and 19 V Fig 11. Gate-source voltage as a function of gate charge; typical values Fig 12. Gate charge waveform definitions 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 7 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 003aaa764 80 003aaa765 104 IS (A) C (pF) 60 103 40 Ciss 20 Coss Tj = 25 °C 175 °C 0 0 0.4 0.8 VSD (V) 1.2 Tj = 25 °C and 175 °C; VGS = 0 V 102 10-1 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 13. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 9397 750 15071 Product data sheet Crss © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 8 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 7. Package outline SOT404 Plastic single-ended surface mounted package (D2PAK); 3 leads (one lead cropped) A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-10-13 05-02-11 SOT404 Fig 15. Package outline SOT404 (D2PAK) 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 9 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 8. Revision history Table 6: Revision history Document ID Release date PHB78NQ03LT_5 20050613 Product data sheet Modifications: Data sheet Change status notice Doc. number Supersedes 2004070095 9397 750 15071 PHB_PHD78NQ03LT_4 • The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. • • • • • • Removal of PHD78NQ03LT (now in separate data sheet). • • Section 4 “Limiting values” ID, IDM, Ptot, IS, ISM and EDS(AL)S modified. Section 4 “Limiting values” Figure 2 and 3 modified. Section 5 “Thermal characteristics” Rth(j-mb) modified. Section 5 “Thermal characteristics” Figure 4 modified. Section 6 “Characteristics” RDSon, QG(tot), QGS, QGD, Ciss, Coss, Crss, td(on), tr, td(off), tf, VSD, trr, Qr condition and/or values changed. Section 6 “Characteristics” RG, QGS1, QGS2 and VGS(pl) added. Section 6 “Characteristics” Figure 5, 6, 7, 11, 12, and 13 modified. PHB_PHD78NQ03LT_4 20040726 Product data sheet - 9397 750 13432 PHP_PHB_PHD78NQ03LT_3 PHP_PHB_PHD78NQ03LT_3 20020626 Product data sheet - 9397 750 09667 PHP_PHB_PHD78NQ03LT_2 PHP_PHB_PHD78NQ03LT_2 20020322 Product data sheet - 9397 750 09418 PHP_PHB_PHD78NQ03LT_1 PHP_PHB_PHD78NQ03LT_1 20011114 Product data sheet - 9397 750 08916 - 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 10 of 12 PHB78NQ03LT Philips Semiconductors N-channel TrenchMOS logic level FET 9. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 12. Trademarks Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 11. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 13. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 15071 Product data sheet © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Rev. 05 — 13 June 2005 11 of 12 Philips Semiconductors PHB78NQ03LT N-channel TrenchMOS logic level FET 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information . . . . . . . . . . . . . . . . . . . . 11 © Koninklijke Philips Electronics N.V. 2005 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 13 June 2005 Document number: 9397 750 15071 Published in The Netherlands