TEA1833TS/1X

TEA1833LTS GreenChip SMPS control IC Rev. 1 — 31 August 2015 Product data sheet 1. General description The TEA1833LTS is a low-cost Switched Mode Power Supply (SMPS) controller IC intended for flyback topologies. The TEA1833LTS operates in peak current and frequency control mode. Frequency jitter has been implemented to reduce ElectroMagnetic Interference (EMI). Slope compensation is integrated for Continuous Conduction Mode (CCM) operation. The TEA1833LTS IC features OverPower Protection (OPP). The controller accepts an overpower situation up to 200 % for a limited amount of time. Mains undervoltage protection (brownin/brownout), output OverVoltage Protection (OVP), and OverTemperature Protection (OTP) can be implemented using a minimal number of external components. At low-power levels, the primary peak current is set to 22 % of the maximum peak current. The switching frequency is reduced to limit the switching losses. The combination of fixed frequency operation at high output power and frequency reduction at low output power provides high efficiency over the total load range. The TEA1833LTS makes the design of low-cost, highly efficient and reliable supplies easier by requiring a minimum number of external components. The device is especially suited for medium power applications. 2. Features and benefits            SMPS controller IC enabling low-cost applications Large input voltage range (10.5 V to 36 V) Integrated OverVoltage Protection (OVP) on the VCC pin Accurate OverVoltage Protection (OVP) via the ISENSE pin Dedicated burst mode, allowing a low VCC capacitor value Very low supply current during start-up and restart (11 A typical) Low supply current during normal operation (0.58 mA typical without load) Adaptive internal overpower time-out Overpower protection including high/low line compensation Fixed switching frequency with frequency jitter to reduce EMI Frequency reduction with fixed minimum peak current to maintain high efficiency at low output power levels  Peak power operation up to 200 % by frequency increase and peak current increase  Slope compensation for CCM operation TEA1833LTS NXP Semiconductors GreenChip SMPS control IC          Limitation of switching frequency at high mains to reduce the maximum drain voltage Integrated soft-start Drive capability 300 mA source, 750 mA sink Maximum duty cycle set at 90 % Mains undervoltage protection (brownin/brownout) Output Short Circuit Protection (OSCP), avoiding transformer saturation External OverTemperature Protection (OTP) IC overtemperature protection Maximum duty cycle protection and brownin/brownout protection cause a restart, all other protections are latched 3. Applications  All applications that require an efficient and cost-effective power supply solution. The TEA1833LTS is especially suited for medium power applications. 4. Ordering information Table 1. Ordering information Type number TEA1833LTS/1 TEA1833LTS Product data sheet Package Name Description Version TSOP6 plastic surface-mounted package; 6 leads SOT457 All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 2 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 5. Block diagram UHVWDUW 9&&VWDUW 6 9 9&& 9 9 EXUVW 273 5 ODWFKUHVHW 9 ODWFK  &2817 293 72 9 293DX[ RYHU ORDG PV GHOD\ PV GLVDEOH 26&3  9FWUO,SHDN P9 4 5 GULYHU GLVDEOH 26&3 0,1,080 &2817 72 EURZQRXW įPD[SURW RYHUORDG 4 VRIWVWDUW 9FWUO,SHDN 9VRIWVWDUW ,LQ &75/ &2817 72 9  $  3527(&7 FORFN 273 ODWFK SURWORZ 4 5 29(532:(5 &203(16$7,21 SURWORZ SRZHUGRZQ 6 VWRS  $1$/2* &21752/ 9&&VWDUW SURWORZ 2&3 N įPD[ 6 5 293DX[ 9VHQVH 9VHQVH UHVWDUW /(% 02'8/$7,21 6/23( &203(16$7,21 UHVWDUW %/$1. 9  įPD[SURW VHW VWRS įPD[ 26&,//$725 IUHTXHQF\UHGXFWLRQ 26&3 EXUVW 6 ,LQ 9 VHW įPD[ 9FWUO,SHDN '59 9 26&3 GULYHU 2873876+257&,5&8,7 3527(&7,21 ,6(16( 7(03(5$785( 3527(&7,21 9 9FFVLQN '5,9(5 SRZHUGRZQ  P$ *1' 9FFVLQN 5(67$57 &21752/ 4 9&&VWRS ODWFKUHVHW OLQ EURZQRXW 0$,16 '(7(&7,21 293 ODWFK ',*,7$/&21752/ DDD Fig 1. TEA1833LTS block diagram TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 3 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 6. Pinning information 6.1 Pinning 9&&   '5,9(5 ,& *1'  3527(&7   ,6(16(  &75/ DDD Fig 2. TEA1833LTS pin configuration 6.2 Pin description Table 2. TEA1833LTS Product data sheet Pin description Symbol Pin Description VCC 1 supply voltage GND 2 ground PROTECT 3 protection and mains detect input CTRL 4 control input ISENSE 5 current sense and accurate OVP input DRIVER 6 gate driver output All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 4 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 7. Functional description 7.1 General control The TEA1833LTS contains a controller for a flyback circuit. A typical configuration is shown in Figure 3. ' ' & 6 5 & 5 9&& *1' 5 3527(&7    ,&    5 ,6(16( &75/ ' & 7 '5,9(5 = 5 2 2 5 & 5 ' ' 5 DDD Fig 3. TEA1833LTS typical configuration 7.2 Start-up and UnderVoltage LockOut (UVLO) Initially, the capacitor on the VCC pin, C3, is charged from the high-voltage mains via resistor R1. As long as the voltage on the VCC pin is below Vstartup, the IC current consumption is low (11 A typical). When the voltage on the VCC pin reaches Vstartup, the IC first checks the PROTECT pin. Only when the current exceeds the brownin level (Imains(bi)) during mains detect and the voltage surpasses Vdet(PROTECT) during external OTP measurement the IC starts switching. An internal soft-start time of 3.5 ms allows the ISENSE peak voltage to increase gradually to prevent audible noise. In a typical application, the auxiliary winding of the transformer takes over the supply voltage. If a protection is triggered, the controller stops switching. Depending on the protection triggered, it either causes a restart or latches the converter to an off-state. The brownin/brownout, maximum duty cycle protections cause a safe restart. OPP, UVLO, the internal and external OVP, and the internal and external OTP latch the converter to an off-state. A restart protection disables the switching of the IC. The supply voltage of the IC drops to the UVLO level. When the UVLO level is reached, the IC switches to Power-down mode, where it consumes a low supply current (11 A typical). The VCC capacitor is recharged via R1 until the VCC start-up level is reached. The IC starts switching again. When a latched protection is triggered, the TEA1833LTS immediately enters power-down mode. The VCC pin is clamped to a voltage just above the latch protection reset voltage (Vrst(latch) + 1 V). TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 5 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC EURZQLQ EURZQLQ OHYHO 9EXV UHFWLILHG PDLQV 9VWDUWXS 9WK89/2 9FODPS9&& 9&& 3527(&7 9GHW3527(&7 9WKVHQVHRSS ,6(16( VRIWVWDUW 2XWSXW YROWDJH 233OHYHO QRPLQDOORDG 2XWSXW ORDG FKDUJLQJ9&& FDSDFLWRU Fig 4. VWDUWLQJ FRQYHUWHU QRUPDO RSHUDWLRQ 233 WLPHRXW ODWFKHGSURWHFWLRQ DDD Start-up sequence, normal operation and latched protection When the voltage on pin VCC drops below the Vth(UVLO) level during normal operation, the controller stops switching. The TEA1833LTS activates the latched protection and enters power-down mode. This mechanism avoids that during a short circuit a restart occurs when the supply voltage reaches Vth(UVLO) before the OPP time-out is reached (see Section 7.7). 7.3 Supply management All internal reference voltages are derived from a temperature compensated on-chip band gap circuit. Internal reference currents are derived from a trimmed and temperature compensated current reference circuit. 7.4 External overtemperature protection and mains detect input (pin PROTECT) The PROTECT input combines the functions of the mains voltage detection (browin/brownout) and the external OverTemperature Protection (OTP). An internal clock separates the period of measuring the mains voltage and the period of detecting external OverTemperature Protection (OTP). In a typical application, the PROTECT pin is connected to the mains via a resistor. It is connected to ground via a Negative Temperature Coefficient (NTC) thermistor and a diode. When measuring the mains voltage, the PROTECT pin is regulated to 0.25 V to prevent that the external diode conducts current. The current into the PROTECT pin is measured and stored. Once the measured current is above the brownin level, the system is allowed TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 6 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC to start switching. If the mains voltage is continuously below the brownout level for at least 32 ms, a brownout is detected. The system immediately stops switching and performs a restart. The VCC capacitor is discharged to the UVLO level and then charged to Vstartup once before switching recommences (See Figure 5). ,PDLQV GHWHFW PV PV EURZQLQ EURZQRXW '5,9(5 3527(&7 9VWDUWXS 9&& 9WK89/2 DDD Fig 5. Mains detection When detecting the external temperature, a current of 200 A (typical) out of the PROTECT pin flows through the external capacitor and the NTC thermistor. If the PROTECT voltage at the end of the measuring period is below Vdet(PROTECT) for four consecutive measuring cycles, the IC detects overtemperature. It activates a latched protection. The offset due to the current from the mains is canceled internally by remembering the sinking current Iin when measuring the mains voltage (See Figure 6). The stored current is also used as the input of high/low line compensation and for the maximum switching frequency limitation. 9GHW3527(&7 93527(&7 9FODPS3527(&7 OLQ $ O3527(&7 OLQ,23527(&7 ODWFKHG SURWHFWLRQ Fig 6. DDD External overtemperature protection An internal clamp of 4.1 V (typical) protects this pin from excessive voltages. TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 7 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 7.5 Duty cycle control (pin CTRL) Pin CTRL regulates the output power of the converter. This pin is connected to an internal voltage source of 5.4 V via an internal resistor (typical resistance: 26 k). The CTRL pin voltage sets the peak current which is measured using the ISENSE pin (see Section 7.8). At low output power, the switching frequency is reduced (see Section 7.12). The maximum duty cycle is limited to 90 % (typical). After eight consecutive converter strokes at maximum duty cycle, the restart protection is activated. In a restart, the VCC capacitor is quickly discharged to the Vth(UVLO) level and recharged to the start-up level from the high-voltage mains, before switching recommences. 7.6 Slope compensation (pin CTRL) A slope compensation circuit is integrated for CCM. The slope compensation ensures stable operation for duty cycles exceeding 50 %. 7.7 Overpower timer A temporary overload situation is allowed. If Vsense (see Figure 1) set by pin CTRL exceeds 400 mV, an internal timer is started. If the overload situation continues to exist for more than 160 ms (typical), an OverPower Protection (OPP) is triggered (see Figure 7). RXWSXWORDG RXWSXWYROWDJH P9 9,6(16( WLPHRXWOHYHO LQWHUQDOWLPHU KLJKORDG QRUPDO ORDG KLJKORDG SURWHFWLRQ DDD Fig 7. Overpower delay The TEA1833LTS activates the latched protection and enters power-down mode. To prevent a restart when during a short circuit of the output VCC drops to below Vth(UVLO) earlier than the OPP time-out is reached, this protection is also latched (see Section 7.2). 7.8 Current mode control (pin ISENSE) Current mode control is used because it ensures a good line regulation. Pin ISENSE senses the primary current across external resistor R6 and compares it with an internal control voltage. The internal control voltage is proportional to the CTRL pin voltage (see Figure 8). TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 8 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC DDD  9FWUO,SHDN         Fig 8.         9&75/9 Peak current control Leading-edge blanking prevents false triggering due to capacitive discharge when switching on the external power switch (see Figure 9). tleb Vsense(max) VISENSE t 014aaa932 Fig 9. Leading-edge blanking 7.9 Overvoltage protection (pin ISENSE) Accurate overvoltage protection can be realized at the ISENSE pin by sensing the auxiliary voltage. During the primary stroke, diode D4 (see Figure 3) is blocked so that the converter still works under current mode control. During the secondary stroke, the ISENSE voltage represents the output voltage via the resistor divider R5 and R3 (see Figure 3). The ISENSE voltage is sampled 2 s after the gate signal drops to avoid the ringing of the transformer. If the sampled voltage exceeds Vovp(ISENSE) for four consecutive switching cycles, the IC triggers the latched protection. 7.10 Overvoltage protection (pin VCC) An OverVoltage Protection (OVP) circuit is connected to the VCC pin. When the VCC exceeds Vth(OVP) (36 V typical) for four consecutive switching cycles, the IC triggers the latched protection. When VCC drops below Vth(OVP) before count = 4 is reached, the counter is reset to zero. 7.11 Output Short Circuit Protection (OSCP) A flyback controller operating in CCM at a fixed frequency turns on the primary MOSFET after a predefined period (see Figure 10). The minimum on-time equals the blanking time. If after the blanking time the measured peak current (VISENSE) is higher than the Ipeak regulation level, the driver is switched off. TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 9 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC RXWSXWYROWDJH VHFRQGDU\ FXUUHQWVFDOHG WRSULPDU\VLGH SULPDU\ FXUUHQW WVHF ,UHJ ,WUDIR GULYHU WSHU WRQ WEODQN DDD Fig 10. Peak current runaway The output voltage can drop, for instance, because a load is too high or a short circuit event occurs. If the output voltage drops, the decrease of the transformer current during the secondary stroke time (tsec) becomes less. As a result, the next cycle starts at a higher peak current. Also, at the next cycle, the minimum on-time equals the blanking time. During this blanking time, the peak current can increase to above the targeted regulation level. If the transformer current does not decrease sufficiently during the secondary stroke, the peak current can continuously increase to such a level that the transformer saturates (see Figure 10). To avoid this continuous peak current increase, also called runaway, the IC features a special protection (see Figure 11). RXWSXWYROWDJH SULPDU\ FXUUHQW VHFRQGDU\ FXUUHQWVFDOHG WRSULPDU\VLGH ,UHJ ,WUDIR GULYHU WSHU DDD Fig 11. OSCP peak current runaway If the system detects that the peak current already exceeds the targeted level after 1 s, the next switching period time is extended from 7.7 s (fsw = 130 kHz) to 28 s (fsw = 36 kHz). The time of the secondary stroke is then sufficient to decrease the transformer current to below the targeted peak current again. TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 10 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC To avoid activation at low loads, the OSCP is only enabled when the overpower timer is active. Additionally, to avoid activation during peak power, Vout must be below half the OVP level. The Vout level is measured on the ISENSE pin in a similar way the overvoltage protection is measured. To limit the input power during a short circuit or an overload event, the OPP time is reduced to 50 % when OSCP is enabled. 7.12 Peak power, high-power medium power, and low-power operation During high-power operation, with the converter running at a 65 kHz (typical) fixed frequency, the power is controlled by varying the peak current. A peak power mode is implemented to supply a short overload situation. In peak power mode, both frequency and peak current are increased. In medium power operation, lowering the switching frequency to 25 kHz reduces the switching losses. In low-power operation, lowering of the switching frequency to below 25 kHz further reduces switching losses. The switching frequency of the converter is reduced while the peak current is set to 22 % of the maximum peak current (see Figure 8 and Figure 12).  IVZLWFK N+]  /RZLQSXW YROWDJH   +LJKLQSXWYROWDJH  3HDNSRZHU  +LJK SRZHU  0HGLXP SRZHU      /RZSRZHU     9&75/9 DDD Fig 12. Frequency control TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 11 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 7.13 Overpower or high/low line compensation The overpower compensation function can be used to realize a maximum output power which is nearly constant over the full input mains. The overpower compensation circuit measures the mains detect input current on the PROTECT pin and outputs a proportionally dependent current on the ISENSE pin. The DC voltage across resistor R3 (see Figure 3) limits the maximum peak current on the current sense resistor (see Figure 13). At low output power levels, the overpower compensation circuit is switched off. ORSF,6(16( —$    ,3527(&7—$ DDD Fig 13. Overpower compensation 7.14 Burst mode If the CTRL voltage (VCTRL) is < 1.45 V, the system is not switching. It waits until the VCTRL exceeds this minimum level before starting the next cycle. During this period, the TEA1833LTS discharges the primary VCC capacitor. If the voltage on the VCC pin then drops to below the burst threshold level (Vth(burst)), the system asserts two DRIVER pulses to recharge the VCC capacitor. The assertion avoids that the voltage on the VCC pin drops to below the UVLO level during a large off-time. Worst off-time occurs when there is a load transient from peak load to no-load. The output voltage shows an overshoot and stops switching until the output voltage drops to below the regulation level while there is no-load at the output. For minimum no-load input power, the chosen value of the external capacitor at the VCC pin must be high enough to prevent that the voltage on the VCC pin drops below the burst threshold level at continuous no-load operation. The burst mode is only intended to assist at load changes until the output voltage drops to below the regulation level while there is no-load at the output. TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 12 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 7.15 Limitation of the maximum switching frequency At high mains, the maximum switching frequency is limited (see Figure 14). The 130 kHz switching frequency is required at low mains only. At high mains, the high switching frequency during peak power causes an unnecessary high voltage on the drain of the MOSFET, because the high switching frequency increases the clamp voltage.  IRVFN+] DWSHDNSRZHU    ,SURW—$ DDD Fig 14. Switching frequency limitation 7.16 Driver (pin DRIVER) The driver circuit to the gate of the power MOSFET has a current sourcing capability of typically 300 mA and a current sink capability of typically 750 mA. These capabilities enable a fast turn-on and turn-off of the power MOSFET for efficient operation. 7.17 OverTemperature Protection (OTP) If the junction temperature exceeds the thermal shutdown limit, integrated overtemperature protection ensures that the IC stops switching. OTP is a latched protection. It can be reset by removing the voltage on pin VCC. TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 13 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 8. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit 0.4 +40 V 0.4 +5 V 0.4 +5.5 V Voltages VCC supply voltage VPROTECT voltage on pin PROTECT VCTRL voltage on pin CTRL VISENSE voltage on pin ISENSE current limited to 2 mA 0.7 +5 V current on pin VCC  < 10 % - 0.4 A 1 +1 mA current limited Currents IVCC II(PROTECT) input current on pin PROTECT ICTRL current on pin CTRL 3 0 mA IISENSE current on pin ISENSE 10 +0.5 mA IDRIVER current on pin DRIVER  < 10 % 0.4 +1 A Ptot total power dissipation Tamb < 75 C - 0.29 W Tstg storage temperature 55 +150 C Tj junction temperature 40 +150 C 2500 +2500 V 750 +750 V General ESD VESD electrostatic discharge voltage Human Body Model (HBM) JEDEC class 2; all pin Charged Device Model (CDM) JEDEC class 3; all pins 9. Thermal characteristics Table 4. TEA1833LTS Product data sheet Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-a) thermal resistance from junction to ambient in free air; single layer JEDEC test board 259 K/W Rth(j-c) thermal resistance from junction to case in free air; JEDEC test board 152 K/W All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 14 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 10. Characteristics Table 5. Characteristics Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supply voltage management (pin VCC) Vstartup start-up voltage 20 22 24 V Vth(UVLO) undervoltage lockout threshold voltage 9.4 10.5 11.6 V Vhys hysteresis voltage Vth(burst) burst mode threshold voltage Vth(burst-UVLO) burst mode to UVLO threshold voltage difference Vrst(latch) Vclamp(VCC) Vstartup - Vth(UVLO) 8.5 11.5 14.5 V - 11.1 - V 0.5 0.6 0.7 V latched reset voltage 3.5 4.5 5.5 V clamp voltage on pin latched protection mode; VCC ICC = 15 A Vrst(latch) + 1 - - V latched protection mode; ICC = 500 A - - Vrst(latch) + 4 V Vth(burst) > Vth(UVLO) [1] ICC(startup) start-up supply current VCC < Vstartup 6 11 16 A ICC(oper) operating supply current no-load on pin DRIVER;  = 2 %; excluding opto current - 0.58 - mA no-load on pin DRIVER;  = 25 %, excluding opto current - 0.62 - mA 1 2.5 - mA 1.95 2 2.05 V 212.5 200 187.5 A 205 260 315 mV 3.5 4.1 4.7 V ICC(restart) restart supply current Protection input (pin PROTECT) II(PROTECT) = 200 A Vdet(PROTECT) detection voltage on pin PROTECT IO(PROTECT) output current on pin VPROTECT = Vdet(PROTECT) PROTECT Vclamp(PROTECT) clamp voltage on pin II(PROTECT) = 6 A; PROTECT mains detect period; Cmax(PROTECT) = 10 pF II(PROTECT)  200 A; OTP measurement period [2] Mains detect (pin PROTECT) Imains(bi) mains brownin current 5.28 5.7 6.12 A Imains(bo) mains brownout current 4.63 5.0 5.37 A TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 15 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC Table 5. Characteristics …continued Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit for minimum flyback peak current 1.3 1.6 1.9 V for maximum flyback peak current 3.4 3.9 4.3 V Peak current control (pin CTRL) VCTRL voltage on pin CTRL Rint(CTRL) internal resistance on pin CTRL 20 26 32 k IO(CTRL) output current on pin VCTRL = 1.4 V CTRL VCTRL = 3.7 V 183 138 93 A 67.5 50 32.5 A OSCP 30 38 46 kHz peak power 118 130 142 kHz high power 60.5 65 69.5 kHz Pulse width modulator fosc oscillator frequency medium power 21 26 31 kHz 195 260 325 Hz 3 4 5 kHz maximum duty cycle 86 90 94 % Ncy(sw)max number of switching to trigger maximum duty cycles with maximum cycle protection duty cycle 7 - 8 VCTRL voltage on pin CTRL for zero duty cycle 1.15 1.45 1.75 V for start of frequency reduction from medium to low power 1.4 1.6 1.8 V for end of frequency reduction from high to medium power mode 1.6 1.8 2.0 V for start of frequency reduction from high to medium power mode 1.9 2.15 2.40 V for start of frequency increase from high to peak power mode 3.55 3.8 4.05 V for maximum frequency (peak power mode); at low mains; Iprot < 8.5 A 4.45 4.75 5.05 V 160 180 200 ms 0.555 0.590 0.625 V fmod modulation frequency fmod modulation frequency variation max high power Overpower protection tto(opp) overpower protection time-out time Current sense and overpower compensation (pin ISENSE) Vsense(max) maximum sense voltage TEA1833LTS Product data sheet V/t = 0 V/s All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 16 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC Table 5. Characteristics …continued Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Parameter tPD(sense) Conditions Min Typ Max Unit sense propagation delay 130 155 180 ns Vth(sense)opp overpower protection sense threshold voltage 380 410 440 mV VISENSE/t slope compensation voltage on pin ISENSE - 20 - mV/s tleb leading edge blanking time 275 325 375 ns Iopc(ISENSE) overpower compensation current on pin ISENSE IPROTECT = 10 A; Vctrl(Ipeak) > 400 mV 1.5 2 2.5 A IPROTECT = 18 A; Vctrl(Ipeak) > 400 mV 5.5 6 6.5 A 2.7 3.5 4.2 ms high-power mode Soft start (pin ISENSE) tstart(soft) soft start time Driver (pin DRIVER) Isource(DRIVER) source current on pin VDRIVER = 2 V DRIVER - 0.3 0.25 A Isink(DRIVER) sink current on pin DRIVER VDRIVER = 2 V 0.25 0.3 - A VDRIVER = 10 V 0.6 0.75 - A 9 10.5 12 V VO(DRIVER)max maximum output voltage on pin DRIVER Overvoltage protection (pins VCC and ISENSE) Vovp(VCC) overvoltage protection voltage on pin VCC 34.8 36 37.2 V Vovp(ISENSE) overvoltage protection voltage on pin ISENSE 2.4 2.5 2.6 V tblank(ovp)ISENSE overvoltage protection blanking time on pin ISENSE 1.7 2.1 2.5 s Ncy(ovp) number of overvoltage protection cycles 4 4 4 1.2 1.25 1.3 Output short circuit protection Vdis(oscp)ISENSE output short circuit protection disable voltage on pin ISENSE TEA1833LTS Product data sheet OSCP is disabled when VISENSE exceeds Vdis(oscp)ISENSE All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 V © NXP Semiconductors N.V. 2015. All rights reserved. 17 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC Table 5. Characteristics …continued Tamb = 25 C; VCC = 20 V; all voltages are measured with respect to ground (pin 2); currents are positive when flowing into the IC; unless otherwise specified. Symbol Parameter tto(oscp) output short circuit protection time-out time Conditions Min Typ Max Unit 11 14 17 ms 130 140 150 C Temperature protection Tpl(IC) IC protection level temperature [1] Guaranteed by design. [2] The clamp voltage on the PROTECT pin is lowered when the IC is in Power-down mode. (latched or restart protection). [3] The Output Short Circuit Protection (OSCP) is only enabled when the voltage level on the ISENSE pin during the secondary stroke is below Vdis(oscp)ISENSE level (half the Vovp(ISENSE) level). When enabled, the OSCP becomes active when the Vsense level exceeds Vth(sense)opp and the Vsense level is reached within 1 s (cycle-by-cycle). The switching period is then stretched to 28 s (36 kHz, fosc OSCP). TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 18 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 11. Application information A power supply with the TEA1833LTS is a flyback converter which operates in both Discontinuous Conduction Mode (DCM) and Continuous Conduction Mode (CCM). Which mode depends on the input voltage and output power. Resistor R1 charges the small buffer capacitor C3 at start-up. The auxiliary winding takes over during normal operation. The driver pin switches the MOSFET. Resistor R4 is added to protect the driver against switching spikes due to parasitics (inductance and capacitance of tracks, MOSFET, and transformer). Resistor R6 converts the MOSFET current to a voltage. It is measured on the ISENSE pin. The R6 value determines the maximum primary peak current through the MOSFET. The measured peak current is compensated for the mains input voltage using a current through resistor R3 that is proportional to the bus voltage of capacitor C1. During the secondary stroke, the auxiliary voltage is measured using diode D4 and resistors R5, R3, and R6. The measured value can be used for an overvoltage protection for the output voltage. Place capacitor C2 close to the CTRL pin to suppress noise. The PROTECT pin cycles between mains voltage detect and external overtemperature measurement. During mains voltage detection, the current through resistor R8 is measured. This current relates to the voltage on capacitor C1 and the input voltage. The current is used to realize brownin, brownout, and input voltage compensation for the overpower protection. During overtemperature protection, a current is sourced from the pin. The voltage over diode D5 and NTC resistor R2 is measured. A fixed comparator level detects when the NTC value drops too much. To avoid pickup of disturbance, place both resistor R8 and diode D5/resistor R2 as close as possible to the pin. ' & —) ' 6 5 5 0ȍ 9&& *1' 5 0ȍ 3527(&7    ,&    '5,9(5 & —) = Nȍ &75/ 2 & Q) 5 Nȍ 7 5 ,6(16( ' & ȍ 5 Nȍ 2 5 ȍ ' ' 5 ȍ DDD Fig 15. TEA1833LTS application diagram TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 19 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 12. Package outline 3ODVWLFVXUIDFHPRXQWHGSDFNDJH7623OHDGV ' 627 % $ ( \ +(  ; Y 0 $   4 SLQ LQGH[ $ $ F    /S H ES Z 0 % GHWDLO;   PP VFDOH ',0(16,216PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ $ ES F ' ( H +( /S 4 Y Z \ PP                       287/,1( 9(56,21 5()(5(1&(6 ,(& -('(& -(,7$  6& 627 (8523($1 352-(&7,21 ,668('$7(   Fig 16. Package outline SOT457 (TSOP6) TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 20 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 13. Revision history Table 6. Revision history Document ID Release date Data sheet status Change notice Supersedes TEA1833LTS v.1 20150831 Product data sheet - - TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 21 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 14.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. TEA1833LTS Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 22 of 24 TEA1833LTS NXP Semiconductors GreenChip SMPS control IC Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. GreenChip — is a trademark of NXP Semiconductors N.V. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TEA1833LTS Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 31 August 2015 © NXP Semiconductors N.V. 2015. All rights reserved. 23 of 24 NXP Semiconductors TEA1833LTS GreenChip SMPS control IC 16. Contents 1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 7.12 7.13 7.14 7.15 7.16 7.17 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 General control . . . . . . . . . . . . . . . . . . . . . . . . . 5 Start-up and UnderVoltage LockOut (UVLO) . . 5 Supply management. . . . . . . . . . . . . . . . . . . . . 6 External overtemperature protection and mains detect input (pin PROTECT) . . . . . . 6 Duty cycle control (pin CTRL). . . . . . . . . . . . . . 8 Slope compensation (pin CTRL). . . . . . . . . . . . 8 Overpower timer . . . . . . . . . . . . . . . . . . . . . . . . 8 Current mode control (pin ISENSE) . . . . . . . . . 8 Overvoltage protection (pin ISENSE) . . . . . . . . 9 Overvoltage protection (pin VCC). . . . . . . . . . . 9 Output Short Circuit Protection (OSCP) . . . . . . 9 Peak power, high-power medium power, and low-power operation . . . . . . . . . . . . . . . . 11 Overpower or high/low line compensation . . . 12 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Limitation of the maximum switching frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Driver (pin DRIVER) . . . . . . . . . . . . . . . . . . . . 13 OverTemperature Protection (OTP) . . . . . . . . 13 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 14 Thermal characteristics . . . . . . . . . . . . . . . . . 14 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application information. . . . . . . . . . . . . . . . . . 19 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21 Legal information. . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information. . . . . . . . . . . . . . . . . . . . . 23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 31 August 2015 Document identifier: TEA1833LTS