Revised February 2005
74AC32 • 74ACT32
Quad 2-Input OR Gate
General Description
Features
The AC/ACT32 contains four, 2-input OR gates.
■ ICC reduced by 50% on 74AC only
■ Outputs source/sink 24 mA
■ ACT32 has TTL-compatible inputs
Ordering Code:
Order Number
Package
Package Description
Number
74AC32SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC32SCX_NL
(Note 1)
M14A
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
M14D
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC32SJ
74AC32MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC32PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74AC32PC_NL
(Note 1)
N14A
Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT32SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT32SCX_NL
(Note 1)
M14A
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ACT32MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT32MTCX_NL
(Note 1)
MTC14
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT32PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
An, Bn
Inputs
On
Outputs
FACT¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009919
www.fairchildsemi.com
74AC32 • 74ACT32 Quad 2-Input OR Gate
November 1988
74AC32 • 74ACT32
Absolute Maximum Ratings(Note 2)
Recommended Operating
Conditions
0.5V to 7.0V
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI
VI
0.5V
VCC 0.5V
Supply Voltage (VCC)
20 mA
20 mA
0.5V to VCC 0.5V
DC Input Voltage (VI)
VO
0.5V
VCC 0.5V
DC Output Voltage (VO)
AC Devices
VIN from 30% to 70% of VCC
VCC @ 3.3V, 4.5V, 5.5V
125 mV/ns
Minimum Input Edge Rate ('V/'t)
DC VCC or Ground Current
r50 mA
65qC to 150qC
ACT Devices
VIN from 0.8V to 2.0V
Junction Temperature (TJ)
VCC @ 4.5V, 5.5V
140qC
PDIP
0V to VCC
40qC to 85qC
Minimum Input Edge Rate ('V/'t)
r50 mA
per Output Pin (ICC or IGND)
0V to VCC
Operating Temperature (TA)
DC Output Source
Storage Temperature (TSTG)
4.5V to 5.5V
Output Voltage (VO)
20 mA
20 mA
0.5V to VCC 0.5V
or Sink Current (IO)
2.0V to 6.0V
ACT
Input Voltage (VI)
DC Output Diode Current (IOK)
VO
AC
125 mV/ns
Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its
power supply, temperature, and output/input loading variables. Fairchild
does not recommend operation of FACT¥ circuits outside databook specifications.
DC Electrical Characteristics for AC
Symbol
VIH
VIL
VOH
VOL
Parameter
VCC
TA
(V)
Typ
25qC
TA
40qC to 85qC
Minimum HIGH Level
3.0
1.5
2.1
2.1
Input Voltage
4.5
2.25
3.15
3.15
5.5
2.75
3.85
3.85
Maximum LOW Level
3.0
1.5
0.9
0.9
Input Voltage
4.5
2.25
1.35
1.35
5.5
2.75
1.65
1.65
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
5.5
5.49
5.4
5.4
3.0
2.56
2.46
4.5
3.86
3.76
5.5
4.86
4.76
0.1
0.1
Maximum LOW Level
Output Voltage
3.0
Units
Conditions
Guaranteed Limits
0.002
4.5
0.001
0.1
0.1
5.5
0.001
0.1
0.1
3.0
0.36
0.44
4.5
0.36
0.44
5.5
0.36
0.44
r 0.1
VOUT
0.1V
V
or VCC 0.1V
V
or VCC 0.1V
V
IOUT
VOUT
V
V
0.1V
50 PA
VIN
VIL or V IH
IOH
12 mA
IOH
24 mA
IOH
24 mA (Note 3)
50 PA
IOUT
VIN
VIL or V IH
IOL
12 mA
V
IOL 24 mA
r 1.0
PA
VI
IOL
24 mA (Note 3)
IIN (Note 5)
Maximum Input Leakage Current
5.5
IOLD
Minimum Dynamic
5.5
75
mA
VOLD
IOHD
Output Current (Note 4)
5.5
75
mA
VOHD
ICC (Note 5) Maximum Quiescent Supply Current
5.5
20.0
PA
VIN
2.0
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
www.fairchildsemi.com
2
VCC, GND
1.65V Max
3.85V Min
VCC or GND
74AC32 • 74ACT32
DC Electrical Characteristics for ACT
VIH
VIL
VOH
VOL
25qC
TA
(V)
Typ
Minimum HIGH Level
4.5
1.5
Input Voltage
5.5
1.5
2.0
2.0
Maximum LOW Level
4.5
1.5
0.8
0.8
Input Voltage
5.5
1.5
0.8
0.8
Minimum HIGH Level
4.5
4.49
4.4
4.4
Output Voltage
5.5
5.49
5.4
5.4
4.5
3.86
3.76
5.5
4.86
Parameter
Guaranteed Limits
2.0
2.0
V
or VCC 0.1V
0.1V
or VCC 0.1V
V
IOUT
50 PA
VIL or VIH
24 mA
4.76
IOH
24 mA (Note 6)
IOUT
0.001
0.1
0.1
Output Voltage
5.5
0.001
0.1
0.1
0.36
0.44
Maximum
0.1V
VOUT
V
V
V
V
50 PA
VIN
VIL or VIH
IOL
24 mA
5.5
0.36
0.44
IOL
5.5
r0.1
r1.0
VI
VCC, GND
VI
VCC 2.1V
PA
Leakage Current
ICCT
Conditions
VOUT
VIN
4.5
Maximum Input
Units
IOH
Maximum LOW Level
4.5
IIN
TA
40qC to 85qC
VCC
Symbol
5.5
0.6
1.5
mA
ICC/Input
24 mA (Note 6)
IOLD
Minimum Dynamic
5.5
75
mA
VOLD
IOHD
Output Current (Note 7)
5.5
75
mA
VOHD
ICC
Maximum Quiescent
5.5
4.0
40.0
VIN
PA
Supply Current
1.65V Max
3.85V Min
VCC
or GND
Note 6: All outputs loaded; thresholds on input associated with output under test.
Note 7: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Symbol
Parameter
Propagation Delay
tPLH
Propagation Delay
tPHL
VCC
TA
25qC
(V)
CL
50 pF
40qC to 85qC
TA
CL
50 pF
(Note 8)
Min
Typ
Max
Min
Max
3.3
1.5
7.0
9.0
1.5
10.0
5.0
1.5
5.5
7.5
1.0
8.5
3.3
1.5
7.0
8.5
1.0
9.0
5.0
1.5
5.0
7.0
1.0
7.5
Units
ns
ns
Note 8: Voltage Range 3.3 is 3.3V r 0.3V
Voltage Range 5.0 is 5.0V r 0.5V
AC Electrical Characteristics for ACT
Symbol
Parameter
VCC
TA
25qC
(V)
CL
50 pF
40qC to 85qC
TA
CL
50 pF
(Note 9)
Min
Typ
Max
Min
Max
Units
tPLH
Propagation Delay
5.0
1.0
6.5
9.0
1.0
10.0
ns
tPHL
Propagation Delay
5.0
1.0
6.5
9.0
1.0
10.0
ns
Note 9: Voltage Range 5.0 is 5.0V r 0.3V
Capacitance
Typ
Units
CIN
Symbol
Input Capacitance
Parameter
4.5
pF
VCC
OPEN
CPD
Power Dissipation Capacitance
20.0
pF
VCC
5.0V
3
Conditions
www.fairchildsemi.com
74AC32 • 74ACT32
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
www.fairchildsemi.com
4
74AC32 • 74ACT32
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
5
www.fairchildsemi.com
74AC32 • 74ACT32
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
www.fairchildsemi.com
6
74AC32 • 74ACT32 Quad 2-Input OR Gate
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
7
www.fairchildsemi.com