74F579SC

Revised October 2000 74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs General Description Features The 74F579 is a fully synchronous 8-stage up/down counter with multiplexed 3-STATE I/O ports for bus-oriented applications. It features a preset capability for programmable operation, carry lookahead for easy cascading and a U/D input to control the direction of counting. All state changes, whether in counting or parallel loading, are initiated by the rising edge of the clock. ■ Multiplexed 3-STATE I/O ports ■ Built-in lookahead carry capability ■ Count frequency 100 MHz typical ■ Supply current 75 mA typical ■ Guaranteed 4000V minimum ESD protection Ordering Code: Order Number Package Number Package Description 74F579SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74F579SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F579PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” tot he ordering code. Logic Symbol © 2000 Fairchild Semiconductor Corporation Connection Diagram DS009568 www.fairchildsemi.com 74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs April 1988 74F579 Unit Loading/Fan Out Pin Names Description I/O0–I/O7 U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL 3.5/0.333 70 µA/−0.2 mA Data Inputs or 75/15 −3 mA/24 mA 0.25/0.333 5 µA/−0.2 mA 3-STATE Outputs PE Parallel Enable Input (Active LOW) U/D Up-Down Count Control Input 0.25/0.333 5 µA/−0.2 mA MR Master Reset Input (Active LOW) 0.25/0.333 5 µA/−0.2 mA SR Synchronous Reset Input (Active LOW) 0.25/0.333 5 µA/−0.2 mA CEP Count Enable Parallel Input (Active LOW) 0.25/0.333 5 µA/−0.2 mA CET Count Enable Trickle Input (Active LOW) 0.25/0.333 5 µA/−0.2 mA CS Chip Select Input Active (Active LOW) 0.25/0.333 5 µA/−0.2 mA OE Output Enable Input (Active LOW) 0.25/0.333 5 µA/−0.2 mA CP Clock Pulse Input (Active Rising Edge) 0.25/0.333 5 µA/−0.2 mA TC Terminal Count Output (Active LOW) 25/12.5 −1 mA/5 mA Function Table MR SR CS PE CEP CET U/D X X H X X X X X L H X X X X L H X X L X X X X X H L X X X X OE CP X X X X H X I/Oa to I/Oh in High Z X L X Flip-Flop Outputs Appear on I/O Lines X X X X       H H L L X X X X H H (Not LL) H X X X H H (Not LL) X H X X H H (Not LL) L L H X H H (Not LL) L L L X X H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW to HIGH Clock Transition Not LL = CS and PE should never both be LOW voltage level at the same time.  www.fairchildsemi.com 2 Function I/Oa to I/Oh in High Z (PE Disabled) Asynchronous Reset for all Flip-Flops Synchronous Reset for all Flip-Flops Parallel Load all Flip-Flops Hold Hold (TC Held HIGH) Count Up Count Down 74F579 Logic Diagrams Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. VCC = Pin 16 GND = Pin 6 () = Pin Numbers Detail A 3 www.fairchildsemi.com 74F579 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Storage Temperature −65°C to +150 °C Ambient Temperature under Bias −55°C to +125 °C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150 °C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max VCC VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min IIN = −18 mA VOH Output HIGH V Min IOH = −3 mA V Min 5.0 µA Max VIN = 2.7V (Non-I/O Pins) 7.0 µA Max VIN = 7.0V (Non-I/O Pins) 0.5 mA Max VIN = 5.5V (I/On) 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 VOL Output LOW Voltage IIH 10% VCC 2.4 5% VCC 2.7 V Conditions Input HIGH Voltage Voltage 2.0 Units VIH 10% VCC 0.5 5% VCC 0.5 Input HIGH Current IBVI Input HIGH Current Breakdown Test IBVIT Input HIGH Current Breakdown (I/O) ICEX Output HIGH Leakage Current VID Input Leakage Test IOD 4.75 Output Leakage Circuit Control Recognized as a HIGH Signal Recognized as a LOW Signal IOL = 20 mA (TC), IOL = 24 mA (I/On) IOL = 20 mA (TC), IOL = 24 mA (I/On) IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded IZZ Bus Drainage Test 500 µA 0.0 VOUT = 5.25V IIL Input LOW Current −0.2 mA Max VIN = 0.5V (Non-I/O Pins) IIH & IOZH Output Leakage Current 70 µA Max VOUT = 2.7V (I/On) IIL & IOZL Output Leakage Current −200 µA Max VOUT = 0.5V (I/On) IOS Output Short-Circuit Current −150 mA Max VOUT = 0V ICCH Power Supply Current 70 110 mA Max VO = HIGH ICCL Power Supply Current 85 120 mA Max VO = LOW ICCZ Power Supply Current 85 125 mA Max VO = HIGH Z www.fairchildsemi.com −60 4 74F579 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ fMAX Maximum Clock Frequency 70 85 Max Min Units Max 80 tPLH Propagation Delay 3.0 5.0 7.5 3.0 8.0 tPHL CP to I/On 5.0 8.0 11.5 5.0 11.5 tPLH Propagation Delay 5.0 7.5 11.5 5.0 12.0 tPHL CP to TC 5.0 7.0 11.5 5.0 12.0 tPLH Propagation Delay 4.5 7.0 9.0 4.5 10.0 tPHL U/D to TC 4.5 8.0 9.5 4.5 10.0 tPLH Propagation Delay 2.5 3.8 6.0 2.5 6.5 tPHL CEP or CET to TC 3.5 6.0 8.0 3.5 8.5 tPHL Propagation Delay 5.0 7.5 10.0 5.0 10.0 ns 6.5 10.0 13.0 6.5 13.5 ns 3.0 5.0 8.5 3.0 9.0 MR to I/On tPHL Propagation Delay MR to TC tPZH Output Enable Time tPZL CS or PE to I/O 5.5 8.0 10.5 5.5 11.5 tPHZ Output Disable Time 2.0 5.0 8.5 2.0 9.0 tPLZ CS or PE to I/O 2.0 4.5 8.0 2.0 8.5 tPZH Output Enable Time 3.0 5.0 8.0 3.0 8.5 tPZL OE to I/On 5.0 8.0 11.0 5.0 12.0 tPHZ Output Disable Time 2.0 4.0 6.5 2.0 6.5 tPLZ OE to I/On 2.0 4.0 6.0 2.0 6.5 ns ns ns ns ns ns ns ns AC Operating Requirements TA = +25°C Symbol TA = 0°C to +70°C VCC = +5.0V Parameter Min Typ VCC = +5.0V Max Min tS(H) Setup Time 4.0 4.0 tS(L) I/On to CP 4.0 4.0 tH(H) Hold Time 0.0 0.0 tH(L) I/On to CP 0.0 0.0 tS(H) Setup Time 9.5 9.5 tS(L) PE, CS or SR to CP 9.5 9.5 tH(H) Hold Time 0.0 0.0 tH(L) PE, CS or SR to CP 0.0 0.0 tS(H) Setup Time 6.5 6.5 tS(L) CET or CEP to CP 9.5 9.5 tH(H) Hold Time 0.0 0.0 tH(L) CET or CEP to CP 0.0 0.0 tS(H) Setup Time 9.0 9.5 tS(L) U/D to CP 9.0 9.5 Units Max ns ns ns ns ns ns ns tH(H) Hold Time 0.0 0.0 tH(L) U/D to CP 0.0 0.0 tW(H) Clock Pulse Width 4.5 4.5 tW(L) HIGH or LOW 4.5 4.5 tW(L) MR Pulse Width 3.0 3.0 ns tREC Recovery Time 4.0 4.0 ns MR to CP 5 ns ns www.fairchildsemi.com 74F579 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B www.fairchildsemi.com 6 74F579 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 7 www.fairchildsemi.com 74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8