CAT1832L-G

CAT1232LP, CAT1832 5 V and 3.3 V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets FEATURES Selectable reset voltage tolerance — CAT1232LP for 5 V supply — CAT1832 for 3.3 V supply Selectable watchdog period: 150 ms, 600 ms or 1.2 s Two reset outputs — Active high, push-pull reset output — Active low, open-drain reset output (CAT1232LP) — Active low, push-pull reset output (CAT1832) Debounced manual push-button reset Compact SOIC and MSOP packages For Ordering Information details, see page 11. DESCRIPTION The CAT1232LP and CAT1832 microprocessor supervisors can halt and restart a “hung-up” or “stalled” microprocessor, restart a microprocessor after a power failure, and debounce a manual/pushbutton microprocessor reset switch. The devices are drop in replacements for the Maxim/Dallas Semiconductor DS1232LP and DS1832 supervisors Precision reference and comparator circuits monitor the 5 V or 3.3 V system power supply voltage, VCC. During power-up or when the power supply falls outside selectable tolerance limits, both the RESET ¯¯¯¯¯¯ and RESET become active. After the power supply voltage rises above the RESET threshold voltage, the reset signals remain active for a minimum of 250ms, allowing the power supply and system processor to stabilize. The trip-point tolerance input, TOL, selects the trip level tolerance to be either 5% or 10% for the CAT1232LP 5 V supply and 10% or 20% for the CAT1832 3.3 V supply. Each device has a push-pull, active HIGH reset output. The CAT1232LP also has an open drain, active LOW reset output while the CAT1832 also has a push-pull, active LOW reset output. A debounced manual reset input activates the reset outputs and holds them active for a minimum period of 250 ms after being released. Also included is a watchdog timer to reset a microprocessor that has stopped due to a software or hardware failure. Three watchdog time-out periods are ¯¯ selectable: 150 ms, 600 ms and 1.2 s. If the ST input is not strobed low before the watchdog time out period expires, the reset signals become active for a minimum of 250 ms. APPLICATIONS Microprocessor Systems Portable Equipment Controllers Single Board Computers Instrumentations Telecommunications FUNCTIONAL DIAGRAM VCC TOL VCC Reference 40kΩ PBRST TD ST Push Button Debounce Watchdog Timebase Selection Watchdog Transition Detector – Tolerance Selection + RESET (CAT1232LP) RESET RESET (CAT1832) Reset & Watchdog Timer © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 1 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 PIN CONFIGURATION SOIC 8 Lead MSOP 8 Lead PDIP 8 Lead ¯¯¯¯¯¯ PBRST TD TOL GND 1 2 3 4 8 VCC ¯¯ ST ¯¯¯¯¯¯ RESET RESET SOIC 16 Lead NC ¯¯¯¯¯¯ PBRST NC TD NC TOL NC GND 1 2 3 4 5 6 7 8 16 15 14 NC VCC NC ¯¯ ST NC ¯¯¯¯¯¯ RESET NC RESET CAT 7 6 5 CAT 13 12 11 10 9 PIN DESCRIPTION Pin Number 8-Lead Package 1 2 Pin Number 16-Lead Package 2 4 Name ¯¯¯¯¯¯ PBRST TD Function Debounced manual pushbutton reset input Watchdog typical time delay selection: a) tTD = 150 ms for TD = GND b) tTD = 600 ms for TD = Open c) tTD = 1200 ms for TD = VCC CAT1232LP TOL selects 5% (TOL = GND) or 10% (TOL = VCC) trip point tolerance. CAT1832 TOL selects 10% (TOL = GND) or 20% TOL = VCC) trip point tolerance. Ground Active HIGH reset output. RESET is active 1. If VCC falls below the reset voltage trip point ¯¯¯¯¯¯ 2. If PBRST is low ¯¯ 3. If ST is not strobed low before the timeout period set by TD expires. 4. During power-up. Active LOW reset output. (See RESET) Strobe Input Power Supply No internal connection 3 4 6 8 TOL GND 5 9 RESET 6 7 8 11 13 15 1, 3. 5, 7, 10, 12, 14, 16 RESET ¯¯ ST VCC NC ABSOLUTE MAXIMUM RATINGS (*) Parameters Voltage on VCC ¯¯ Voltage on ST and TD ¯¯¯¯¯¯ Voltage on PBRST, ¯¯¯¯¯¯ RESETand RESET Ratings -0.5 to 7.0 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 Units V V V Parameters Maximum Junction Temperature Storage Temperature Range Lead Soldering Temperature (10s) Operating Temperature Range Ratings 125 -65 to +150 300 -40 to +85 Units ºC ºC ºC ºC Note: * Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Doc. No. MD-3018 Rev. F 2 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT1232LP, CAT1832 ELECTRICAL CHARACTERISTICS Unless otherwise stated, 1.0 V - VCC - 5.5 V and over the operating temperature range of -40ºC to +85ºC. All voltages are referenced to ground. Symbol Parameter VCC ICC1 VIH VIL VCCTP VCCTP VCCTP VCCTP tTD tTD tTD VOH IOH IOL IIL RPU CIN COUT tPB tRST tST tRPD tF tPDLY tRPU tR Supply Voltage Supply Current ¯¯¯¯¯¯ ST and PBRST Input High Level ¯¯¯¯¯¯ ST and PBRST Input Low Level VCC Trip Point (TOL = GND) VCC Trip Point (TOL = VCC) VCC Trip Point (TOL = GND) VCC Trip Point (TOL = VCC) Watchdog Time-Out Period Watchdog Time-Out Period Watchdog Time-Out Period Output Voltage Output Current Output Current Input Leakage Internal Pull-Up Resistor Input Capacitance Output Capacitance ¯¯¯¯¯¯ PBRST Manual Reset Minimum Low Time Reset Active Time ¯¯ ST Pulse Width VCC Fail Detect to RESET or ¯¯¯¯¯¯ RESET VCC = 5.5 V, CAT1232LP VCC = 3.6 V, CAT1832 (5) (6) VCC = 5.5 V, CAT1232LP VCC = 3.6 V, CAT1832 CAT1232LP CAT1232LP CAT1832 CAT1832 TD = GND TD = VCC TD floating I = -500 µA (3) (2) Conditions Min 1.0 Typ 35 20 Max 5.5 50 35 VCC + 0.3 V 0.8 0.5 Units V µA V V V V V V ms ms ms V µA mA 2 VCC - 0.4 V -0.3 4.50 4.25 2.80 2.47 62.5 500 250 VCC -0.5 V 10 -1.0 32 40 4.62 4.37 2.88 2.55 150 1200 600 VCC -0.1 V -350 4.74 4.49 2.97 2.64 250 2000 1000 Output = 2.4 V Output = 0.4 V (1) (1) 1.0 55 5 7 µA kΩ pF pF ms ¯¯¯¯¯¯ PBRST = VIL (4) 20 250 20 5 20 20 250 0 600 1000 8 600 1000 ms ns µs µs ms ms ns VCC Slew Rate ¯¯¯¯¯¯ PBRST Stable LOW to RESET ¯¯¯¯¯¯ and RESET Active VCC Detect to RESET or tRISE = 5 µs ¯¯¯¯¯¯ RESET Inactive VCC Slew Rate 4.25 V to 4.75 V Notes: ¯¯¯¯¯¯ (1) PBRST is internally pulled HIGH to VCC through a nominal 40 kΩ resistor (RPU). ¯¯¯¯¯¯ (2) RESET is an open drain output on the CAT1232LP. (3) RESET remains within 0.5 V of VCC on power-down until VCC falls below 2 V. RESET remains within 0.5 V of ground on power-down until VCC falls below 2.0 V. ¯¯ (4) Must not exceed the minimum watchdog time-out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be strobed. (5) Measured with VCC ≥ 2.7 V. (6) Measured with VCC < 2.7 V. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 3 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 TYPICAL CHARACTERISTICS For the CAT1232LP, VCC = 5 V and TAMB = 25ºC unless otherwise stated. Threshold Voltage vs. Temperature (10% TOL) 4.450 THRESHOLD VOLTAGE (V) Threshold Voltage vs. Temperature (5% TOL) 4.630 THRESHOLD VOLTAGE (V) 4.445 TOL = Vcc (10%) 4.440 4.625 TOL = GND (5%) 4.620 4.435 4.615 4.430 -50 0 50 100 4.610 -50 0 50 100 TEMPERATURE (°C) TEMPERATURE (ºC) Supply Current vs. Temperature 40 Reset Active Time vs. Temperature 800 RESET ACTIVE TIME (ms) Vcc = 5.5V SUPPLY CURRENT (mA) 30 Vcc = 4.5V 20 700 Vcc = 5.5V 600 Vcc = 4.5V TD = open 500 10 400 0 -50 0 50 100 300 -50 0 50 100 TEMPERATURE (°C) TEMPERATURE (°C) Reset Active Time Waveform Transient Response Doc. No. MD-3018 Rev. F 4 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT1232LP, CAT1832 APPLICATION INFORMATION SUPPLY VOLTAGE MONITOR Reset Signal Polarity and Output Stage Structure ¯¯¯¯¯¯ RESET is an active LOW signal. It is developed with an open drain driver in the CAT1232LP. A pull-up resistor is required, typical values are 10 kΩ to 50 kΩ. The CAT1832 uses a CMOS push-pull output stage ¯¯¯¯¯¯ for the RESET. RESET is an active High signal developed by a CMOS push-pull output stage and is the logical ¯¯¯¯¯¯ opposite to RESET. Trip Point Tolerance Selection The TOL input is used to select the VCC trip point threshold. This selection is made connecting the TOL input to ground or VCC. Connecting TOL to Ground makes the VCC trip threshold 4.62 V for the CAT1232LP and 2.88 V for the CAT1832. Connecting TOL to VCC makes the VCC trip threshold 4.37 V for the CAT1232LP and 2.55 V for the CAT1832. After VCC has risen above the trip point set by TOL, ¯¯¯¯¯¯ RESET and RESETremain active for a minimum time period of 250 ms. On power-down, once VCC falls below the reset threshold the RESET outputs will remain active and are guaranteed valid down to a VCC level of 1.0 V. Tolerance Select Voltage CAT1232LP TOL = VCC CAT1232LP TOL = GND CAT1832 TOL = VCC CAT1832 TOL = GND Trip Point Tolerance 10 % 5% 20 % 10 % Trip Point Voltage (V) Min 4.25 4.50 2.47 2.80 Nominal 4.37 4.62 2.55 2.88 Max 4.49 4.74 2.64 2.97 Manual Reset Operation ¯¯¯¯¯¯ Push-button input, PBRST, allows the user to issue reset signals. The pushbutton input is debounced and is pulled high through an internal 40 kΩ resistor. ¯¯¯¯¯¯ When PBRST is held low for the minimum time of 20 ms, both resets become active and remain active for a minimum time period of 250 ms after PBRST returns high. ¯¯¯¯¯¯ No external pull-up resistor is required, since PBRST is pulled high by an internal 40 kΩ resistor. ¯¯¯¯¯¯ PBRST can be driven from a TTL or CMOS logic line or short-ed to ground with a mechanical switch. Figure 1. Timing Diagram: Power Up Figure 2. Timing Diagram: Power Down tF VCCTP(MAX) VCCTP tR VCCTP VCCTP(MAX) VCC VCCTP(MIN) VCCTP(MIN) VCC tRPU VOH RESET RESET tRPD VOL RESET RESET VOH VOL © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 5 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 ¯¯ WATCHDOG TIMER AND ST INPUT A watchdog timer stops and restarts a microprocessor that has stopped proper operation or become “hung”. The watchdog performs this function by monitoring the ¯¯ ¯¯ ST input. After the reset outputs go inactive the ST input must be strobed with a high-to-low signal transition prior to the minimum watchdog timeout ¯¯ period. However if the ST input is not strobed with a high-to-low signal transition prior to a watchdog timeout the reset outputs will become active for TRST reseting and restarting the microprocessor. Once the resets return to the inactive state the watchdog timer restarts the process. The TD input allows the user to select from three predetermined watchdog timeout periods. Always use the minimum timeout period to determine the required ¯¯ frequency of ST high-to-low transitions and the maximum to determine the time prior to the reset ¯¯ outputs becoming active. ST pulse widths must be 20 ns or greater. The watchdog timer cannot be disabled. It must be strobed with a high-to-low signal transition to avoid a watchdog timeout and subsequent reset. CAT1232LP 1 2 3 4 PBRST TD TOL GND VCC ST RESET RESET 8 7 6 5 10k µP RESET Address Bus Decoder 5V MREQ TD Voltage Level GND Floating VCC Watchdog Time-out Period (ms) Min 62.5 250 500 Nominal 150 600 1200 3.3V CAT1832 Max 250 1000 2000 1 2 3 4 PBRST TD TOL GND VCC ST RESET RESET 8 7 6 5 I/O µP RESET Figure 4. CAT1832 Application Circuit: Pushbutton Reset Figure 5. CAT1232LP Application Circuit: Watchdog Timer PBRST VIL tPB tPDLY VIH ST Valid Strobe tST Valid Strobe Invalid Strobe tRST RESET RESET RESET tRST tTD (Min) tTD (Min) VOH VOL RESET Note: ST is ignored whenever a reset is active Figure 6. Timing Diagram: Pushbutton Reset Figure 7. Timing Diagram: Strobe Input Doc. No. MD-3018 Rev. F 6 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT1232LP, CAT1832 PACKAGE OUTLINE DRAWINGS SOIC 16-Lead 300 mils (W)(1)(2) D SYMBOL MIN NOM MAX A A1 b c D E1 E 2.36 0.10 0.33 0.18 10.08 10.01 7.39 0.25 0.38 0º 2.49 0.41 0.23 10.31 10.31 7.49 1.27 BSC 2.64 0.30 0.51 0.28 10.49 10.64 7.59 0.75 E E1 e h L θ 0.81 1.27 8º PIN #1 IDENTIFICATION TOP VIEW h A c θ L b e A1 SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-013. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 7 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 PDIP 8-Lead 300mils (L)(1)(2) SYMBOL MIN NOM MAX A A1 A2 b E1 5.33 0.38 2.92 0.36 1.14 0.20 9.02 7.62 6.10 7.87 2.92 3.30 3.30 0.46 1.52 0.25 9.27 7.87 2.54 BSC 6.35 7.11 10.92 3.80 4.95 0.56 1.78 0.36 10.16 8.25 b2 c D E e E1 eB PIN # 1 IDENTIFICATION D L TOP VIEW E A A2 A1 b2 L c e b eB SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. Doc. No. MD-3018 Rev. F 8 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT1232LP, CAT1832 MSOP 8-Lead (Z) (1)(2) SYMBOL MIN NOM MAX A A1 A2 b c D E E1 1.10 0.05 0.75 0.22 0.13 2.90 4.80 2.90 0.40 3.00 4.90 3.00 0.65 BSC 0.60 0.95 REF 0.25 BSC 0º 6º 0.80 0.10 0.85 0.15 0.95 0.38 0.23 3.10 5.00 3.10 E E1 e L L1 L2 θ TOP VIEW D A A2 DETAIL A A1 e SIDE VIEW b c END VIEW θ L2 L L1 DETAIL A Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 9 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 SOIC 8-Lead 150mils (V) (1)(2) SYMBOL MIN NOM MAX A A1 b c E1 E 1.35 0.10 0.33 0.19 4.80 5.80 3.80 1.27 BSC 0.25 0.40 0º 1.75 0.25 0.51 0.25 5.00 6.20 4.00 0.50 1.27 8º D E E1 e h L θ PIN # 1 IDENTIFICATION TOP VIEW D h A1 A θ c e b L SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. Doc. No. MD-3018 Rev. F 10 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT1232LP, CAT1832 EXAMPLE OF ORDERING INFORMATION(1) Prefix CAT Device # Suffix 1232LP V –G T3 Company ID Product Number 1232LP 1832 Package L: PDIP V: SOIC 8-Lead W: SOIC 16-Lead (5) Z: MSOP Lead Finish Blank: Matte-Tin G: NiPdAu Tape & Reel T: Tape & Reel 2: 2,000/Reel 3: 3,000/Reel ORDERING PART NUMBER CAT1232LPL-G CAT1232LPV-GT3 CAT1232LPZ-GT3 CAT1232LPW-T2 CAT1832L-G CAT1832V-GT3 CAT1832Z-GT3 Package 8-lead, PDIP 8-lead, SOIC 8-lead, MSOP 16-lead, SOIC 8-lead, PDIP 8-lead, SOIC 8-lead, MSOP Parts per Tube 50 — — — 50 — — Parts Per Reel — 3,000 3,000 2,000 — 3,000 3,000 Reel Size (inch) — 13 13 13 — 13 13 Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is NiPdAu. (3) The device used in the above example is a CAT1232LPV-GT3 (SOIC 8-Lead, NiPdAu, Tape & Reel). (4) For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. (5) The SOIC 16-Lead package is only available in Matte-Tin finish. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 11 Doc. No. MD-3018 Rev. F CAT1232LP, CAT1832 REVISION HISTORY Date 13-Jun-05 26-Jul-05 37-Mar-06 27-Nov-06 13-Nov-07 06-Nov-08 09-Mar-09 Rev. 00 0A 0B 0C D E F Description Initial Issue Update Electrical Characteristics Add Typical Characteristics Update Document Title Update Ordering Information Add Ordering Information detail to page 1 Update Sample of Ordering Information Update Package Outline Drawings Update Example of Ordering Information Change document number from 25088, Rev. OC Change logo and fine print to ON Semiconductor Update Example of Ordering Information ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center: Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative Doc. No. MD-3018 Rev. F 12 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice