CS8190
Precision Air-Core
Tach/Speedo Driver with
Return to Zero
The CS8190 is specifically designed for use with air−core meter
movements. The IC provides all the functions necessary for an analog
tachometer or speedometer. The CS8190 takes a speed sensor input
and generates sine and cosine related output signals to differentially
drive an air−core meter.
Many enhancements have been added over industry standard
tachometer drivers such as the CS289 or LM1819. The output utilizes
differential drivers which eliminates the need for a zener reference
and offers more torque. The device withstands 60 V transients which
decreases the protection circuitry required. The device is also more
precise than existing devices allowing for fewer trims and for use in a
speedometer.
20
16
1
1
PDIP−16
NF SUFFIX
CASE 648
SO−20W
DWF SUFFIX
CASE 751D
PIN CONNECTIONS AND
MARKING DIAGRAM
Features
Direct Sensor Input
High Output Torque
Low Pointer Flutter
High Input Impedance
Overvoltage Protection
Return to Zero
Internally Fused Leads in PDIP−16 and SO−20W Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PDIP−16
1
CP+
SQOUT
FREQIN
GND
GND
COS+
COS−
VCC
16
CS8190ENF16
AWLYYWWG
•
•
•
•
•
•
•
•
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CP−
F/VOUT
VREG
GND
GND
SINE+
SINE−
BIAS
SO−20W
1
A
WL
YY
WW
G
20
CS−8190
AWLYYWWG
CP+
SQOUT
FREQIN
GND
GND
GND
GND
COS+
COS−
VCC
CP−
F/VOUT
VREG
GND
GND
GND
GND
SIN+
SIN−
BIAS
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
September, 2017 − Rev. 8
1
Publication Order Number:
CS8190/D
CS8190
BIAS
Charge Pump
CP+
F/VOUT
+
-
CP−
SQOUT
Input
Comp.
VREG
+
-
FREQIN
Voltage
Regulator
GND
GND
VREG
7.0 V
GND
GND
SINE+
COS+
COS
Output
+
+
Func.
Gen.
+
-
+
-
SINE
Output
SINE−
COS−
High Voltage
Protection
VCC
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS
Rating
Value
Unit
60
24
V
V
Operating Temperature
−40 to +105
°C
Storage Temperature
−40 to +165
°C
Junction Temperature
−40 to +150
°C
4.0
kV
260 peak
230 peak
°C
°C
Supply Voltage, VCC
< 100 ms Pulse Transient
Continuous
ESD (Human Body Model)
Lead Temperature Soldering: Wave Solder (through hole styles only) (Note 1)
Reflow: (SMD styles only) (Note 2)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. 10 seconds maximum.
2. 60 second maximum above 183°C.
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2
CS8190
ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, 8.5 V ≤ VCC ≤ 15 V, unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
−
50
125
mA
−
8.5
13.1
16
V
Positive Input Threshold
−
1.0
2.0
3.0
V
Input Hysteresis
−
200
500
−
mV
−
−10
−80
mA
0
−
20
kHz
−1.0
−
VCC
V
SUPPLY VOLTAGE SECTION
ICC Supply Current
VCC = 16 V, −40°C, No Load
VCC Normal Operation Range
INPUT COMPARATOR SECTION
Input Bias Current (Note 3)
0 V ≤ VIN ≤ 8.0 V
Input Frequency Range
−
Input Voltage Range
in series with 1.0 kW
Output VSAT (SQOUT)
ICC = 10 mA
−
0.15
0.40
V
Output Leakage (SQOUT)
VCC = 7.0 V
−
−
10
mA
Low VCC Disable Threshold
−
7.0
8.0
8.5
V
Logic 0 Input Voltage
−
1.0
−
−
V
Output Voltage
−
6.25
7.00
7.50
V
Output Load Current
−
−
−
10
mA
VOLTAGE REGULATOR SECTION
Output Load Regulation
0 to 10 mA
−
10
50
mV
Output Line Regulation
8.5 V ≤ VCC ≤ 16 V
−
20
150
mV
Power Supply Rejection
VCC = 13.1 V, 1.0 VP/P 1.0 kHz
34
46
−
dB
CHARGE PUMP SECTION
Inverting Input Voltage
−
1.5
2.0
2.5
V
Input Bias Current
−
−
40
150
nA
VBIAS Input Voltage
−
1.5
2.0
2.5
V
−
0.7
1.1
V
−0.10
0.28
+0.70
%
Non Invert. Input Voltage
IIN = 1.0 mA
Linearity (Note 4)
@ 0, 87.5, 175, 262.5, + 350 Hz
F/VOUT Gain
@ 350 Hz, CCP = 0.0033 mF, RT = 243 kW
7.0
10
13
mV/Hz
Norton Gain, Positive
IIN = 15 mA
0.9
1.0
1.1
I/I
Norton Gain, Negative
IIN = 15 mA
0.9
1.0
1.1
I/I
FUNCTION GENERATOR SECTION: −40C TA 85C, VCC = 13.1 V unless otherwise noted
Return to Zero Threshold
TA = 25°C
5.2
6.0
7.0
V
Differential Drive Voltage, (VCOS+ − VCOS−)
8.5 V ≤ VCC ≤ 16 V, q = 0°
5.5
6.5
7.5
V
Differential Drive Voltage, (VSIN+ − VSIN−)
8.5 V ≤ VCC ≤ 16 V, q = 90°
5.5
6.5
7.5
V
Differential Drive Voltage, (VCOS+ − VCOS−)
8.5 V ≤ VCC ≤ 16 V, q = 180°
−7.5
−6.5
−5.5
V
Differential Drive Voltage, (VSIN+ − VSIN−)
8.5 V ≤ VCC ≤ 16 V, q = 270°
−7.5
−6.5
−5.5
V
Differential Drive Current
8.5 V ≤ VCC ≤ 16 V
−
33
42
mA
−1.5
0
1.5
deg
Zero Hertz Output Angle
−
3. Input is clamped by an internal 12 V Zener.
4. Applies to % of full scale (270°).
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3
CS8190
ELECTRICAL CHARACTERISTICS (−40°C ≤ TA ≤ 85°C, 8.5 V ≤ VCC ≤ 15 V, unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
FUNCTION GENERATOR SECTION: −40C TA 85C, VCC = 13.1 V unless otherwise noted (continued)
Function Generator Error (Note 5)
Reference Figures 2, 3, 4, 5
VCC = 13.1 V
q = 0° to 305°
−2.0
0
+2.0
deg
Function Generator Error
13.1 V ≤ VCC ≤ 16 V
−2.5
0
+2.5
deg
Function Generator Error
13.1 V ≤ VCC ≤ 11 V
−1.0
0
+1.0
deg
Function Generator Error
13.1 V ≤ VCC ≤ 9.0 V
−3.0
0
+3.0
deg
Function Generator Error
25°C ≤ TA ≤ 80°C
−3.0
0
+3.0
deg
Function Generator Error
25°C ≤ TA ≤ 105°C
−5.5
0
+5.5
deg
Function Generator Error
−40°C ≤ TA ≤ 25°C
−3.0
0
+3.0
deg
Function Generator Gain
TA = 25°C, q vs F/VOUT
60
77
95
°/V
5. Deviation from nominal per Table 1 after calibration at 0° and 270°.
PIN FUNCTION DESCRIPTION
PACKAGE PIN #
PDIP−16
SO−20W
PIN SYMBOL
1
1
CP+
2
2
SQOUT
Buffered square wave output signal.
3
3
FREQIN
Speed or RPM input signal.
4, 5, 12, 13
4−7, 14−17
GND
Ground Connections.
6
8
COS+
Positive cosine output signal.
7
9
COS−
Negative cosine output signal.
8
10
VCC
Ignition or battery supply voltage.
9
11
BIAS
Test point or zero adjustment.
10
12
SIN−
Negative sine output signal.
11
13
SIN+
Positive sine output signal.
14
18
VREG
Voltage regulator output.
15
19
F/VOUT
16
20
CP−
FUNCTION
Positive input to charge pump.
Output voltage proportional to input signal frequency.
Negative input to charge pump.
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4
CS8190
TYPICAL PERFORMANCE CHARACTERISTICS
FńVOUT + 2.0 V ) 2.0
6
5
4
3
2
1
0
−1
−2
−3
−4
−5
−6
−7
FREQ
CCP
RT
(VREG * 0.7 V)
7
6
COS
F/V Output (V)
Output Voltage (V)
7
5
4
3
2
1
SIN
0
45
90
135
180
225
Degrees of Deflection (°)
270
0
315
0
Figure 2. Function Generator Output Voltage vs.
Degrees of Deflection
135
180
225
270
Frequency/Output Angle (°)
Angle
−7.0 V
7.0 V
Deviation (°)
q
1.00
0.75
0.50
0.25
0.00
−0.25
−0.50
(VCOS+) − (VCOS−)
−0.75
−1.00
−1.25
−7.0 V
−1.50
0
Figure 4. Output Angle in Polar Form
45
90
225
135
180
Theoretical Angle (°)
270
Figure 5. Nominal Output Deviation
45
Ideal Angle (Degrees)
40
35
30
25
20
Ideal Degrees
15
Nominal Degrees
10
5
0
1
5
9
13
315
1.50
1.25
7.0 V
SIN ) * VSIN * ƫ
ƪVVCOS
) * VCOS *
90
Figure 3. Charge Pump Output Voltage vs.
Output Angle
(VSINE+) − (VSINE−)
Q + ARCTAN
45
17
25
29
21
Nominal Angle (Degrees)
33
37
Figure 6. Nominal Angle vs. Ideal Angle (After Calibrating at 180)
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5
41
45
315
CS8190
Table 1. Function Generator Output Nominal Angle vs. Ideal Angle (After Calibrating at 270)
Nominal
q
Degrees
Ideal q
Degrees
Nominal
q
Degrees
Ideal q
Degrees
Nominal
q
Degrees
Ideal q
Degrees
Nominal
q
Degrees
Ideal q
Degrees
Nominal
q
Degrees
Ideal q
Degrees
Nominal
q
Degrees
0
0
17
17.98
34
33.04
75
74.00
160
159.14
245
244.63
1
1.09
18
18.96
35
34.00
80
79.16
165
164.00
250
249.14
2
2.19
19
19.92
36
35.00
85
84.53
170
169.16
255
254.00
3
3.29
20
20.86
37
36.04
90
90.00
175
174.33
260
259.16
4
4.38
21
21.79
38
37.11
95
95.47
180
180.00
265
264.53
5
5.47
22
22.71
39
38.21
100
100.84
185
185.47
270
270.00
6
6.56
23
23.61
40
39.32
105
106.00
190
190.84
275
275.47
7
7.64
24
24.50
41
40.45
110
110.86
195
196.00
280
280.84
8
8.72
25
25.37
42
41.59
115
115.37
200
200.86
285
286.00
9
9.78
26
26.23
43
42.73
120
119.56
205
205.37
290
290.86
10
10.84
27
27.07
44
43.88
125
124.00
210
209.56
295
295.37
11
11.90
28
27.79
45
45.00
130
129.32
215
214.00
300
299.21
12
12.94
29
28.73
50
50.68
135
135.00
220
219.32
305
303.02
13
13.97
30
29.56
55
56.00
140
140.68
225
225.00
14
14.99
31
30.39
60
60.44
145
146.00
230
230.58
15
16.00
32
31.24
65
64.63
150
150.44
235
236.00
16
17.00
33
32.12
70
69.14
155
154.63
240
240.44
Ideal q
Degrees
Note: Temperature, voltage and nonlinearity not included.
CIRCUIT DESCRIPTION and APPLICATION NOTES
on−chip amplifier and function generator circuitry. The
various trip points for the circuit (i.e., 0°, 90°, 180°, 270°)
are determined by an internal resistor divider and the
bandgap voltage reference. The coils are differentially
driven, allowing bidirectional current flow in the outputs,
thus providing up to 305° range of meter deflection. Driving
the coils differentially offers faster response time, higher
current capability, higher output voltage swings, and
reduced external component count. The key advantage is a
higher torque output for the pointer.
The output angle, q, is equal to the F/V gain multiplied by
the function generator gain:
The CS8190 is specifically designed for use with air−core
meter movements. It includes an input comparator for
sensing an input signal from an ignition pulse or speed
sensor, a charge pump for frequency to voltage conversion,
a bandgap voltage regulator for stable operation, and a
function generator with sine and cosine amplifiers to
differentially drive the meter coils.
From the partial schematic of Figure 7, the input signal is
applied to the FREQIN lead, this is the input to a high
impedance comparator with a typical positive input
threshold of 2.0 V and typical hysteresis of 0.5 V. The output
of the comparator, SQOUT, is applied to the charge pump
input CP+ through an external capacitor CCP. When the
input signal changes state, CCP is charged or discharged
through R3 and R4. The charge accumulated on CCP is
mirrored to C4 by the Norton Amplifier circuit comprising
of Q1, Q2 and Q3. The charge pump output voltage, F/VOUT,
ranges from 2.0 V to 6.3 V depending on the input signal
frequency and the gain of the charge pump according to the
formula:
FńVOUT + 2.0 V ) 2.0
FREQ
CCP
RT
q + AFńV
AFG,
where:
AFG + 77° ńV(typ)
The relationship between input frequency and output
angle is:
q + AFG
2.0
q + 970
FREQ
FREQ
CCP
RT
(VREG * 0.7 V)
or,
(VREG * 0.7 V)
RT is a potentiometer used to adjust the gain of the F/V
output stage and give the correct meter deflection. The F/V
output voltage is applied to the function generator which
generates the sine and cosine output voltages. The output
voltage of the sine and cosine amplifiers are derived from the
CCP
RT
The ripple voltage at the F/V converter’s output is
determined by the ratio of CCP and C4 in the formula:
DV +
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6
CCP(VREG * 0.7 V)
C4
CS8190
VREG
2.0 V
F/VOUT
+
R3
−
0.25 V
+
SQOUT
FREQIN
VC(t)
Q3
CP−
F to V
RT
−
CCP
CP+
R4
C4
+
Q1
QSQUARE
Q2
−
2.0 V
Figure 7. Partial Schematic of Input and Charge Pump
T
tDCHG
tCHG
VCC
FREQIN 0
VREG
SQOUT
0
ICP+
VCP+
0
Figure 8. Timing Diagram of FREQIN and ICP
Ripple voltage on the F/V output causes pointer or needle
flutter especially at low input frequencies.
The response time of the F/V is determined by the time
constant formed by RT and C4. Increasing the value of C4
will reduce the ripple on the F/V output but will also increase
the response time. An increase in response time causes a
very slow meter movement and may be unacceptable for
many applications.
The CS8190 has an undervoltage detect circuit that disables
the input comparator when VCC falls below 8.0 V(typical).
With no input signal the F/V output voltage decreases and the
needle moves towards zero. A second undervoltage detect
circuit at 6.0 V(typical) causes the function generator to
generate a differential SIN drive voltage of zero volts and the
differential COS drive voltage to go as high as possible. This
combination of voltages (Figure 2) across the meter coil
moves the needle to the 0° position. Connecting a large
capacitor(> 2000 mF) to the VCC lead (C2 in Figure 9)
increases the time between these undervoltage points since
the capacitor discharges slowly and ensures that the needle
moves towards 0° as opposed to 360°. The exact value of the
capacitor depends on the response time of the system,the
maximum meter deflection and the current consumption of
the circuit. It should be selected by breadboarding the design
in the lab.
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7
CS8190
R3
R4
CCP
0.0033 mF
± 30 PPM/°C
3.0 kW
Speedo Input
1 CP+
1.0 kW
CP−
F/VOUT
SQOUT
R2
CS8190
0.1 mF
C3
GND
GND
Battery
R1
0.47 mF
RT
Trim Resistor
± 20 PPM/°C
GND
GND
COS+
SINE+
COS−
SINE−
BIAS
VCC
3.9,
D1
1.0 A 500 mW
600 PIV
+
VREG
FREQIN
10 kW
C4
C1
0.1 mF
C2
2000 mF
COSINE
SINE
D2
50 V,
500 mW
Zener
GND
Air Core
Gauge
200 W
Speedometer
Notes:
1. C2 (> 2000 mF) is needed if return to zero function is required.
2. The product of CCP and RT have a direct effect on the transfer function (f to V conversion) and therefore directly affect
temperature compensation.
3. CCP Range; 20 pF to 0.2 mF.
4. RT Range; 100 kW to 500 kW.
5. The IC must be protected from transients above 60 V and reverse battery conditions.
6. Additional filtering on the FREQIN lead may be required.
7. Gauge coil connections to the IC must be kept as short as possible (≤ 3.0 inch) for best pointer stability.
Figure 9. Speedometer or Tachometer Application
Design Example
is 2.85 ms. To ensure that CCP is charged, assume that the
(R3 + R4) CCP time constant is less than 10% of the
minimum input period.
Maximum meter Deflection = 270°
Maximum Input Frequency = 350 Hz
1. Select RT and CCP
q + 970
FREQ
CCP
T + 10%
RT + 270°
Let CCP = 0.0033 mF, find RT
RT +
970
Choose R4 = 1.0 kW.
Discharge time: tDCHG = R4 × CCP = 3.3 kW × 0.0033 mF
= 3.3 ms
Charge time: tCHG = (R3 + R4)CCP = 4.3 kW. × 0.0033 mF
= 14.2 ms
3. Determine C4
C4 is selected to satisfy both the maximum allowable
ripple voltage and response time of the meter movement.
270°
350 Hz 0.0033 mF
RT + 243 kW
RT should be a 250 kW potentiometer to trim out any
inaccuracies due to IC tolerances or meter movement
pointer placement.
2. Select R3 and R4
Resistor R3 sets the output current from the voltage
regulator. The maximum output current from the voltage
regulator is 10 mA. R3 must ensure that the current does not
exceed this limit.
Choose R3 = 3.3 kW
The maximum charge current for CCP is worst case
estimated at:
VREG * 0.7 V
3.3 kW
1
+ 285 ms
350 Hz
C4 +
CCP(VREG * 0.7 V)
DVMAX
With C4 = 0.47 mF, the F/V ripple voltage is 44 mV.
The last component to be selected is the return to zero
capacitor C2. This is selected by increasing the input signal
frequency to its maximum so the pointer is at its maximum
deflection, then removing the power from the circuit. C2
should be large enough to ensure that the pointer always
returns to the 0° position rather than 360° under all operating
conditions.
Figure 10 shows how the CS8190 and the CS8441 are
used to produce a Speedometer and Odometer circuit.
+ 1.90 mA
CCP must charge and discharge fully during each cycle of
the input signal. Time for one cycle at maximum frequency
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8
CS8190
R4
R3
Speedo
Input
3.0 kW
CCP
0.0033 mF
± 30 PPM/°C
1.0 kW
1
CP+
CP−
F/VOUT
SQOUT
R2
0.1 mF
CS8190
C3
GND
GND
Battery
R1
3.9,
D1
1.0 A 500 mW
600 PIV
GND
Trim Resistor
± 20 PPM/°C
243 kW
GND
COS+
COS−
SINE−
BIAS
COSINE
SINE
C1
0.1 mF
Air Core
Gauge
200 W
C2
10 mF
RT
GND
SINE+
VCC
D2
50 V,
500 mW
Zener
0.47 mF
VREG
FREQIN
10 kW
C4 +
Speedometer
1
CS8441
Air Core
Stepper
Motor
200 W
Odometer
Notes:
1. C2 = 10 mF with CS8441 application.
2. The product of CCP and RT have a direct effect on the transfer function (f to V conversion) and therefore directly affect
temperature compensation.
3. CCP Range; 20 pF to 0.2 mF.
4. RT Range; 100 kW to 500 kW.
5. The IC must be protected from transients above 60 V and reverse battery conditions.
6. Additional filtering on the FREQIN lead may be required.
7. Gauge coil connections to the IC must be kept as short as possible (≤ 3.0 inch) for best pointer stability.
Figure 10. Speedometer With Odometer or Tachometer Application
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9
CS8190
In some cases a designer may wish to use the CS8190 only
as a driver for an air−core meter having performed the F/V
conversion elsewhere in the circuit.
Figure 11 shows how to drive the CS8190 with a DC
voltage ranging from 2.0 V to 6.0 V. This is accomplished by
forcing a voltage on the F/VOUT lead. The alternative scheme
shown in Figure 12 uses an external op amp as a buffer and
operates over an input voltage range of 0 V to 4.0 V.
Figures 11 and 12 are not temperature compensated.
CS8190
100 kW
100 kW
VIN
0 V to 4.0 V DC
+
VREG
100 kW
BIAS
+
−
10 kW
−
CP−
F/VOUT
CS8190
100 kW
CP−
−
100 kW
+
10 kW
N/C
VIN
2.0 V to 6.0 V DC
Figure 12. Driving the CS8190 from an External
DC Voltage Using an Op Amp Buffer
BIAS
F/VOUT
Figure 11. Driving the CS8190 from an External
DC Voltage
PACKAGE THERMAL DATA
PDIP−16
SO−20W
Unit
RqJC
Typical
15
9
°C/W
RqJA
Typical
50
55
°C/W
Parameter
ORDERING INFORMATION
Device
Package
CS8190ENF16G
PDIP−16
(Pb−Free)
CS8190EDWF20G
SO−20W
(Pb−Free)
CS8190EDWFR20G
SO−20W
(Pb−Free)
Shipping†
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−16
CASE 648−08
ISSUE V
16
1
SCALE 1:1
D
A
16
9
E
H
E1
1
NOTE 8
b2
8
c
B
TOP VIEW
END VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
A1
C
D1
e
SEATING
PLANE
M
eB
END VIEW
16X b
SIDE VIEW
0.010
M
C A
M
B
M
NOTE 6
DATE 22 APR 2015
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.735 0.775
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
18.67 19.69
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
GENERIC
MARKING DIAGRAM*
16
STYLE 1:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. CATHODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
15. ANODE
16. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
STYLE 2:
PIN 1. COMMON DRAIN
2. COMMON DRAIN
3. COMMON DRAIN
4. COMMON DRAIN
5. COMMON DRAIN
6. COMMON DRAIN
7. COMMON DRAIN
8. COMMON DRAIN
9. GATE
10. SOURCE
11. GATE
12. SOURCE
13. GATE
14. SOURCE
15. GATE
16. SOURCE
98ASB42431B
PDIP−16
XXXXXXXXXXXX
XXXXXXXXXXXX
AWLYYWWG
1
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−20 WB
CASE 751D−05
ISSUE H
DATE 22 APR 2015
SCALE 1:1
A
20
q
X 45 _
M
E
h
0.25
H
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
11
B
M
D
1
10
20X
B
b
0.25
M
T A
S
B
DIM
A
A1
b
c
D
E
e
H
h
L
q
S
L
A
18X
e
SEATING
PLANE
A1
c
T
GENERIC
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT*
20
20X
20X
1.30
0.52
20
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
11
1
11.00
1
XXXXX
A
WL
YY
WW
G
10
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
MILLIMETERS
MIN
MAX
2.35
2.65
0.10
0.25
0.35
0.49
0.23
0.32
12.65
12.95
7.40
7.60
1.27 BSC
10.05
10.55
0.25
0.75
0.50
0.90
0_
7_
98ASB42343B
SOIC−20 WB
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
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