Revised April 2000
DM74S74
Dual Positive-Edge-Triggered D Flip-Flops
with Preset, Clear, and Complementary Outputs
General Description
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the
positive going edge of the clock pulse. The triggering
occurs at a voltage level and is not directly related to the
transition time of the rising edge of the clock. The data on
the D input may be changed while the clock is LOW or
HIGH without affecting the outputs as long as setup and
hold times are not violated. A low logic level on the preset
or clear inputs will set or reset the outputs regardless of the
logic levels of the other inputs.
Ordering Code:
Order Number
Package Number
Package Description
DM74S74M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74S74N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Outputs
PR
CLR
CLK
D
Q
L
H
X
X
H
Q
L
H
L
X
X
L
H
H*
L
L
X
X
H*
H
H
↑
H
H
L
H
H
↑
L
L
H
H
H
L
X
Q0
Q0
H = HIGH Logic Level
X = Either LOW or HIGH Logic Level
L = LOW Logic Level
↑ = Positive-going Transition
* = This configuration is nonstable; that is, it will not persist when either the
preset and/or clear inputs return to its inactive (HIGH) level.
Q0 = The output logic level of Q before the indicated input conditions were
established.
© 2000 Fairchild Semiconductor Corporation
DS006457
www.fairchildsemi.com
DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs
August 1986
DM74S74
Absolute Maximum Ratings(Note 1)
Supply Voltage
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
7V
Input Voltage
5.5V
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Recommended Operating Conditions
Symbol
Parameter
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
Min
Nom
Max
Units
4.75
5
5.25
V
0.8
V
2
V
IOH
HIGH Level Output Current
−1
mA
IOL
LOW Level Output Current
20
mA
fCLK
Clock Frequency (Note 2)
0
110
75
MHz
fCLK
Clock Frequency (Note 3)
0
95
65
MHz
tW
Pulse Width
(Note 2)
tW
Clock HIGH
6
Clock LOW
7.3
Clear LOW
7
Preset LOW
7
Pulse Width
Clock HIGH
8
(Note 3)
Clock LOW
9
Clear LOW
9
Preset LOW
ns
ns
9
tSU
Setup Time (Note 2)(Note 4)
3↑
ns
tSU
Setup Time (Note 3)(Note 4)
3↑
ns
tH
Input Hold Time (Note 2)(Note 4)
2↑
ns
tH
Input Hold Time (Note 3)(Note 4)
2↑
TA
Free Air Operating Temperature
0
Note 2: CL = 15 pF, R L = 280Ω, TA = 25°C and VCC = 5V.
Note 3: CL = 50 pF, R L = 280Ω, TA = 25°C and VCC = 5V.
Note 4: The symbol (↑) indicates the rising edge at the clock pulse is used for reference.
www.fairchildsemi.com
2
ns
70
°C
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = − 18 mA
VOH
HIGH Level
VCC = Min, IOH = Max
Output Voltage
VIL = Max, VIH = Min
VOL
LOW Level
VCC = Min, IOL = Max
Output Voltage
VIH = Min, VIL = Max
Min
2.7
Typ
(Note 5)
Max
Units
−1.2
V
3.4
V
0.5
V
1
mA
II
Input Current @ Max Input Voltage VCC = Max, VI = 5.5V
IIH
HIGH Level
VCC = Max
D
50
Input Current
VI = 2.7V
Clear
150
Preset
100
IIL
Clock
100
LOW Level
VCC = Max
D
−2
Input Current
VI = 0.5V
Clear
−6
(Note 6)
Preset
−4
Short Circuit Output Current
VCC = Max (Note 7)
ICC
Supply Current
VCC = Max, (Note 8)
mA
−4
Clock
IOS
µA
−40
30
−100
mA
50
mA
Note 5: All typicals are at VCC = 5V, TA = 25°C.
Note 6: Clear is tested with preset HIGH and preset is tested with clear HIGH.
Note 7: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 8: With all outputs OPEN, ICC is measured with the Q and Q outputs HIGH in turn. At the time of measurement, the clock is grounded.
Switching Characteristics
at VCC = 5V and TA = 25°C
RL = 280Ω
Symbol
Parameter
CL = 15 pF
From (Input)
To (Output)
fMAX
Maximum Clock Frequency
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Min
CL = 50 pF
Max
75
Min
Units
Max
65
MHz
Preset to Q
6
9
ns
Clear to Q
6
9
ns
Preset to Q
13.5
17
ns
Preset to Q
8
14
ns
Clear to Q
13.5
16
ns
Clear to Q
8
13
ns
Clock to Q or Q
9
12
ns
Clock to Q or Q
9
14
ns
Propagation Delay Time
HIGH-to-LOW Level Output
(Clock HIGH)
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Clock LOW)
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Clock HIGH)
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
(Clock LOW)
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
3
www.fairchildsemi.com
DM74S74
Electrical Characteristics
DM74S74
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
www.fairchildsemi.com
4
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
www.fairchildsemi.com
5
www.fairchildsemi.com
DM74S74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
很抱歉,暂时无法提供与“DM74S74N”相匹配的价格&库存,您可以联系我们找货
免费人工找货