ESDU3121MXT5G

ESDU3121 12 V Unidirectional ESD and Surge Protection Device The ESDU3121 is designed to protect voltage sensitive components from ESD. Excellent clamping capability, low leakage, high peak pulse current handling capability and fast response time provide best in class protection on designs that are exposed to ESD. Because of its small size, it is suited for use in cellular phones, tablets, MP3 players, digital cameras and many other portable applications where board space comes at a premium. www.onsemi.com MARKING DIAGRAM Features • • • • • Low Clamping Voltage Low Leakage Small Body Outline: 1.0 mm x 0.6 mm Protection for the Following IEC Standards: IEC61000−4−2 Level 4: ±30 kV Contact Discharge IEC61000−4−5 (Lightning): 8.5 A (8/20 ms) These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant X2DFN2 CASE 714AB YK M YK = Specific Device Code M = Date Code 1 CATHODE 2 ANODE Typical Applications • Power Line Protection • GPIO Protection ORDERING INFORMATION Device Table 1. MAXIMUM RATINGS Rating IEC 61000−4−2 (ESD) Value Unit Contact Symbol ±30 kV Air ±30 TJ −65 to + 150 °C Storage Temperature Range TSTG −65 to + 150 °C Minimum Peak Pulse Current IPP 8.5 A Operating Junction Temperature Range ESDU3121MXT5G Package Shipping† X2DFN2 (Pb−Free) 8000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 2017 September, 2018 − Rev. 1 1 Publication Order Number: ESDU3121/D ESDU3121 Table 2. ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol IF Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT Working Peak Reverse Voltage VC VBR VRWM V IR VF IT Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current *See Application Note AND8308/D for detailed explanations of datasheet parameters. IPP Uni−Directional Surge Protection Table 3. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Reverse Working Voltage Breakdown Voltage Symbol VRWM Conditions Min Typ Max Unit 12 V 14.1 15 15.8 V 0.1 mA I/O Pin to GND VBR IT = 1 mA, I/O Pin to GND Reverse Leakage Current IR @ VRWM, I/O Pin to GND Reverse Peak Pulse Current IPP IEC−61000−4−5 (8x20 ms) Clamping Voltage 8x20 ms Waveform per Figure 3 VC IPP = 8.5 A 20.3 I/O Pin to GND, IEC−61000−4−5 (8x20 ms) 0.70 W 55 pF Dynamic Resistance RDYN Junction Capacitance CJ VR = 0 V, f = 1 MHz 8.5 A 22 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 2 ESDU3121 30 50 20 40 10 VOLTAGE (V) 60 30 20 −10 −20 0 −30 −10 −20 0 20 40 60 80 100 120 −40 −20 140 20 40 60 80 100 120 140 TIME (ns) TIME (ns) Figure 1. ESD Clamping Voltage Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Negative 8 kV Contact per IEC61000−4−2 PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 20 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 15 10 5 20 10 0 20 40 t, TIME (ms) 60 0 0 80 50 ITLP (A) 40 30 20 10 1 2 3 4 5 6 7 6 8 10 12 Figure 4. Positive Clamping Voltage vs. Peak Pulse Current (tp = 8/20 ms) 60 0 4 IPK (A) Figure 3. 8 x 20 ms Pulse Waveform 0 2 8 9 10 11 18 9 16 8 14 7 12 6 10 5 8 4 6 3 4 2 2 1 00 12 5 10 15 20 VBIAS (V) VCLTP (V) Figure 5. Line Capacitance, ƒ = 1MHz Figure 6. Positive TLP I−V Curve www.onsemi.com 3 0 25 VIEC (kV) 0 C (pF) 0 25 100 % OF PEAK PULSE CURRENT 0 10 VC @ IPK (V) VOLTAGE (V) TYPICAL CHARACTERISTICS ESDU3121 Transmission Line Pulse (TLP) Measurement ESD Voltage Clamping Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 7. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 8 where an 8 kV IEC 61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. For more information on TLP measurements and how to interpret them please refer to AND9007/D. For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. L S Attenuator ÷ 50 W Coax Cable 10 MW IM 50 W Coax Cable IEC 61000−4−2 Spec. VM DUT VC Oscilloscope Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 Figure 7. Simplified Schematic of a Typical TLP System IEC61000−4−2 Waveform Ipeak 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 9. IEC61000−4−2 Spec ESD Gun Figure 8. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms DUT 50 W Cable Oscilloscope 50 W Figure 10. Diagram of ESD Test Setup www.onsemi.com 4 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS X2DFN2 1.0x0.6, 0.65P CASE 714AB ISSUE B DATE 21 NOV 2017 SCALE 8:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. EXPOSED COPPER ALLOWED AS SHOWN. 0.10 C A B D É PIN 1 INDICATOR E DIM A A1 b D E e L 0.05 C TOP VIEW A NOTE 3 0.10 C 0.10 C A1 C SIDE VIEW GENERIC MARKING DIAGRAM* SEATING PLANE XX M e b e/2 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 −−− 0.03 0.05 0.45 0.50 0.55 0.95 1.00 1.05 0.55 0.60 0.65 0.65 BSC 0.20 0.25 0.30 0.05 M XX = Specific Device Code M = Date Code C A B RECOMMENDED SOLDER FOOTPRINT* 1 2X L 0.05 M C A B BOTTOM VIEW 1.20 2X 0.47 2X 0.60 PIN 1 DIMENSIONS: MILLIMETERS *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON98172F X2DFN2 1.0X0.6, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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