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FAN54110
USB-Compatible Single-Cell Li-Ion Linear Charger with DBP
Features
Fully Integrated, High-Efficiency Charger for Single-Cell LiIon and Li-Polymer Battery Packs
0.5% at 25°C
1% from -30 to 85°C
+0/-10% Charge Current Regulation Accuracy
28 V Absolute Maximum Input Voltage
1 A Maximum Charge Current
Support for Dead Battery Provision (DBP) of
USB Battery Charging Specification 1.2
Programmable through I2C Interface with
Fast Mode (400 kHz) Compatibility
Charge Voltage Accuracy:
–
–
–
Input Current
Fast-Charge / Termination Current
Charger Voltage
Safety Timer with Reset Control
Weak Input Sources Accommodated by Reducing Charging
Current to Maintain Minimum VBUS Voltage
Low Reverse Leakage to Prevent Battery Drain to VBUS
Description
The FAN54110 is a USB-compatible single-cell, linear Li-Ion
charger with support for Dead Battery Provision (DBP).
The device employs Over-Voltage Protection (OVP) circuitry
to protect the device, load, and battery. The maximum
charge current is rated at 1 A and can be programmed from
100 mA to 1 A through the I2C interface, optimizing charging
for various battery sizes.
Dynamic Input Voltage Control ensures weak power sources
can be used to power the FAN54110 without collapsing to an
unusable input voltage for charging.
Open-drain status pins, STAT and POK_B, provide a status
of charging and input power. The STAT pin also notifies the
system processor when an I2C interrupt occurs so the
processor can take action based on the interrupt.
The FAN54110 conforms to the constraints of the Dead
Battery Provision within the BC1.2 specification, including a
30-minute timer that cannot exceed 45 minutes.
The FAN54110 is designed to be stable with space-saving
ceramic capacitors. The FAN54110 is available in a 15bump, 0.4 mm pitch, WLCSP package.
Applications
VBUS
Smart Phones
Tablets
Portable Media Players
Li Ion Powered Devices
VBAT
CBUS
CBAT
+
Battery
SYSTEM
LOAD
PGND
SDA
FAN54110
LDO
SCL
CLDO
DIS
ILIM
DBP
STAT
Figure 1.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
D+
POK_B
Typical Application
www.onsemi.com
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
June 2017
Part Number
PN Reg00h[4:3]
Temperature Range
FAN54110UCX
00
-40°C to 85°C
Packing
Method
Package
15-Bump, Wafer-Level Chip-Scale
Tape and Reel
(WLCSP), 0.4 mm Pitch
Recommended External Components
Min. Typ.(1) Unit
Component
Description
Vendor
Parameter
CBUS
1.0 F, 10%, 25 V, X5R, 0603
Murata GRM188R61E105K
TDK C1608X5R1E105M
C
0.5
1.0
F
CBAT(2)
4.7 F, 10%, 6.3 V, X5R, 0603
Murata GRM188R60J475K
TDK C1608X5R0J475K
C
2.0
4.7
F
CLDO
1.0 F, 10%, 6.3 V, X5R, 0402
Murata GRM155R60J105M
C
0.4
1.0
F
Notes:
1. Does not reflect effects of bias, tolerance, and temperature.
2. CBAT is placed as close to the charger IC as possible. A minimum requirement of 30 F distributed system capacitance
(CSYS) is parallel with CBAT, but can be located further from the IC.
Block Diagram
VBUS
CBUS
LDO
Q2
Q3
1F
CHARGE
PUMP
VBUS
POK/OVP
VCC
VCCI/O
CLDO
LDO 3.3 V
DAC
CHARGE
CONTROL
Q1
Q1A
Q1B
VBAT
VREF
CBAT
SDA
SYSTEM
LOAD
+
CSYS
Battery
SCL
DBP
ILIM
DIS
I2C
INTERFACE
OSC
STAT
LOGIC
AND
CONTROL
POK_B
D+
Figure 2.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
IC and System Block Diagram
www.onsemi.com
2
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Ordering Information
DBP
SCL
SDA
A1
A2
A3
A4
VBUS
B1
C1
C2
DIS
POK_B
D1
D2
A3
A2
A1
B2
B1
STAT
B2
PGND
A4
B4
B4
VBAT
LDO
C3
C4
C4
C3
C2
C1
D4
D3
D2
D1
ILIM
D3
D4
Bottom View
Top View
Pin Definitions
Pin #
Name
Description
A1
D+
A2
DBP
Dead Battery Provision Disable
Pull HIGH to disable charger D+ output. Internal pull-down resistor.
A3
SCL
I2C Interface Serial Clock
A4
SDA
I2C Interface Serial Data
B1, B2
VBUS
Charger Input Voltage
Bypass with a 1 F capacitor directly to PGND.
B4
STAT
Status / Interrupt
Open-drain output indicating charge status. The IC pulls this pin LOW when charge is in process. High
impedance when charging is done or charger is disabled . Also used as system interrupt. 128 s pulse
and then high impedance indicates to the system a fault has occurred.
C1, C2
PGND
Power Ground
Power return for gate drive and power transistors.
C4
LDO
3.3 V LDO
3.3 V regulator output.
D1
DIS
Active-High Disable
When pulled HIGH, the charger is disabled. Internal pull-down resistor.
D2
POK_B
C3, D3
VBAT
D4
ILIM
Connect to the USB connector D+ pin
Charger IC sources 0.6 V in CHARGE state when DBP is LOW. Otherwise, this pin is 3-state.
VBUS Power-OK Monitor
Open-drain output that is pulled LOW when VBUS is greater than the VBUS validation threshold and lower
than VBUS OVP. High impedance when outside this range.
Battery Voltage
Connect to the positive (+) terminal of the battery pack. Bypass locally with a 4.7 F capacitor to
PGND.
Input Current Limit
This pin sets the input current limit for t30MIN charging. Internal pull-down resistor.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
www.onsemi.com
3
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
D+
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable
above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition,
extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute
maximum ratings are stress ratings only.
Symbol
Parameter
Max.
Unit
-1.2
28.0
V
VBUS
Voltage on VBUS
VBAT
Voltage on VBAT
-0.3
6.5
V
Voltage on Other Pins
-0.3
(3)
V
VO
Continuous
Min.
Human Body Model per ANSI/ESDA/JEDEC JS-001-2012
(All Pins)
ESD
2000
Electrostatic Discharge
Protection Level
Charged Device Model per JESD22-C101 (All Pins)
V
1500
IEC 61000-4-2 System (VBUS and D+ Pins)
8000
JESD78 – Class 1, 25°C
LU
Latch Up
TJ
Junction Temperature
-40
+150
°C
TSTG
Storage Temperature
-65
+150
°C
+260
°C
TL
±100
Lead Soldering Temperature, 10 Seconds
mA
Note:
3. Lesser of 6.5 V or VBAT + 0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device. Recommended operating conditions
are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend
exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
Max.
Unit
VIN
Supply Voltage
4
6
V
TA
Ambient Temperature
-30
+85
°C
TJ
Junction Temperature
-30
+125
°C
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer
2s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature
TJ(max) at a given ambient temperature TA. For measured data, see the Evaluation Board Measured JA table.
Symbol
Parameter
Typical
Unit
JA
Junction-to-Ambient Thermal Resistance
60
°C/W
JB
Junction-to-PCB Thermal Resistance
20
°C/W
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
www.onsemi.com
4
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Absolute Maximum Ratings
Unless otherwise specified: circuit of Figure 2, recommended operating temperature range for TJ and TA, VBUS=5.0 V, DIS=0
(Charger Mode operation), SCL, SDA=0 or 1.8 V; typical values are for TJ=25°C.
Symbol
Parameter
Conditions
Min.
Typ. Max. Unit
Power Supplies
VIN(MIN)1
VBUS Input Voltage Rising
To Initiate and Pass VBUS Validation
4.18
4.40
4.65
V
VIN(MIN)2
Minimum VBUS during Charge
VBUS Regulation Loop is Off
2.95
3.10
3.35
V
tVBUS_VALID VBUS Validation Time
VBUS_REF
32
VBUS Regulation Loop Threshold
Relative to VBUS_REF Setting
VBUS Current
DIS=1
IDIS
VBUS Discharge Current
VBUS Removal or Validation
IBAT
Battery Discharge Current during
SLEEP State
IVBUS
IBUS_LKG
VBAT to VBUS Leakage Current
-5
ms
+5
%
890
1,000
A
63
90
mA
VBAT=4. 2 V, VBUS=Open, SDA=SCL=1. 8 V,
No I2C Traffic, -30°C < TJ < 85°C
5
10
VBAT=4. 2 V, VBUS=Open, SDA=SCL=0 V,
-30°C < TJ < 85°C
3
8
VBAT=4. 2 V, VBUS=0 V, -30°C < TJ < 85°C
350 mA
-10
-5
0
(measured at VBUS, includes ICHRG + IREG)
IOCHRG < 350 mA
-15
-7
0
%
Logic Levels: DIS, SDA, SCL, ILIM, DBP
VIH
High-Level Input Voltage
VIL
Low-Level Input Voltage
IIN
Input Bias Current
RPD
1.05
Input Tied to GND or Greater of VBAT or Valid
VBUS
ILIM, DBP, DIS Pull-Down
Resistance
0.6
V
0.4
V
0.01
1.00
A
0.9
1.4
M
VBAT Overshoot Test
In the figure below, IOCHARGE=1 A (1111), VOREG=4.2 V. ILOAD tR=tF=1 s. Charge current prior to load transient= 20mV 100mA
200m
Overshoot is measured as the peak voltage above V BAT level prior to the load transient application. CSYS represents the
distributed system capacitance across the VBAT terminals and is assumed to be a minimum of 30 F.
VBAT
FAN54110
CSYS
CBAT
30F
VCELL
ILOAD
1A
200m
ESR
+
4.18V
BATTERY MODEL
Figure 3.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
VBAT Overshoot Test Condition
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5
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Electrical Specifications
Unless otherwise specified: circuit of Figure 2, recommended operating temperature range for TJ and TA, VBUS=5.0 V, DIS=0
(Charger Mode operation), SCL, SDA=0 or 1.8 V; typical values are for TJ=25°C.
Symbol
Parameter
Conditions
Min.
Typ. Max. Unit
VBAT > VOREG – VRCH, VBUS > VBUS_REF
20
170
ITERM > 80 mA
-10
+10
ITERM < 80 mA
-20
+20
Charge Termination Detection
Termination Current Range
ITERM
Termination Current Accuracy
mA
%
Battery Recharge Threshold
VRCH
Recharge Threshold
VBAT Falling by VRCH below VOREG Threshold
100
mV
3. 3 V Linear Regulator
VREG
3.3 V Regulator Output
IREG from 0 to 40 mA
3.10
3.30
3.50
V
0.51
0.60
0.69
V
+1
µA
0.4
V
1
µA
DBP Output
VDBP_SRC
Voltage on D+ pin
DBP=0, ILOAD on D+ from 0 to 250 A
IDBP_OFF
Leakage Current
DBP=1, VD+ from 0 to 3. 6 V
-1
STAT / POK_B Output
VOL
STAT / POK_B Output Low
I=10 mA
IOH
STAT / POK_B Leakage Current
V=5 V
Battery Detection
IDETECT
Battery Detection Current before
Charge Done (Sink Current)
tDETECT
Battery Detection Time
Begins after Termination Detected
-1
mA
262
ms
Power Switches (see Error! Reference source not found.)
Q1 RDS(ON) Q1 On Resistance
175
260
m
Q2 RDS(ON) Q2 On Resistance
110
170
m
+7
%
Protection and Timers
VBUSOVP
VSHORT
ISHORT
ILIM(PTM)
TSHUTDWN
VBUS OVP Accuracy
VBUS Rising
-7
Hysteresis
VBUS Falling
Battery Short-Circuit Threshold
VBAT Rising
Hysteresis
VBAT Falling
Linear Charging Current
VBAT < VSHORT
100
2.10
Re-Enable
Threshold(4)
2.40
120
Production Test Mode Current
Limit
Thermal Shutdown Threshold(4)
2.27
mV
85
93
100
2.2
TJ Rising
130
TJ Falling
V
mV
mA
A
145
160
TCF
°C
TCF
Thermal Regulation Accuracy(4)
+10
°C
t32S
32-Second Timer
20.5
24.3
28.0
s
t30MIN
30-Minute Timer
30
38
45
min
tOSC
125 kHz Oscillator Tolerance
15
%
Relative to TCF Setting
Timing in all Sequencing Diagrams
-10
-15
Note:
4. Guaranteed by design; not tested in production.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
www.onsemi.com
6
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Electrical Specifications
Guaranteed by design.
Symbol
fSCL
tBUF
Parameter
SCL Clock Frequency
Bus-Free Time between STOP
and START Conditions
Conditions
Min.
tLOW
START or Repeated START
Hold Time
SCL LOW Period
100
Fast Mode
400
High-Speed Mode, CB < 100 pF
3400
High-Speed Mode, CB < 400 pF
1700
Standard Mode
4.7
Fast Mode
1.3
600
High-Speed Mode
160
Standard Mode
4.7
Fast Mode
1.3
High-Speed Mode, CB < 100 pF
160
High-Speed Mode, CB < 400 pF
320
tSU;STA
tSU;DAT
SCL HIGH Period
Repeated START Setup Time
Data Setup Time
600
High-Speed Mode, CB < 100 pF
60
High-Speed Mode, CB < 400 pF
120
Standard Mode
4.7
Fast Mode
600
High-Speed Mode
160
Standard Mode
250
Fast Mode
100
High-Speed Mode
tHD;DAT
tRCL
tFCL
tRDA
tRCL1
Data Hold Time
SCL Rise Time
SCL Fall Time
SDA Rise Time
Rise Time of SCL after a
Repeated START Condition
and after ACK Bit
kHz
s
ns
s
ns
s
4
Fast Mode
Unit
s
4
Fast Mode
Standard Mode
tHIGH
Max.
Standard Mode
Standard Mode
tHD;STA
Typ.
ns
s
ns
ns
10
Standard Mode
0
3.45
Fast Mode
0
900
High-Speed Mode, CB < 100 pF
0
70
High-Speed Mode, CB < 400 pF
0
150
Standard Mode
20+0.1CB
1000
Fast Mode
20+0.1CB
300
High-Speed Mode, CB < 100 pF
10
80
High-Speed Mode, CB < 400 pF
20
160
Standard Mode
20+0.1CB
300
Fast Mode
20+0.1CB
300
High-Speed Mode, CB < 100 pF
10
40
High-Speed Mode, CB < 400 pF
20
80
Standard Mode
20+0.1CB
1000
Fast Mode
20+0.1CB
300
High-Speed Mode, CB < 100 pF
10
80
High-Speed Mode, CB < 400 pF
20
160
s
ns
ns
ns
ns
Continued on the following page…
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
www.onsemi.com
7
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
I2C Timing Specifications
Guaranteed by design.
Symbol
Parameter
tFDA
Conditions
SDA Fall Time
tSU;STO
Stop Condition Setup Time
CB
Min.
Typ.
Max.
Standard Mode
20+0.1CB
300
Fast Mode
20+0.1CB
300
High-Speed Mode, CB < 100 pF
10
80
High-Speed Mode, CB < 400 pF
20
160
Standard Mode
4
Fast Mode
600
High-Speed Mode
160
Capacitive Load for SDA, SCL
Unit
ns
s
ns
400
pF
Timing Diagram
tF
tSU;STA
tBUF
SDA
tR
tSU;DAT
tHD;STO
tHIGH
SCL
tLOW
tHD;STA
tHD;DAT
tHD;STA
REPEATED
START
START
Figure 4.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
STOP
START
I2C Interface Timing for Fast and Slow Modes
www.onsemi.com
8
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
I2C Timing Specifications
Unless otherwise specified; circuit of Figure 2, VOREG=4.2 V, VBUS=5.0 V, and TA=25°C.
1.0
- 30C
- 40C
+25C
+25C
+85C
OREG Float Voltage Accuracy (%)
Charge Current Accuracy (%)
0
-2
-4
-6
-8
200
300
400
500
600
700
800
900
0.0
-0.5
-1.0
3.54
-10
100
+55C
+85C
0.5
1000
3.63
Figure 5.
3.72
3.81
3.90
3.99
4.08
4.17
4.26
4.35
4.44
OREG Setpoint (V)
IOCHARGE Setpoint (mA)
IOCHRG Accuracy Over-Temperature, 3.7 VBAT
Figure 6.
OREG Accuracy Over-Temperature,
IBAT=100 mA
10
3.9
-30C
-30C
+25C
+25C
+85C
Battery Discharge Current (A)
LDO Output Voltage (V)
3.6
3.3
3.0
2.7
8
+85C
6
4
2
0
2.4
0
20
40
60
80
2.4
100
Figure 7.
LDO Load Regulation, VOREG=VBAT=4.2 V
Figure 8.
Figure 9.
Charger Startup at VBUS Plug-In, 500 mA
IOCHRG, 3.2 VBAT, 1 k LDO Load, ILIM=DBP=1.8 V
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
2.7
3.0
3.3
3.6
3.9
4.2
4.5
Battery Voltage (V)
LDO Load Current (mA)
HZ / Sleep Mode Battery Discharge Current,
VBUS Open, DIS=SDA=SCL=0 V
Figure 10. Charger Startup at VBUS Plug-In Using
150 mA Current Limited Source, 3.2 VBAT, 500 mA
IOCHRG, 1 kLDO Load, ILIM=DBP=1.8 V
www.onsemi.com
9
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Typical Characteristics
Unless otherwise specified; circuit of Figure 2, VOREG=4.2 V, VBUS=5.0 V, and TA=25°C.
Figure 11. Charger Startup Using HZ Bit Reset, 3.7 VBAT,
500 mA IOCHRG, 1 kΩ LDO Load, ILIM=DBP=1.8 V
Figure 14. VBUS OVP Response while Charging,
3.7 VBAT, 500 mA IOCHRG, 1 kΩ LDO Load,
ILIM=DBP=1.8 V
Figure 13. Charger Startup at VBUS Plug-In with
No Battery, 300 Ω LDO Load, ILIM=DBP=0 V
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
Figure 12. Charger Startup at VBUS Plug-In with
Dead Battery (Protection Switch Open), 1 kΩ LDO
Load, ILIM=DBP=0 V
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10
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Typical Characteristics
Unless otherwise specified; circuit of Figure 2, VOREG=4.2 V, VBUS=5.0 V, and TA=25°C.
Figure 15. Battery Removal/Insertion while Charging,
3.7 VBAT, 500 mA IOCHRG, ILIM=DBP=1.8 V,
ITERM_DIS=0
Figure 17.
Figure 16. Battery Removal/Insertion while Charging,
3.7 VBAT, 500 mA IOCHRG, ILIM=DBP=1.8 V, ITERM_DIS=1
1.2 A Load Pulse, tR=tF=5 s, 4.19 VBAT,
1.0 A IOCHRG
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
Figure 18. 1.2 A Load Pulse, tR=tF=5 s, 500 mA Current
Limited Source, 4.2 VBAT, 1.0 AIOCHRG, 4.32 VBUS_REF
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11
FAN54110 — USB-Compatible Single-Cell Li-Ion Charger with DBP
Typical Characteristics
VBUS Insertion
The FAN54110 is a USB-compatible single-cell Li-Ion
charger with support for Dead Battery Provision (DBP) and a
maximum charge current rated at 1 A.
The FAN54110 conforms to all the requirements for the DBP
within the BC1. 2 specifications, including a 30-minute timer
that cannot exceed 45 minutes.
When the IC detects that VBUS has risen above VIN(MIN)1,
adapter validation and battery voltage detection will occur
before charging begins. To pass validation, VBUS must
remain above VIN(MIN)1 and below VBUSOVP for tVBUS_VALID
before the IC initiates charging. Refer to Figure 20 and
Figure 21 for details.
The FAN54110 is designed to be stable with space-saving
ceramic capacitors and is available in a 15-bump, 0.4 mm
pitch, WLCSP.
If VBUS is validated, the POK_B pin pulls LOW and an
interrupt is issued to indicate to the system that VBUS is
connected. This point is considered to be VBUS_POR.
If VBUS fails validation, the POK_B pin remains HIGH and
an interrupt is issued. Re-validation is attempted every two
seconds.
Setting the HZ_MODE bit or DIS pin prevents validation from
occurring after VBUS rises above VIN(MIN)1, but, VBUS
validation will be performed prior to entering Charge State
from any state where the charger is off.
VBUS_OVP
4.4V
VBUS
LDO
STAT
POK_B
VBUS_CON
load_vbat
load_vbus
STATE
SLEEP
DEBOUNCE
SYS_CAP DISCHARGE
VBUS_VAL
WAIT
32ms
256ms
32ms
4ms
CHARGE
VBUS_POR
Figure 19.
VBUS Plug-In Timing: DIS=0, HZ_MODE=0, DBP=1
4.4V
VBUS
LDO
VBUS_CON
STAT
POK_B
STATE
SLEEP
DEBOUNCE
HZ_STATE
32ms
VBUS_POR
Figure 20. VBUS Plug-In Timing:
DIS=1 or (DBP=1 and HZ_MODE=1)
© 2013 Semiconductor Components Industries, LLC.
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12
FAN54110 — USB-Compliant Single-Cell Li-Ion Charger with DBP
Charger Circuit Details
Basic Operation
If the DBP pin is HIGH at VBUS_POR, the IC operates in
accordance with its I2C register settings and starts the t32s
timer when charging begins. This is the normal operating
mode for the FAN54110.
Charging Stages
Figure 21 shows the different charging stages when a
battery is present and discharged below 2.25 V.
If the DBP pin is LOW at VBUS_POR or the DBP pin
transitions from HIGH to LOW when VBUS is valid, the
FAN54110:
Resets its registers to default values
Charges with its charge current limit set by the state of
the ILIM pin:
ILIM= LOW, IOCHRG=100 mA
ILIM= HIGH, IOCHRG=350 mA
Starts the t30MIN timer
Sources 0.6 V to the D+ pin
PRE-CHARGE is when the battery voltage is below VSHORT
and a current of ISHORT is used to charge the battery above
VSHORT. This stage is typically used to recover a deeply
discharge battery with its protection switch open.
CURRENT REGULATION increases charging current
considerably above ISHORT to a programmable IOCHARGE (Reg
03h[7:4]) level.
VOLTAGE REGULATION occurs during charging when
VBAT reaches VOREG (Reg4[5:0]). The current charging
the battery is reduced, limited by the battery’s ESR and its
internal cell voltage.
BC1.2 and USB 2.0 allow a portable device (defined as a
device with a battery) with a dead battery to take a maximum
of 100 mA from the USB VBUS line for a maximum of 45
minutes as long as the portable device forces the D+ line to
0.6 V typical.
Once DBP transitions from LOW to HIGH, D+ is three-stated
and charge parameters may be programmed by the host.
Charge current remains controlled by the state of the ILIM
pin and the t30MIN timer continues running until the first I2C
write occurs; at which time, charge current is controlled by
the IOCHARGE (Reg03h[7:4]) bits and the timer changes to
t32S.
If ITERM_DIS (Reg03h[0])=0, charging current
decreases to ITERM (Reg03h[3:0]), where Charge
Termination occurs.
If ITERM_DIS=1 (default configuration), charging will
continue past ITERM until current decreases to 0A, where
the part will remain in Charge Mode with the t 32S timer
running.
VOREG
ICHARGE
IOCHARGE
V BA
The ILIM and DBP pins are internally pulled down and there is
typically nothing to force them HIGH at this point due to the
processor / system not yet being awake. When the t30MIN timer
expires, the FAN54110 removes the 0.6 V from D+ and stops
charging. The D+ pin is three-stated when DBP is HIGH.
T
ITERM
VSHORT
ISHORT
Battery Absent at VBUS Insertion
Before charging begins, if VBAT is below VSHORT, the
FAN54110 will determine whether the battery is absent or
present.
PRECHARGE
CURRENT REGULATION
Figure 21.
To accomplish this, the IC temporarily raises VOREG to 4.0 V
after VBAT has risen above VSHORT. If VBAT remains below
3.7 V for more than 128 ms, the battery is present. If VBAT is
above 3.7 V after 128 ms, the battery is assumed absent.
VOLTAGE
REGULATION
Typical Charge Profile
Charge Termination
During Voltage Regulation, charging continues until the IBAT
< ITERM. If ITERM_DIS=0, charging stops and the t32S timer
continues counting. The STAT pin remains LOW until the IC
determines whether the IBAT < ITERM condition was caused by
VBUS removal, Battery Removal, or by the battery being
fully charged (Charge Termination).
If battery absence is detected, all registers are reset to their
default values, the NOBAT bit is set, and an interrupt is
generated. Also, it is assumed the DBP pin is LOW since the
system was without a power source prior to plug in. The
FAN54110 will provide power to the system with STAT HIGH
in DBP Mode until otherwise instructed through I 2C
commands. This allows the host processor an opportunity to
detect charger type and negotiate with the USB host for
higher current.
The IC continues to provide current, provided that:
During Charge Termination, the t32S timer will continue
running, but, if it expires will not reset all registers until
Recharge. Setting the TMR_RST bit (Reg8[7]) during
Charge Termination will reset the t32S timer. Refer to the
Timers section for more details.
a timer (t30MIN or t32S) is running
Recharge from Charge Termination
HZ_MODE (Reg=01h[6])=0 and DIS=LOW.
During Charge Termination, if VBAT falls by VRCH below
VOREG, charging starts again.
© 2013 Semiconductor Components Industries, LLC.
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13
FAN54110 — USB-Compliant Single-Cell Li-Ion Charger with DBP
The current drawn from VBUS is determined by either the
state of ILIM pin or the IOCHARGE programming.
VBUS POR and DBP Charging
ceases and the part will enter the IDLE State where all
registers are reset. Only a new VBUS_POR will return the IC
to charging.
Battery Removal during Charging
During unattended charging, if the DBP pin transitions from
LOW to HIGH (due to the host waking up and controlling the
charger):
When ITERM_DIS=0 and the charge current drops below
the ITERM setting, a load current (IDETECT) is placed on VBAT in
order to determine if the battery was removed during
charging. If the battery is determined to be present, the load
is removed, and Charge Done State is entered. If the battery
is determined to be absent, the IC enters a fault state, which
waits with the charger disabled for two seconds, then restarts the charger validation process.
If the battery is determined to be present, the load is
removed, and Charge Termination occurs.
If the battery is determined to be absent, charging is
disabled, all registers except ITERM_DIS are reset to
default values, the NOBAT interrupt bit is set, and the
STAT pin rises. After 2s, the charger will restart
validation and if the battery is re-inserted, the IC will
return to Charge State.
If VBATVSHORT, the t30MIN timer will continue running
until the first I2C write. Then the t30MIN will stop and
the t32S timer is started.
VBUS Over-Voltage
The FAN54110 contains programmable Over-Voltage
Protection (OVP) on VBUS, ranging from 6.5 V to 8.0 V, as
specified in the VBUSOVP (Reg01h[2:1) bits with a default
setting of 7 V. If OVP is detected, the FAN54110 terminates
charging functionality if charging is active when OVP is
detected. The FAN54110 interrupts the host when the OVP
event occurs and sets the OVP_FLAG bit.
Dynamic Input Voltage Control (DIVC)
VBUS is typically 5 V +5% / -10%, depending on the charging
current. If the FAN54110 is programmed to a higher current
than the charger can support, a regulation control actively
regulates the charging current to maintain at least 4.32V
(typical) on VBUS. This level is controlled via the
VBUS_REF (Reg02h[3:2]) bits. The FAN54110 reduces the
charging current to ensure VBUS is maintained above the
VBUS_REF setting. The DIVC regulation loop is enabled by
default and disabled with the VBUS_REG (Reg01h[5]) bit.
In response to VBAT collapsing, though, the system
electronics have likely lowered the DBP pin which will reset
all registers. As a result, the ITERM_DIS bit will be reset to
1, which will set the unloaded VBAT pin to output 3.54V (the
default VOREG setting) and place the IC in Charge State with
the NOBAT bit remaining set until the next VBUS_POR
validation.
VBUS Removal and SLEEP
When VBUS falls below either VIN(MIN)2 or VBAT, the IC ceases
charging, the POK_B pin sets HIGH, and an interrupt occurs
to indicate to the system that VBUS has been removed. The
IC then enters the Sleep State.
If DIVC is disabled, the charging cycle stops when V BUS falls
below the VBUS valid falling threshold (VINMIN2) or below VBAT.
Charging remains stopped until VBUS rises above the rising
VBUS valid threshold (VINMIN1) and stays above this threshold.
LDO
Thermal Regulation and Shutdown
The FAN54110 provides a regulated 3.3 V LDO output when
a valid VBUS condition exists to power the USB PHY.
Regulation occurs within 5 ms of valid VBUS being applied.
The thermal regulation loop is enabled if the junction
temperature reaches the threshold defined by the TCF
(Reg02h[5:4]) bits. When TCF is reached, the FAN54110
reduces the charging current to 90 mA until the junction
temperature falls below TCF. Charge current is then
incremented in 1 ms steps until the IOCHRG level is reached.
This algorithm allows for the fastest recovery from a thermal
regulation event while averaging a current that keeps the
temperature below TCF.
LDO load current is derived from VBUS and is subject to the
IOCHARGE setting / limit. Available battery charging current is
reduced by the LDO load current.
Charger/Battery/System Protections
Timers
The FAN54110 terminates charging completely if the
junction temperature exceeds TSHUTDWN (145°C).
There are two timers on the FAN54110; t32S and the t30MIN.
The t32S timer is for normal operation where the DBP pin is
HIGH. When charging begins after a VBUS_POR with the
DBP pin HIGH, the t32S timer is started. If the t32S timer is
allowed to expire, charging ceases and the part will enter the
IDLE State where all registers are reset. A write to any
register can return the IC to charging. To avoid a t 32S timer
fault, the host must reset the timer by periodically setting the
TMR_RST (Reg08h[7]) bit before it expires.
In both cases, the temperature event is indicated via the
TREG_FLAG
and
TSD_FLAG
bits
in
the
FAULT_INTERRUPT (Reg05h) register. Recovery from
either event is indicated via the OT_RECOV bit in the same
register.
Additional JA data points, measured using the FAN54110
evaluation board, are given in the table below (measured
with TA=25°C). Note that as power dissipation increases, the
effective JA decreases due to the larger difference between
the die temperature and ambient.
The t30MIN timer is for unattended charging. If VBATVBUS>VIIN(MIN)1 at VBUS POR from VBUS Insertion.
0 when VBUS is disconnected.
VBUS_CON does not de-assert when a VBUS_OVP condition
occurs after VBUS validation is successful.
7
4
Reserved
R
6
POK_B
State of the POK_B pin
5
VALIDATION
FAIL
1 indicates VBUS validation is attempted and failed. After a
failure, VBUS validation is attempted every two seconds.
This bit returns 0 when read.
A mask bit of 1 prevents an interrupt pulse from being generated on the STAT pin. The
INTERRUPT (Reg01h[0]) bit and corresponding VBUS_STAT bit are still written.
See the Charging Status and Interrupt Reporting section for details.
Table 15. VBUS Interrupt Mask Bits
3:1
0
VBUS_MASK
Reserved
TMR_RST
R/W
R
Bit #
Mask
3
VBUS_CON MASK
2
POK_B MASK
1
VALIDATION FAIL MASK
This bit returns 0 when read.
Register Address: 08h
Default=0000 0000 (00h)
7
TMR_RST
W
Setting this bit to 1 resets the t32s timer, allowing the IC to continue charging under control of
the I2C host.
This bit returns 0 when read
6:0
Reserved
R
These bits return 0 when read.
MONITOR0
Register Address: 10h
7
ITERM_CMP
R
6
VBUS_VBAT
R
0:
1:
VBUS < VBAT
VBUS > VBAT
5
VSHORT
R
0:
1:
VBAT > VSHORT or IC is not charging.
VBAT < VSHORT and IC is charging.
4
DIS_LEVEL
R
0:
1:
DIS pin is LOW. This bit always reads 0 when VBUS is disconnected.
DIS pin is HIGH.
Reserved
R
This bit returns 0 when read.
1
ICHG
R
0:
1:
0
CV
R
0: Charger is not in Constant Voltage (CV) Mode. Charger is either off or another loop
(VBUS or ICHG) is limiting charge current.
1: Charger is on and in Constant Voltage (CV) Mode.
3:2
IBAT < ITERM reference
IBAT > ITERM reference
Default=1000 0010 (82h)
0:
1:
ICHG loop is controlling the charge current.
ICHG loop is not limiting the charge current.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
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22
FAN54110 — USB-Compliant Single-Cell Li-Ion Charger with DBP
STATUS_INTERRUPT
Bypass capacitors should be placed as close to the IC as possible. All power and ground pins should be routed to their bypass
capacitors using top copper. Copper area connecting to the IC should be maximized to improve thermal performance.
Figure 29.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
Recommended PCB Layout
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23
FAN54110 — USB-Compliant Single-Cell Li-Ion Charger with DBP
PCB Layout Recommendations
FAN54110 — USB-Compliant Single-Cell Li-Ion Charger with DBP
Physical Dimensions
0.03 C
E
2X
A
F
1.20
B
A1
BALL A1
INDEX AREA
0.40
1.20 0.40
D
(Ø0.200)
Cu Pad
(Ø0.300)
Solder Mask
0.03 C
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
2X
TOP VIEW
0.06 C
0.625
0.547
0.05 C
C
D
0.378±0.018
0.208±0.021
E
SEATING PLANE
SIDE VIEWS
NOTES
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
1.20
0.005
C A B
Ø0.260±0.02
D 15X
C
B
(Y) ±0.018
A
0.40
1.20
0.40
C. DIMENSIONS AND TOLERANCE
PER ASMEY14.5M, 1994.
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
E. PACKAGE NOMINAL HEIGHT IS
586 ± 39 MICRONS (547-625 MICRONS).
F
1 2 3 4
(X) ±0.018
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
BOTTOM VIEW
Figure 30.
G. DRAWING FILNAME: MKT-UC015AArev1.
15-Ball WLCSP, 0. 4 mm Pitch, 250 m Balls
Product-Specific Dimensions
D
E
X
Y
1. 560 ±0.030
1. 560 ± 0.030
0.180
0.180
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the
most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specifically the
warranty therein, which covers ON Semiconductor products.
© 2013 Semiconductor Components Industries, LLC.
FAN54110 • Rev. 2
www.onsemi.com
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