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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
FCP130N60
N- 沟道 SuperFET® II MOSFET
600 V, 28 A, 130 mΩ
特性
描述
• 650 V @ TJ = 150 °C
SuperFET® II MOSFET 是飞兆利用电荷平衡技术实现出色的低
导通电阻和更低栅极电荷性能的全新高压超级结 (SJ) MOSFET
系列产品。这项先进技术专用于最小化传导损耗,提供卓越的开
关性能,并能够承受极端 dv/dt 额定值和更高雪崩能量。因此,
SuperFET II MOSFET 适用于系统小型化和高效化的各种各样的
AC-DC 功率转换的应用中。
• 典型值 RDS(on) = 112 mΩ
• 超低栅极电荷 (典型值 Qg=54 nC)
• 低有效输出电容 (典型值 Coss(eff.)= 240 pF)
• 100% 经过雪崩测试
• 符合 RoHS 标准
应用
• 通信 / 服务器电源
• 工业电源
D
GD
S
G
TO-220
S
最大绝对额定值 TC = 25 °C 除非另有说明。
符号
漏极-源极电压
VGSS
栅极-源极电压
ID
漏极电流
IDM
漏极电流
EAS
IAR
EAR
dv/dt
FCP130N60
600
参数
VDSS
- DC
±20
- AC
(f > 1 Hz)
- 连续 (TC = 25 °C)
28
- 连续 (TC = 100 °C)
18
V
A
(注 1)
84
A
单脉冲雪崩能量
(注 2)
720
mJ
雪崩电流
(注 1)
6
A
重复雪崩能量
MOSFET dv/dt
(注 1)
2.78
mJ
二极管恢复 dv/dt 峰值
(注 3)
- 脉冲
100
20
V/ns
(TC = 25 °C)
278
W
- 高于 25 °C 的功耗系数
2.2
W/°C
-55 至 +150
300
°C
FCP130N60
单位
PD
功耗
TJ, TSTG
工作和存储温度范围
用于焊接的最大引脚温度,距离外壳 1/8”,持续 5 秒
TL
±30
单位
V
°C
热性能
符号
参数
RθJC
结至外壳热阻最大值
0.45
RθJA
结至环境热阻最大值
40
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
1
°C/W
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
2015 年 3 月
器件编号
FCP130N60
顶标
FCP130N60
封装
TO-220
包装方法
塑料管
卷尺寸
不适用
带宽
不适用
数量
50 个
电气特性 TC = 25 °C 除非另有说明。
符号
参数
测试条件
最小值
典型值
最大值
VGS = 0 V, ID = 10 mA, TJ = 25 °C
600
-
-
VGS = 0 V, ID = 10 mA, TJ = 150 °C
650
-
-
-
0.67
-
单位
关断特性
BVDSS
漏极-源极击穿电压
ΔBVDSS
/ ΔTJ
击穿电压温度系数
IDSS
零栅极电压漏极电流
IGSS
ID = 10 mA,参考 25 °C 数值
V
V/°C
VDS = 600 V, VGS = 0 V
-
-
1
VDS = 480 V, VGS = 0 V, TC = 125 °C
-
1.3
-
栅极-体漏电流
VGS = ±20 V, VDS = 0 V
-
-
±100
VGS(th)
RDS(on)
栅极阈值电压
VGS = VDS, ID = 250 μA
2.5
-
3.5
V
漏极至源极静态导通电阻
VGS = 10 V, ID = 14 A
-
112
130
mΩ
gFS
正向跨导
VDS = 20 V, ID = 14 A
-
26
-
S
VDS = 380 V, VGS = 0 V,
f = 1 MHz
-
2700
3590
pF
-
65
85
pF
-
2.85
-
pF
μA
nA
导通特性
动态特性
Ciss
输入电容
Coss
输出电容
Crss
反向传输电容
Coss(eff.)
有效输出电容
VDS = 0 V 至 480 V, VGS = 0 V
-
240
-
pF
VDS = 380 V, ID = 14 A,
VGS = 10 V
-
54
70
nC
-
12
-
nC
-
14
-
nC
-
1
-
Ω
-
25
60
ns
-
16
42
ns
-
65
140
ns
-
4
18
ns
Qg(tot)
10 V 的栅极电荷总量
Qgs
栅极-源极栅极电荷
Qgd
栅极-漏极 “ 米勒 ” 电荷
ESR
等效串联电阻
(注 4)
f = 1 MHz
开关特性
td(on)
导通延迟时间
tr
导通上升时间
td(off)
关断延迟时间
tf
关断下降时间
VDD = 380 V, ID = 14 A,
VGS = 10 V, Rg = 4.7 Ω
(注 4)
漏极-源极二极管特性
IS
漏极-源极二极管最大正向连续电流
-
-
28
A
ISM
漏极-源极二极管最大正向脉冲电流
-
-
84
A
VSD
漏极-源极二极管正向电压
VGS = 0 V, ISD = 14 A
-
-
1.2
V
trr
反向恢复时间
-
376
-
ns
Qrr
反向恢复电荷
VGS = 0 V, ISD = 14 A,
dIF/dt = 100 A/μs
-
7.6
-
μC
注:
1. 重复额定值:脉冲宽度受限于最大结温。
2. IAS = 6 A, VDD = 50 V, RG = 25 Ω,开始于 TJ = 25 °C。
3. ISD ≤ 14 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS,开始于 TJ = 25 °C。
4. 典型特性本质上独立于工作温度。
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
2
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
封装标识与定购信息
图 1. 导通区域特性
图 2. 传输特性
200
100
*Notes:
1. VDS = 20V
2. 250μs Pulse Test
ID, Drain Current[A]
ID, Drain Current[A]
100
10
VGS = 10.0V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
*Notes:
1. 250μs Pulse Test
o
2. TC = 25 C
1
0.3
1
10
VDS, Drain-Source Voltage[V]
o
150 C
o
o
-55 C
1
20
25 C
10
2
图 3. 导通电阻变化与
漏极电流和栅极电压的关系
0.30
200
100
o
IS, Reverse Drain Current [A]
RDS(ON) [Ω],
Drain-Source On-Resistance
0.25
0.20
VGS = 10V
VGS = 20V
0.10
0
30
60
ID, Drain Current [A]
*Notes:
1. VGS = 0V
2. 250μs Pulse Test
10
o
150 C
1
o
25 C
0.1
0.01
0.001
0.0
90
图 5. 电容特性
Capacitances [pF]
VGS, Gate-Source Voltage [V]
10
Ciss
1000
Coss
100
*Note:
1. VGS = 0V
2. f = 1MHz
10
1
Crss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
0.1 -1
10
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
0
1
0.3
0.6
0.9
1.2
VSD, Body Diode Forward Voltage [V]
1.5
图 6. 栅极电荷特性
100000
10000
7
图 4. 体二极管正向电压
变化与源极电流和温度的关系
*Note: TC = 25 C
0.15
3
4
5
6
VGS, Gate-Source Voltage[V]
2
10
10
10
VDS, Drain-Source Voltage [V]
3
VDS = 120V
8
VDS = 300V
6
VDS = 480V
4
2
0
600
*Note: ID = 14A
0
12
24
36
48
Qg, Total Gate Charge [nC]
60
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
典型性能特征
图 7. 击穿电压变化与温度的关系
图 8. 导通电阻变化与温度的关系
2.5
*Notes:
1. VGS = 0V
2. ID = 10mA
RDS(on), [Normalized]
Drain-Source On-Resistance
BVDSS, [Normalized]
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
0.8
-100
-50
0
50
100
150
o
TJ, Junction Temperature [ C]
*Notes:
1. VGS = 10V
2. ID = 14A
2.0
1.5
1.0
0.5
-100
200
图 9. 最大安全工作区
200
图 10. 最大漏极电流与壳温的关系
200
35
100
10μs
28
100μs
10
ID, Drain Current [A]
ID, Drain Current [A]
-50
0
50
100
150
o
TJ, Junction Temperature [ C]
1ms
Operation in This Area
is Limited by R DS(on)
DC
1 *Notes:
o
1. TC = 25 C
21
14
7
o
0.1
2. TJ = 150 C
3. Single Pulse
1
10
100
VDS, Drain-Source Voltage [V]
0
25
1000
50
75
100
125
o
TC, Case Temperature [ C]
150
图 11. Eoss 与漏源极电压的关系
15
EOSS, [μJ]
12
9
6
3
0
0
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
120
240
360
480
VDS, Drain to Source Voltage [V]
600
4
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
典型性能特征 (接上页)
FCP130N60 — N- 沟道 SuperFET® II MOSFET
典型性能特征 (接上页)
图 12. 瞬态热响应曲线
o
ZθJC(t), Thermal Response [ C/W]
1
0.5
0.1
0.2
0.1
0.01
t1
0.02
0.01
*Notes:
Single pulse
0.001
-5
10
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
PDM
0.05
t2
o
1. ZθJC(t) = 0.45 C/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
-4
10
-3
-2
10
10
t1, Rectangular Pulse Duration [sec]
5
-1
10
1
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
图 13. 栅极电荷测试电路与波形
图 14. 阻性开关测试电路与波形
图 15. 非箝位电感开关测试电路与波形
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
6
www.fairchildsemi.com
FCP130N60 — N- 沟道 SuperFET® II MOSFET
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
图 16. 二极管恢复 dv/dt 峰值测试电路与波形
© 2014 飞兆半导体公司
FCP130N60 Rev. C1
7
www.fairchildsemi.com
SUPPLIER "B" PACKAGE
SHAPE
3.50
10.67
9.65 E
SUPPLIER "A" PACKAGE
SHAPE
3.40
2.50
16.30
13.90
IF PRESENT, SEE NOTE "D"
16.51
15.42
E
9.40
8.13 E
1
[2.46]
2
3
C
4.10
2.70
14.04
12.70
2.13
2.06
FRONT VIEWS
4.70
4.00
1.62 H
1.42
"A1"
8.65
7.59
SEE NOTE "F"
1.62
1.10
2.67
2.40
1.00
0.55
6.69
6.06
OPTIONAL
CHAMFER
E
14.30
11.50
NOTE "I"
BOTTOM VIEW
3
0.60
0.36
SIDE VIEW
2.85
2.10
2
1
BACK VIEW
NOTES:
A) REFERENCE JEDEC, TO-220, VARIATION AB
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS COMMON TO ALL PACKAGE
SUPPLIERS EXCEPT WHERE NOTED [ ].
D) LOCATION OF MOLDED FEATURE MAY VARY
(LOWER LEFT CORNER, LOWER CENTER
AND CENTER OF THE PACKAGE)
E DOES NOT COMPLY JEDEC STANDARD VALUE.
F) "A1" DIMENSIONS AS BELOW:
SINGLE GAUGE = 0.51 - 0.61
DUAL GAUGE = 1.10 - 1.45
G) DRAWING FILE NAME: TO220B03REV9
H PRESENCE IS SUPPLIER DEPENDENT
I) SUPPLIER DEPENDENT MOLD LOCKING HOLES
IN HEATSINK.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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