FCPF11N60T

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FCP11N60/FCPF11N60 General Description Features SuperFET® MOSFET is Fairchild Semiconductor’s first genera-tion of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switch-ing performance, dv/dt rate and higher avalanche energy. Con-sequently, SuperFET MOSFET is very suitable for the switching power applications such as PFC, server/telecom power, FPD TV power, ATX power and industrial power applications. • • • • • • 650V @Tj = 150°C Typ. Rds(on)=0.32Ω Ultra low gate charge (typ. Qg=40nC) Low effective output capacitance (typ. Coss.eff=95pF) 100% avalanche tested RoHS Compliant D GD S G G D S TO-220 TO-220F S Absolute Maximum Ratings Symbol TC = 25°C unless otherwise noted ID Drain Current Parameter - Continuous (TC = 25°C) FCP11N60 11 IDM Drain Current - Pulsed VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 11 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 12.5 4.5 mJ V/ns W W/°C °C - Continuous (TC = 100°C) dv/dt PD TJ, TSTG TL (Note 1) FCPF11N60 11* Units A 7 7* A 33 33* A (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 125 1.0 ± 30 V 340 mJ 36 0.29 -55 to +150 300 °C * Drain current limited by maximum junction termperature Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case RθCS Thermal Resistance, Case-to-Sink RθJA Thermal Resistance, Junction-to-Ambient ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 FCP11N60 1.0 1 FCPF11N60 3.5 Units °C/W 0.5 -- °C/W 62.5 62.5 °C/W www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET March 2014 Part Number FCP11N60 Top Mark FCP11N60 Package TO-220 FCPF11N60 FCPF11N60 FCPF11N60T FCPF11N60T Electrical Characteristics Symbol Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units TO-220F Tube N/A N/A 50 units TO-220F Tube N/A N/A 50 units TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units VGS = 0 V, ID = 250 µA, TJ = 25°C VGS = 0 V, ID = 250 µA, TJ = 150°C 600 -- -- V -- 650 -- V Off Characteristics BVDSS Drain-Source Breakdown Voltage ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.6 -- V/°C BVDS Drain-Source Avalanche Breakdown Voltage VGS = 0 V, ID = 11 A -- 700 -- V VDS = 600 V, VGS = 0 V -- -- 1 µA VDS = 480 V, TC = 125°C -- -- 10 µA IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 3.0 -- 5.0 V -- 0.32 0.38 Ω -- 9.7 -- S -- 1148 1490 pF -- 671 870 pF -- 63 82 pF -- 35 -- pF -- 95 -- pF -- 34 80 ns -- 98 205 ns -- 119 250 ns On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 5.5 A gFS Forward Transconductance VDS = 40 V, ID = 5.5 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Coss eff. Effective Output Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz VDS = 480 V, VGS = 0 V, f = 1.0 MHz VDS = 0V to 480 V, VGS = 0 V Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 300 V, ID = 11 A, RG = 25 Ω (Note 4, 5) VDS = 480 V, ID = 11 A, VGS = 10 V (Note 4, 5) -- 56 120 ns -- 40 52 nC -- 7.2 -- nC -- 21 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 11 ISM -- -- 33 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 11 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 390 -- ns Qrr Reverse Recovery Charge -- 5.7 -- µC VGS = 0 V, IS = 11 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. IAS = 5.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 11A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 2 www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Package Marking and Ordering Information 2 10 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top : ID, Drain Current [A] 1 10 ID , Drain Current [A] 1 10 0 10 * Notes : 1. 250 µs Pulse Test o 2. TC = 25 C -1 10 -1 0 10 o o 25 C 0 10 -55 C * Note 1. VDS = 40V 2. 250 µs Pulse Test -1 10 1 10 o 150 C 10 VDS, Drain-Source Voltage [V] 2 4 6 8 10 VGS , Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.8 IDR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 1.0 VGS = 10V 0.6 VGS = 20V 0.4 0.2 1 10 0 10 o o 150 C 25 C * Notes : 1. VGS = 0V 2. 250 µs Pulse Test o * Note : TJ = 25 C 0.0 0 5 10 15 20 25 30 35 -1 10 40 ID, Drain Current [A] 0.2 VGS , Gate-Source Voltage [V] Crss Capacitance [pF] 0 -1 10 0 10 1.4 1.6 VDS = 100V * Notes : 1. VGS = 0 V 2. f = 1 MHz Ciss 1000 1.2 VDS = 250V 10 Coss 2000 1.0 12 4000 3000 0.8 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 5000 0.6 VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 6000 0.4 VDS = 400V 8 6 4 2 * Note : ID = 11A 0 1 10 0 5 10 15 20 25 30 35 40 45 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 3 www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 * Notes : 1. VGS = 0 V 2. ID = 250 µA 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 * Notes : 1. VGS = 10 V 2. ID = 5.5 A 0.5 0.0 -100 200 -50 o 100 150 Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 2 2 10 100 us 1 ID, Drain Current [A] 10 ms * Notes : o 1. TC = 25 C -1 10 100 us 1 DC 10 Operation in This Area is Limited by R DS(on) 10 1 ms 0 200 o Operation in This Area is Limited by R DS(on) 10 ID, Drain Current [A] 50 TJ, Junction Temperature [ C] 10 o 2. TJ = 150 C 3. Single Pulse 1 ms 10 ms 100 ms 0 10 DC * Notes : o 1. TC = 25 C -1 10 o 2. TJ = 150 C 3. Single Pulse -2 10 0 TJ, Junction Temperature [ C] -2 0 1 10 2 10 10 3 10 10 VDS, Drain-Source Voltage [V] 0 10 1 10 2 10 3 10 VDS, Drain-Source Voltage [V] Figure 9-1. Maximum Safe Operating Area for FCP11N60 Figure 9-2. Maximum Safe Operating Area for FCPF11N60 12.5 ID, Drain Current [A] 10.0 7.5 5.0 2.5 0.0 25 50 75 100 125 150 o TC, Case Temperature [ C] Figure 10. Maximum Drain Current vs. Case Temperature ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 4 www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Typical Characteristics (Continued) 0 10 D = 0 .5 0 .2 10 * N o te s : o 1 . Z θ J C ( t) = 1 .0 C /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .1 -1 0 .0 5 0 .0 2 PDM 0 .0 1 θJ C Z (t), T h e rm a l R e s p o n s e FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Typical Characteristics 10 t1 s in g le p u ls e -2 10 -5 10 -4 10 -3 10 -2 10 t2 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] D = 0 .5 10 0 0 .2 0 .1 * N o te s : o 1 . Z θ J C ( t) = 3 .5 C /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .0 5 10 -1 0 .0 2 PDM 0 .0 1 t1 θJ C Z (t), T h e rm a l R e s p o n s e Figure 11-1. Transient Thermal Response Curve for FCP11N60 s in g le p u ls e 10 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11-2. Transient Thermal Response Curve for FCPF11N60 ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 5 www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Figure 12. Gate Charge Test Circuit & Waveform 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Figure 13. Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 10V 10% td(on) tr td(off) t on t off tf Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG VDD ID (t) tp ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 VDS (t) VDD DUT 10V tp 6 Time www.fairchildsemi.com FCP11N60 / FCPF11N60 — N-Channel SuperFET® MOSFET Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2008 Fairchild Semiconductor Corporation FCP11N60/FCPF11N60 Rev. C0 7 www.fairchildsemi.com SUPPLIER "B" PACKAGE SHAPE 3.50 10.67 9.65 E SUPPLIER "A" PACKAGE SHAPE 3.40 2.50 16.30 13.90 IF PRESENT, SEE NOTE "D" 16.51 15.42 E 9.40 8.13 E 1 [2.46] 2 3 C 4.10 2.70 14.04 12.70 2.13 2.06 FRONT VIEWS 4.70 4.00 1.62 H 1.42 "A1" 8.65 7.59 SEE NOTE "F" 1.62 1.10 2.67 2.40 1.00 0.55 6.69 6.06 OPTIONAL CHAMFER E 14.30 11.50 NOTE "I" BOTTOM VIEW 3 0.60 0.36 SIDE VIEW 2.85 2.10 2 1 BACK VIEW NOTES: A) REFERENCE JEDEC, TO-220, VARIATION AB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS COMMON TO ALL PACKAGE SUPPLIERS EXCEPT WHERE NOTED [ ]. D) LOCATION OF MOLDED FEATURE MAY VARY (LOWER LEFT CORNER, LOWER CENTER AND CENTER OF THE PACKAGE) E DOES NOT COMPLY JEDEC STANDARD VALUE. F) "A1" DIMENSIONS AS BELOW: SINGLE GAUGE = 0.51 - 0.61 DUAL GAUGE = 1.10 - 1.45 G) DRAWING FILE NAME: TO220B03REV9 H PRESENCE IS SUPPLIER DEPENDENT I) SUPPLIER DEPENDENT MOLD LOCKING HOLES IN HEATSINK. B A 10.36 9.96 B 3.28 3.08 7.00 3.40 3.20 2.66 2.42 0.70 SEE NOTE "F" SEE NOTE "F" 6.88 6.48 1 X 45° B 16.00 15.60 16.07 15.67 (3.23) B 1 2.14 3 1.47 1.24 2.96 2.56 0.90 0.70 10.05 9.45 0.50 M A 30° 0.45 0.25 2.54 B 2.54 B 4.90 4.50 NOTES: A. EXCEPT WHERE NOTED CONFORMS TO EIAJ SC91A. B DOES NOT COMPLY EIAJ STD. VALUE. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS. E. DIMENSION AND TOLERANCE AS PER ASME Y14.5-1994. F. OPTION 1 - WITH SUPPORT PIN HOLE. OPTION 2 - NO SUPPORT PIN HOLE. G. DRAWING FILE NAME: TO220M03REV5 0.60 0.45 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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