Is Now Part of
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FDB0190N807L
N-Channel PowerTrench® MOSFET
80 V, 270 A, 1.7 mΩ
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advance PowerTrench® process that has
been especially tailored to minimize the on-state resistance
while maintaining superior ruggedness and switching
performance for industrial applications.
Max rDS(on) = 1.7 mΩ at VGS = 10 V, ID = 34 A
Max rDS(on) = 2 mΩ at VGS = 8 V, ID = 31 A
Fast Switching Speed
Low Gate Charge
Applications
High Performance Trench Technology for Extremely Low
RDS(on)
Industrial Motor Drive
Industrial Power Supply
High Power and Current Handling Capability
Industrial Automation
RoHS Compliant
Battery Operated tools
Battery Protection
Solar Inverters
UPS and Energy Inverters
Energy Storage
Load Switch
D(Pin4, tab)
4
12
3
56
7
1. Gate
2. Source/Kelvin Sense
3. Source/Kelvin Sense
4. Drain
5. Source
6. Source
7. Source
G
(Pin1)
D2-PAK
(TO263)
S(Pin2,3,5,6,7)
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted.
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
ID
-Continuous
TJ, TSTG
±20
V
(Note 5)
TC = 100°C
(Note 5)
190
(Note 4)
1440
Single Pulse Avalanche Energy
PD
Units
V
TC = 25°C
-Pulsed
EAS
Ratings
80
(Note 3)
Power Dissipation
TC = 25°C
Power Dissipation
TA = 25°C
270
777
250
(Note 1a)
Operating and Storage Junction Temperature Range
3.8
-55 to +175
A
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
(Note 1)
0.6
(Note 1a)
40
°C/W
Package Marking and Ordering Information
Device Marking
FDB0190N807L
Device
FDB0190N807L
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
Package
D2-PAK-7L
1
Reel Size
330 mm
Tape Width
24 mm
Quantity
800 units
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
March 2016
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 64 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
4
V
80
V
34
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
-13
VGS = 10 V, ID = 34 A
1.3
rDS(on)
Static Drain to Source On Resistance
VGS = 8 V, ID = 31 A
1.5
2
VGS = 10 V, ID = 34 A, TJ = 150°C
2.3
4.3
VDS = 10 V, ID = 34 A
133
gFS
Forward Transconductance
2
2.9
mV/°C
1.7
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 40 V, VGS = 0 V,
f = 1 MHz
13650
19110
pF
1990
2790
pF
235
330
pF
Ω
2.9
Switching Characteristics
60
96
ns
78
125
ns
98
157
ns
50
80
ns
249
nC
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
178
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 40 V, ID = 34 A,
VGS = 10 V, RGEN = 6 Ω
VDD = 40 V, ID = 34 A,
VGS = 10 V
60
nC
32
nC
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain to Source Diode Forward Current
270
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
1440
A
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 34 A
(Note 2)
IF = 34 A, di/dt = 100 A/μs
0.8
1.2
V
89
142
ns
103
165
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 40 °C/W when mounted on a 1 in2 pad of 2 oz copper.
b) 62.5 °C/W when mounted on a minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. EAS of 777 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 72 A, VDD = 72 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 104 A.
4. Pulsed Id please refer to Figure “Forward Bias Safe Operating Area” for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
2
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
300
3
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
ID, DRAIN CURRENT (A)
VGS = 8 V
200
VGS = 7 V
VGS = 6.5 V
VGS = 6 V
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
VGS = 6 V
2
VGS = 6.5 V
1
VGS = 7 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
3
0
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
300
Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
2.0
15
ID = 34 A
VGS = 10 V
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
200
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
0.6
-75 -50 -25 0 25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VDS = 5 V
oC
100
TJ = 25 oC
TJ = -55 oC
2
3
4
5
6
5
TJ = 150 oC
TJ = 25 oC
4
5
6
7
8
9
300
100
VGS = 0 V
10
1
TJ = 175 oC
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.0
7
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
10
Figure 4. On-Resistance vs. Gate to
Source Voltage
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = 175
ID = 34 A
10
VGS, GATE TO SOURCE VOLTAGE (V)
300
200
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
Figure 3. Normalized On Resistance
vs. Junction Temperature
0
VGS = 10 V
VGS = 8 V
3
1.2
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
20000
VGS, GATE TO SOURCE VOLTAGE (V)
10
ID = 34 A
10000
8
CAPACITANCE (pF)
VDD = 30 V
VDD = 40 V
6
VDD = 50 V
4
2
0
0
50
100
150
Ciss
Coss
1000
f = 1 MHz
VGS = 0 V
100
0.1
200
1
10
80
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain
to Source Voltage
2000
1000
ID, DRAIN CURRENT (A)
1000
IAS, AVALANCHE CURRENT (A)
Crss
100
TJ = 25 oC
TJ = 150 oC
10
10 μs
100
10
1
THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
TJ = MAX RATED
1 ms
RθJC = 0.6 oC/W
o
TC = 25 C
1
0.001
0.01
0.1
1
10
100
0.1
0.1
1000 10000
tAV, TIME IN AVALANCHE (ms)
10 ms
100 ms/DC
CURVE BENT TO
MEASURED DATA
1
10
100
500
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe
Operating Area
Figure 9. Unclamped Inductive
Switching Capability
5
P(PK), PEAK TRANSIENT POWER (W)
10
SINGLE PULSE
o
RθJC = 0.6 C/W
o
TC = 25 C
4
10
3
10
2
10
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
4
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 0.6 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Case Transient Thermal Response Curve
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
5
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
FDB0190N807L N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings.
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
6
www.fairchildsemi.com
AccuPower™
AttitudeEngine™
Awinda®
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
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EcoSPARK®
EfficentMax™
ESBC™
®
Fairchild®
Fairchild Semiconductor®
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Marking Small Speakers Sound Louder
and Better™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™
MotionMax™
MotionGrid®
MTi®
MTx®
MVN®
mWSaver®
OptoHiT™
OPTOLOGIC®
®*
®
tm
Power Supply WebDesigner™
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PowerXS™
Programmable Active Droop™
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QS™
Quiet Series™
RapidConfigure™
™
Saving our world, 1mW/W/kW at a time™
SignalWise™
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SMART START™
Solutions for Your Success™
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STEALTH™
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SuperSOT™-3
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SupreMOS®
SyncFET™
Sync-Lock™
TinyBoost®
TinyBuck®
TinyCalc™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
TranSiC™
TriFault Detect™
TRUECURRENT®*
μSerDes™
UHC®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
VoltagePlus™
XS™
Xsens™
仙童 ®
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WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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Unless otherwise specified in this data sheet, this product is a standard commercial product and is not intended for use in applications that require
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I77
©2016 Fairchild Semiconductor Corporation
FDB0190N807L Rev.C
7
www.fairchildsemi.com
FDB0190N807L N-Channel PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
10.20
9.70
A
1.40
1.00
10.50
8.40
9.40
9.00
10.20
1.40 MAX C
3.45
0.73
1
7
0.95
0.90
0.70
(1.27) 6X
1.27 6X
7.62
0.70
C
0.50
LAND PATTERN RECOMMENDATION
0.25 A M
7.62
B
8.78
8.38
1.40
1.20
4.70
4.30
7.70 MIN
8
C
1
7
0.60
0.40
0.254
0.20 MAX
GAGE PLANE
NOTES:
C OUT OF JEDEC STANDARD VALUE.
D. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-1994.
E. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
F. LAND PATTERN RECOMMENDATION PER IPC.
TO127P1524X465-8N.
G. DRAWING FILE NAME: TO263A07REV5.
5.20
4.80
R0.50
2.84
2.44
A
A. PACKAGE CONFORMS TO JEDEC TO-263
VARIATION CB EXCEPT WHERE NOTED.
B. ALL DIMENSIONS ARE IN MILLIMETERS.
SEATING PLANE
C
15.70
15.10
0.20 B
0 - 8°
DETAIL A
SCALE 2:1
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designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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