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FDC30N20DZ
Dual N-Channel PowerTrench® MOSFET
30 V, 4.6 A, 31 mΩ
Features
Max rDS(on) = 31 mΩ at VGS = 10 V, ID = 4.6 A
General Description
Max rDS(on) = 38 mΩ at VGS = 4.5 V, ID = 4.2 A
This
N-Channel
MOSFET
is
produced
using
Fairchild
High Performance Trench® Technology for Extremely Low
rDS(on)
Semiconductor‘s advanced PowerTrench® process. This process has been optimized for rDS(on), switching performance and
Fast Switching Speed
ruggedness.
100% UIL Tested
Typical CDM ESD protection level > 2.0 kV (Note 5)
Applications
RoHS Compliant
Load Switch
Synchronous Rectifier
D2
S1
G1
D1
S2
S1
G2
D2
D1
G2
S2
Pin 1
G1
SuperSOTTM -6
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
ID
-Pulsed
Single Pulse Avalanche Energy
EAS
PD
TJ, TSTG
Ratings
30
Units
V
±20
V
(Note 1a)
4.6
A
(Note 4)
30
A
mJ
(Note 3)
3
Power Dissipation
(Note 1a)
0.96
Power Dissipation
(Note 1b)
0.69
Operating and Storage Junction Temperature Range
-55 to +150
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
130
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
180
°C/W
Package Marking and Ordering Information
Device Marking
.30N20
Device
FDC30N20DZ
©2016 Fairchild Semiconductor Corporation
FDC30N20DZ Rev.1.0
Package
SSOT-6
1
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDC30N20DZ Dual N-Channel PowerTrench® MOSFET
March 2016
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±10
μA
3
V
30
V
22
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1
1.7
-4
mV/°C
VGS = 10 V, ID = 4.6 A
23
31
VGS = 4.5 V, ID = 4.2 A
27
38
VGS = 10 V, ID = 4.6 A, TJ = 125 °C
31
42
VDS = 5 V, ID = 4.6 A
23
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1MHz
0.1
356
535
pF
110
165
pF
18
30
pF
3.5
7.0
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
6
12
ns
2
10
ns
13
21
ns
2
10
ns
VGS = 0 V to 10 V
5.6
7.9
nC
VGS = 0 V to 4.5 V VDD = 15 V,
ID = 4.6 A
2.7
3.8
0.9
nC
0.8
nC
VDD = 15 V, ID = 4.6 A,
VGS = 10 V, RGEN = 6 Ω
Qg(TOT)
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
nC
Drain-Source Diode Characteristics
VSD
Source-Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 4.6 A
(Note 2)
IF = 4.6 A, di/dt = 100 A/μs
0.85
1.2
V
10
20
ns
2
10
nC
NOTES:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.
b) 180 °C/W when mounted on a
minimum pad of 2 oz copper
a) 130 °C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 3 mJ starting TJ = 25 °C; N-ch: L = 0.1 mH, IAS = 8 A, VDD = 27 V, VGS = 10 V.
4. Pulse Id measured at td