FDH45N50F_F133

MOSFET – N-Channel, UniFETt, FRFET) 500 V, 45 A, 120 mW FDH45N50F Description UniFET MOSFET is ON Semiconductor’s high voltage MOSFET family based on planar stripe and DMOS technology. This MOSFET is tailored to reduce on−state resistance, and to provide better switching performance and higher avalanche energy strength. The body diode’s reverse recovery performance of UniFET FRFET MOSFET has been enhanced by lifetime control. Its trr is less than 100 nsec and the reverse dv/dt immunity is 15 V/ns while normal planar MOSFETs have over 200 nsec and 4.5 V/nsec respectively. Therefore, it can remove additional component and improve system reliability in certain applications in which the performance of MOSFET’s body diode is significant. This device family is suitable for switching power converter applications such as power factor correction (PFC), flat panel display (FPD) TV power, ATX and electronic lamp ballasts. www.onsemi.com VDS RDS(ON) MAX ID MAX 500 V 120 mW @ 10 V 45 A D G S Features • • • • • N-CHANNEL MOSFET RDS(on) = 105 mW (Typ.) @ VGS = 10 V, ID = 22.5 A Low Gate Charge (Typ. 105 nC) Low Crss (Typ. 62 pF) 100% Avalanche Tested These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant S D G TO−247−3LD CASE 340CK Applications • Lighting • Uninterruptible Power Supply • AC−DC Power Supply MARKING DIAGRAM $Y&Z&3&K FDH 45N50F $Y &Z &3 &K FDH45N50F = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2014 December, 2019 − Rev. 4 1 Publication Order Number: FDH45N50F/D FDH45N50F ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol VDSS ID Parameter FDH45N50F−F133 Unit 500 V Drain to Source Voltage Drain Current − −Continuous (TC = 25°C) −Continuous (TC = 100°C) 45 28.4 A A Drain Current −Pulsed (Note 1) 180 A Gate−Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note 2) 1868 mJ IAR Avalanche Current (Note 1) 45 A EAR Repetitive Avalanche Energy (Note 1) 62.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 50 V/ns 625 5 W W/°C IDM VGSS PD TJ, TSTG TL Power Dissipation (TC = 25°C) −Derate Above 25°C Operating and Storage Temperature Range −55 to + 150 °C 300 °C Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 Second Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Repetitive Rating: Pulse width limited by maximum junction temperature. 2. L = 1.46 mH, IAS = 48 A, VDD = 50 V, RG = 25 W, Starting TJ = 25 °C. 3. ISD ≤ 45 A, di/dt ≤ 200 A/ms, VDD ≤ BVDSS, Starting TJ = 25 °C. PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Package Method Reel Size Tape Width Quantity FDH45N50F−F133 FDH45N50F TO−247−3 Tube − − 30 Units THERMAL CHARACTERISTICS Symbol Parameter FDH45N50F−F133 Unit °C/W RqJC Thermal Resistance, Junction to Case, Max. 0.2 RqJA Thermal Resistance, Junction to Ambient, Max. 40 www.onsemi.com 2 FDH45N50F ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Symbol Parameter Test Condition Min. Typ. Max. Unit 500 − − V OFF CHARACTERISTICS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V DBVDSS / DTJ Breakdown Voltage Temperature Coefficient ID = 250 mA, Referenced to 25°C − 0.5 − V/°C IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V − − 25 mA VDS = 400 V, TC = 125°C − − 250 mA BVDSS IGSSF Gate−Body Leakage Current, Forward VGS = 30 V, VDS = 0 V − − 100 nA IGSSR Gate−Body Leakage Current, Reverse VGS = −30 V, VDS = 0 V − − −100 nA ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 mA 3 − 5 V RDS(on) Static Drain−Source On−Resistance VGS = 10 V, ID = 22.5 A − 0.105 0.12 W Forward Transconductance VDS = 40 V, ID = 22.5 A − 49 − S VDS = 25 V, VGS = 0 V, f = 1 MHz − 5100 6630 pF gFS DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 790 1030 pF Crss Reverse Transfer Capacitance − 62 − pF Coss Output Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz − 161 − pF Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 342 − pF VDD = 250 V, ID = 48 A, VGS = 10 V, RG = 25 W (Note 4) − 140 290 ns Cosseff. SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn−On Rise Time − 500 1010 ns td(off) Turn-Off Delay Time − 215 440 ns tf Turn−Off Fall Time − 245 500 ns Qg Total Gate Charge − 105 137 nC Qgs Gate−Source Charge − 33 − nC Qgd Gate−Drain Charge − 45 − nC VDS = 400 V, ID = 48 A, VGS = 10 V (Note 4) DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS Maximum Continuous Drain−Source Diode Forward Current − − 45 A ISM Maximum Pulsed Drain−Source Diode Forward Current − − 180 A VSD Source to Drain Diode Voltage VGS = 0 V, IS = 45 A − − 1.4 V trr Reverse Recovery Time − 188 − ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 45 A, dIF/dt = 100 A/ms − 0.64 − mC IS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially Independent of Operating Temperature Typical Characteristics. www.onsemi.com 3 FDH45N50F TYPICAL CHARACTERISTICS Bottom: 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V ID, Drain Current [A] ID, Drain Current [A] Top: 101 102 VGS 102 *Notes: 1. 250 ms Pulse Test 2. TC = 25°C 100 10−1 100 150°C 101 −55°C *Notes: 1. VDS = 40 V 2. 250 ms Pulse Test 100 101 25°C 2 4 VDS, Drain−Source Voltage [V] 12 10 6 8 VGS, Gate−Source Voltage [V] Figure 2. Transfer Characteristics Figure 1. On−Region Characteristics 0.25 0.20 VGS = 10 V 0.15 0.10 VGS = 20 V 0.05 0.00 *Note: TJ = 25°C 0 20 40 60 80 100 120 140 102 IDR, Reverse Drain Current [A] RDS(ON) [W], Drain−Source On−Resistance 0.30 150°C 101 *Notes: 1. VGS = 0 V 2. 250 ms Pulse Test 100 0.2 160 ID, Drain Current [A] Coss VGS, Gate−Source Voltage [V] Capacitance [pF] 0.8 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Ciss 6000 *Notes: 1. VGS = 0 V 2. f = 1 MHz 4000 Crss 2000 0 10−1 0.6 100 1.2 1.4 1.6 8 6 4 2 *Note: ID = 48 A 0 20 40 60 80 100 QG, Total Charge [nC] VDS, Drain−Source Voltage [V] Figure 6. Gate Charge Characteristics Figure 5. Capacitance Characteristics www.onsemi.com 4 1.8 VDS = 100 V VDS = 250 V VDS = 400 V 10 0 101 1.0 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12000 8000 0.4 VSD, Source−Drain Voltage [V] Figure 3. On−Resistance Variation vs. Drain Current and Gate voltage 10000 25°C 120 FDH45N50F TYPICAL CHARACTERISTICS 2.5 RDS(ON), (Normalized) Drain−Source On−Resistance BVDSS, (Normalized) Drain−Source Breakdown Voltage 1.2 1.1 1.0 *Notes: 1. VGS = 0 V 2. ID = 250 mA 0.9 0.8 −100 −50 0 50 100 TJ, Junction Temperature [°C] 150 2.0 1.5 1.0 *Notes: 1. VGS = 10 V 2. ID = 22.5 A 0.5 0.0 −100 200 −50 0 50 100 150 TJ, Junction Temperature [°C] 200 Figure 8. On−Resistance Variation vs. Temperature Figure 7. Breakdown Voltage Variation vs. Temperature 102 100 ms ID, Drain Current [A] ID, Drain Current [A] 50 10 ms 1 ms 101 Operation in This Area is Limited by RDS(on) 10 ms 100 ms DC *Notes: 1. TC = 25°C 2. TJ = 150°C 3. Single Pulse 100 10−1 100 101 40 30 20 10 102 0 25 103 50 Figure 9. Maximum Safe Operating Area 4000 2500 40 35 di/dt(on) 2000 1500 di/dt(off) 150 dv/dt(on) 25 *Notes: 1. VDS = 400 V 2. VGS = 12 V 3. ID = 25 A 4. TJ = 125°C 20 dv/dt(off) 10 500 0 30 15 1000 125 45 dv/dt [V/nS] di/dt [A/ms] 3000 100 Figure 10. Maximum Drain Current vs. Case Temperature *Notes: 1. VDS = 400 V 2. VGS = 12 V 3. ID = 25 A 4. TJ = 125°C 3500 75 TC, Case Temperature [°C] VDS, Drain−Source Voltage [V] 5 0 5 10 15 20 25 30 35 RG, Gate Resistance [W] 40 45 0 50 Figure 11. Typical Drain Current Slope vs. Gate Resistance 0 5 10 15 20 25 30 35 RG, Gate Resistance [W] 40 45 50 Figure 12. Typical Drain−Source Voltage Slope vs. Gate Resistance www.onsemi.com 5 FDH45N50F 1000 Eoff 600 Eon 400 *Notes: 1. VDS = 400 V 2. VGS = 12 V 3. ID = 25 A 4. TJ = 125C 200 0 0 5 10 15 20 25 30 35 40 RG, Gate Resistance [W] 45 *Notes: 1. If R = 0 W tAV = (L) (IAS) / (1.3 Rated BVDSS − VDC) 2. If R ≠ 0 W tAV = (L/R) In [(IAS x R) / (1.3 Rated BVDSS − VDD) + 1 Starting TJ = 25°C 10 Starting TJ = 150°C 1 0.01 50 0.1 1 tAV, Time In Avalanche [ms] D=0.5 10−1 0.2 Notes: 1. ZqJC(t) = 0.2°C/W Max. 2. Duty Factor, D = t1/t2 3. TJM − TC = PDM * ZqJC(t) 0.1 0.05 0.02 0.01 10−2 P Single Pulse 10−3 −5 10 10 Figure 14. Unclamped Inductive Switching Capability Figure 13. Typical Switching Losses vs. Gate Resistance ZqJC(t), Thermal Response [°C/W] Energy [mJ] 800 IAS, Avalanche Current [A] 100 DM t 1 t 2 10−3 10−2 10−1 100 10−4 t1, Square Wave Pulse Duration [sec] 101 Figure 15. Transient Thermal Resistance Curve www.onsemi.com 6 100 FDH45N50F VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 16. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 17. Resistive Switching Test Circuit & Waveforms L E AS + 1 @ LI AS 2 VDS BV DSS BV DSS * V DD BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDS(t) VDD tp tp Figure 18. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time FDH45N50F + DUT VSD − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 19. Peak Diode Recovery dv/dt Test Circuit & Waveforms UniFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. FRFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−247−3LD SHORT LEAD CASE 340CK ISSUE A A DATE 31 JAN 2019 A E P1 P A2 D2 Q E2 S B D 1 2 D1 E1 2 3 L1 A1 L b4 c (3X) b 0.25 M (2X) b2 B A M DIM (2X) e GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13851G TO−247−3LD SHORT LEAD A A1 A2 b b2 b4 c D D1 D2 E E1 E2 e L L1 P P1 Q S MILLIMETERS MIN NOM MAX 4.58 4.70 4.82 2.20 2.40 2.60 1.40 1.50 1.60 1.17 1.26 1.35 1.53 1.65 1.77 2.42 2.54 2.66 0.51 0.61 0.71 20.32 20.57 20.82 13.08 ~ ~ 0.51 0.93 1.35 15.37 15.62 15.87 12.81 ~ ~ 4.96 5.08 5.20 ~ 5.56 ~ 15.75 16.00 16.25 3.69 3.81 3.93 3.51 3.58 3.65 6.60 6.80 7.00 5.34 5.46 5.58 5.34 5.46 5.58 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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