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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FDMB2308PZ
Dual Common Drain P-Channel PowerTrench® MOSFET
-20 V, -7 A, 36 mΩ
Features
General Description
Max rS1S2(on) = 36 mΩ at VGS = -4.5 V, ID = -5.7 A
This device is designed specifically as a single package solution
Max rS1S2(on) = 50 mΩ at VGS = -2.5 V, ID = -4.6 A
for Li-Ion battery pack protection circuit and other ultra-portable
Low Profile - 0.8 mm maximum - in the new package
MicroFET 2x3 mm
applications.
It
features
two
common
drain
P-channel
MOSFETs, which enables bidirectional current flow, on
Fairchild’s advanced PowerTrench® process with state of the art
HBM ESD protection level 2.8 kV (Note 3)
MircoFET Leadframe, the FDMB2308PZ minimizes both PCB
space and rS1S2(on).
RoHS Compliant
Application
Li-Ion Battery Pack
Pin 1
S1
Pin 1
S1
G1
G2
4
3
G1
S2
5
2
S1
S2
6
1
S1
D1/D2
S2
S2
G2
MLP 2x3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VS1S2
Source1 to Source2 Voltage
VGS
Gate to Source Voltage
IS1S2
PD
TJ, TSTG
Parameter
Source1 to Source2 Current
-Continuous
TA = 25 °C
(Note 1a)
-Pulsed
Ratings
-20
Units
V
±12
V
-7
-30
Power Dissipation
TA = 25 °C
(Note 1a)
2.2
Power Dissipation
TA = 25 °C
(Note 1b)
0.8
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
57
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
161
°C/W
Package Marking and Ordering Information
Device Marking
308
Device
FDMB2308PZ
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
Package
MLP 2x3
1
Reel Size
7’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
April 2014
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
IS1S2
Zero Gate Voltage Source1 to Source2
Current
VS1S2 = -16 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS = ±12 V, VS1S2 = 0 V
±10
μA
V
On Characteristics
VGS(th)
rS1S2(on)
gFS
Gate to Source Threshold Voltage
Static Source1 to Source2 On Resistance
Forward Transconductance
VGS = VS1S2, IS1S2 = -250 μA
-0.9
-1.5
VGS = -4.5 V, IS1S2 = -5.7 A
-0.6
27
36
VGS = -2.5 V, IS1S2 = -4.6 A
36
50
VGS = -4.5 V, IS1S2 = -5.7 A ,
TJ = 125 °C
35
49
VS1S2 = -5 V, IS1S2 = -5.7 A
29
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VS1S2 = -10 V, VGS = 0 V,
f = 1 MHz
2280
3030
pF
361
540
pF
339
510
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qgs
Gate1 to Source1 Charge
Qgd
Gate1 to Source2 “Miller” Charge
VS1S2 = -10 V, IS1S2 = -5.7 A
VGS = -4.5 V, RGEN = 6 Ω
VS1S2 = -10 V, IS1S2 = -5.7 A,
VG1S1 = -4.5 V, VG2S2 = 0 V
14
25
ns
33
52
ns
74
118
ns
58
93
ns
22
30
nC
3.6
nC
7.7
nC
Source1- Source2 Diode Characteristics
Ifss
Maximum Continuous Source1-Source2 Diode Forward Current
Vfss
V
= 0 V, VG2S2= -4.5 V,
Source1 to Source2 Diode Forward Voltage G1S 1
Ifss= -5.7 A
(Note 2)
-1
-5.7
A
-1.6
V
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 161 °C/W when mounted on
a minimum pad of 2 oz copper
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
2
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
30
VG1S1 = -4.5 V
VG1S1 = -3 V
VG1S1 = -2.5 V
20
VG1S1 = -2 V
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VG2S2 = -4.5 V
VG1S1 = -1.8 V
0
0
0.5
1.0
1.5
2.0
30
VGS = -4.5 V
VGS = -3 V
20
VGS = -2.5 V
VGS = -2 V
10
VGS = -1.8 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
3
VG1S1 = -1.8 V
VG1S1 = -2 V
2
VG1S1 = -3 V
1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VG2S2 = -4.5 V
0
0
10
VG1S1 = -4.5 V
20
30
VGS = -1.8 V
3
VGS = -2 V
2
VGS = -3 V
1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
rS1S2(on), SOURCE1 TO
1.2
1.0
0.8
75
100
125
20
30
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
IS1S2 = -5.7 A
100
TJ = 125 oC
50
TJ = 25 oC
0
1.5
150
TJ, JUNCTION TEMPERATURE (oC)
2.0
2.5
3.0
3.5
4.0
4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. On Resistance vs Gate to
Source Voltage
Figure 5. Normalized On Resistance
vs Junction Temperature
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
SOURCE2 ON-RESISTANCE (mΩ)
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
1.4
50
VGS = -4.5 V
10
150
IS1S2 = -5.7 A
VGS= -4.5 V
25
VGS = -2.5 V
Figure 4. Normalized On-Resistance vs Source1
to Source2 Current and Gate Voltage
1.6
0
2.0
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
Figure 3. Normalized On-Resistance vs Source1
to Source2 Current and Gate Voltage
-25
1.5
4
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
0.6
-50
1.0
Figure 2. On-Region Characteristics
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
NORMALIZED
SOURCE1 TO SOURCE2 ON-RESISTANCE
Figure 1. On-Region Characteristics
VG1S1 = -2.5 V
0.5
-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
3
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VS1S2 = -5 V
20
TJ = 150 oC
10
TJ = 25 oC
TJ = -55 oC
1.0
1.5
10
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0
0
FORWARD CURRENT (A)
VG1S1 = 0 V, VG2S2 = -4.5 V
-Ifss, SOURCE1 TO SOURCE2
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
100
30
2.0
0
2.5
0.6
Figure 7. Transfer Characteristics
1.8
Figure 8. Source1 to Source2 Diode
Forward Voltage vs Source Current
4.5
5000
VG2S2 = 0 V, IS1S2 = -5.7 A
Ciss
VS1S2 = -8 V
CAPACITANCE (pF)
-VG1S1, GATE1 TO SOURCE1 VOLTAGE (V)
1.2
-Vfss, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
3.0
VS1S2 = -10 V
VS1S2 = -12 V
1.5
1000
Coss
Crss
f = 1 MHz
VGS = 0 V
100
0.1
0
0
5
10
15
20
25
1
10
20
-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 10. Capacitance vs Source1
to Source2 Voltage
Figure 9. Gate Charge Characteristics
-3
-IS1S2, SOURCE1 TO SOURCE2 CURRENT (A)
-Ig, GATE LEAKAGE CURRENT (A)
10
VS1S2 = 0 V
-4
10
-5
10
TJ =
125 oC
-6
10
-7
10
-8
10
TJ = 25 oC
-9
10
-10
10
0
5
10
15
20
-VGS, GATE TO SOURCE VOLTAGE (V)
10
1 ms
10 ms
1
0.1
100 ms
THIS AREA IS
LIMITED BY rDS(on)
1s
10 s
SINGLE PULSE
TJ = MAX RATED
0.01
DC
RθJA = 161 oC/W
TA = 25 oC
0.001
0.1
1
10
100
-VS1S2, SOURCE1 TO SOURCE2 VOLTAGE (V)
Figure 11. Gate Leakage Current vs Gate to
Source Voltage
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
50
Figure 12. Forward Bias Safe
Operating Area
4
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
1000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
o
RθJA = 161 C/W
100
o
TA = 25 C
10
1
0.1
-3
10
-2
-1
10
10
1
100
10
1000
t, PULSE WIDTH (sec)
Figure 13. Single Pulse Maximum Power Dissipation
2
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 161 C/W
0.001 -3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Ambient Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
5
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEA-C06
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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As used here in:
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and (c) whose failure to perform when properly used in accordance with
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2.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I68
©2013 Fairchild Semiconductor Corporation
FDMB2308PZ Rev.C3
7
www.fairchildsemi.com
FDMB2308PZ Dual Common Drain P-Channel PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™
F-PFS™
®*
®
AX-CAP®*
FRFET®
Global Power ResourceSM
PowerTrench®
BitSiC™
TinyBoost®
GreenBridge™
PowerXS™
Build it Now™
TinyBuck®
Green FPS™
Programmable Active Droop™
CorePLUS™
TinyCalc™
Green FPS™ e-Series™
QFET®
CorePOWER™
TinyLogic®
QS™
Gmax™
CROSSVOLT™
TINYOPTO™
Quiet Series™
GTO™
CTL™
TinyPower™
RapidConfigure™
IntelliMAX™
Current Transfer Logic™
TinyPWM™
ISOPLANAR™
DEUXPEED®
™
TinyWire™
Marking Small Speakers Sound Louder
Dual Cool™
TranSiC™
and Better™
EcoSPARK®
Saving our world, 1mW/W/kW at a time™
TriFault Detect™
EfficentMax™
MegaBuck™
SignalWise™
TRUECURRENT®*
ESBC™
MICROCOUPLER™
SmartMax™
μSerDes™
MicroFET™
SMART
START™
®
MicroPak™
Solutions for Your Success™
MicroPak2™
SPM®
Fairchild®
UHC®
STEALTH™
MillerDrive™
Fairchild Semiconductor®
SuperFET®
Ultra FRFET™
MotionMax™
FACT Quiet Series™
SuperSOT™-3
UniFET™
mWSaver®
FACT®
OptoHiT™
SuperSOT™-6
VCX™
FAST®
SuperSOT™-8
VisualMax™
OPTOLOGIC®
FastvCore™
SupreMOS®
VoltagePlus™
OPTOPLANAR®
FETBench™
SyncFET™
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Sync-Lock™
仙童 ™
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
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application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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