FDMC3612-L701

DATA SHEET www.onsemi.com MOSFET – N-Channel, POWERTRENCH) 87 100 V, 12 A, 110 mW 1 FDMC3612, FDMC3612-L701 General Description 23 DD 4 Top • • • • • DD Bottom SS SG DD DD Top Max rDS(on) = 110 mW at VGS = 10 V, ID = 3.3 A Max rDS(on) = 122 mW at VGS = 6 V, ID = 3.0 A Low Profile − 1 mm Max in Power 33 100% UIL Tested These Devices are Pb−Free and are RoHS Compliant SG WDFN8 3.3x3.3, 0.65P CASE 511DR FDMC3612 This N−Channel MOSFET is produced using onsemi’s advanced POWERTRENCH process that has been especially tailored to minimize the on−state resistance and yet maintain superior switching performance. Features SS 65 Bottom WDFN8 3.3x3.3, 0.65P CASE 511DQ FDMC3612−L701 MARKING DIAGRAM Applications • DC − DC Conversion • PSE Switch ON AXYKK FDMC 3612 FDMC 3612 ALYW FDMC3612 FDMC3612−L701 FDMC3612 = Specific Device Code A = Assembly Location XY = 2−Digit Date Code KK = 2−Digit Lot Run Traceability Code L = Wafer Lot Number YW = Assembly Start Week PIN ASSIGNMENT D 5 4 G D 6 3 S D 7 2 S D 8 1 S ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2017 November, 2021 − Rev. 6 1 Publication Order Number: FDMC3612/D FDMC3612, FDMC3612−L701 MOSFET MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol Rating Unit VDS Drain to Source Voltage Parameter 100 V VGS Gate to Source Voltage ±20 V A Drain Current ID Continuous TC = 25°C 12 Continuous (Note 1a) TA = 25°C 3.3 Pulsed 15 EAS Single Pulse Avalanche Energy (Note 2) 32 mJ PD Power Dissipation TC = 25°C 35 W Power Dissipation (Note 1a) TA = 25°C 2.3 TJ, TSTG Operating and Storage Junction Temperature Range −55 to + 150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL CHARACTERISTICS Symbol Parameter Rating Unit °C/W RqJC Thermal Resistance, Junction to Case 3.5 RqJA Thermal Resistance, Junction to Ambient (Note 1a) 53 1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. RqJC is guaranteed by design while RqCA is determined by the user’s board design. a. 53°C/W when mounted on a 1 in2 pad of 2 oz copper b. 125°C/W when mounted on a minimum pad of 2 oz copper 2. Starting TJ = 25°C; N−ch: L = 1 mH, IAS = 8 A, VDD = 90 V, VGS = 10 V. www.onsemi.com 2 FDMC3612, FDMC3612−L701 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit 100 − − V OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V DBVDSS / DTJ Breakdown Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C − 109 − mV/°C IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V − − 1 mA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V − − ±100 nA 2.0 2.5 4.0 V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA DVGS(th) / DTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C − −7 − mV/°C Static Drain to Source On Resistance VGS = 10 V, ID = 3.3 A − 92 110 mW VGS = 6 V, ID = 3.0 A − 98 122 VGS = 10 V, ID = 3.3 A, TJ = 125°C − 177 212 VDS = 10 V, ID = 3.3 A − 13 − S VDS = 50 V, VGS = 0 V, f = 1 MHz − 662 880 pF rDS(on) gFS Forward Transconductance DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 40 55 pF Crss Reverse Transfer Capacitance − 23 35 pF Gate Resistance − 1.3 − W − 7.4 15 ns − 2.8 10 ns Turn−Off Delay Time − 19 34 ns Fall Time − 2 10 ns Rg SWITCHING CHARACTERISTICS td(on) tr td(off) tf Turn−On Delay Time Rise Time VDD = 50 V, ID = 3.3 A, VGS = 10 V, RGEN = 6 W Qg(TOT) Total Gate Charge VGS = 0 V to 10 V, VDD = 50 V, ID = 3.3 A − 14.4 21 nC Qg(TOT) Total Gate Charge VGS = 0 V to 5 V, VDD = 50 V, ID = 3.3 A − 7.9 12 nC Qgs Total Gate Charge VDD = 50 V, ID = 3.3 A − 2.3 − nC Qgd Gate to Drain “Miller” Charge − 3.7 − nC V DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 3.3 A (Note 3) − 0.88 1.2 VGS = 0 V, IS = 2 A (Note 3) − 0.77 1.2 trr Reverse Recovery Time IF = 3.3 A, di/dt = 100 A/ms − 34 55 ns Qrr Reverse Recovery Charge − 37 60 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%. www.onsemi.com 3 FDMC3612, FDMC3612−L701 ID, DRAIN CURRENT (A) 15 12 VGS = 10 V VGS = 6 V NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VGS = 4.5 V VGS = 4 V 9 6 3 0 VGS = 3.5 V 0 1 2 3 4 5 3.0 VGS = 3.5 V 2.5 VGS = 4 V 2.0 VGS = 4.5 V 1.5 1.0 0.5 0 3 rDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE 400 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 −75 −50 −25 0 25 50 300 TJ = 25°C 100 TJ = 125°C 0 2 4 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) TJ = 150°C 6 TJ = 25°C 3 TJ = −55°C 2.5 3.0 3.5 4.0 4.5 10 8 Figure 4. On−Resistance vs. Gate to Source Voltage VDS = 5 V 0 2.0 6 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 9 15 ID = 3.3 A 200 75 100 125 150 Figure 3. Normalized On Resistance vs. Junction Temperature 12 12 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX TJ, JUNCTION TEMPERATURE (°C) 15 9 Figure 2. Normalized On−Resistance vs. Drain Current and Gate Voltage ID = 3.3 A VGS = 10 V 2.0 6 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 2.2 VGS = 10 V VGS = 6 V VDS, DRAIN TO SOURCE VOLTAGE (V) 2.4 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 5.0 20 10 VGS = 0 V TJ = 150°C 1 TJ = 25°C 0.1 TJ = −55°C 0.01 0.001 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current www.onsemi.com 4 FDMC3612, FDMC3612−L701 10 1000 ID = 3.3 A 8 VDD = 50 V 6 VDD = 25 V VDD = 75 V 4 2 0 Ciss CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) 100 Coss f = 1 MHz VGS = 0 V 0 2 4 6 8 10 12 14 16 1 Qg, GATE CHARGE (nC) 30 12 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 100 Figure 8. Capacitance vs. Drain to Source Voltage TJ = 25°C TJ = 100°C TJ = 125°C 0.01 0.1 1 VGS = 10 V 9 VGS = 6 V 6 3 RqJC = 3.5°C/W 0 10 25 50 tAV, TIME IN AVALANCHE (ms) P(PK), PEAK TRANSIENT POWER (W) 100 ms 1 THIS AREA IS 0.1 LIMITED BY rDS(on) SINGLE PULSE 0.01 TJ = MAX RATED RqJA = 125°C/W TA = 25°C 0.001 0.1 1 1 ms 10 ms 100 ms 1s 10 s DC 10 100 125 150 Figure 10. Maximum Continuous Drain Current vs. Case Temperature 50 10 75 TC, CASE TEMPERATURE (°C) Figure 9. Unclamped Inductive Switching Capability ID, DRAIN CURRENT (A) 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics 1 0.001 Crss 10 0.1 100 500 1000 SINGLE PULSE RqJC = 3.5°C/W TA = 25°C VGS = 10 V 100 10 1 0.5 −4 10 VDS, DRAIN to SOURCE VOLTAGE (V) −3 10 −2 10 −1 10 1 10 100 t, PULSE WIDTH (s) Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation www.onsemi.com 5 1000 FDMC3612, FDMC3612−L701 TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) ZqJA, NORMALIZED THERMAL IMPEDANCE 1 0.1 DUTY CYCLE−DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 0.001 −4 10 t2 NOTES: DUTY FACTOR: D = t1 / t2 PEAK TJ = PDM x ZqJA x RqJA + TA SINGLE PULSE RqJA = 125°C/W −3 10 −2 10 −1 10 1 10 t, RECTANGULAR PULSE DURATION (s) 100 1000 Figure 13. Junction−to−Ambient Transient Thermal Response Curve ORDERING INFORMATION Device Marking Package Type Reel Size Tape Width Shipping† FDMC3612 FDMC3612 WDFN8 3.3x3.3, 0.65P Power 33 (Pb−Free) 13” 12 mm 3000 / Tape & Reel FDMC3612−L701 FDMC3612 WDFN8 3.3x3.3, 0.65P Power 33 (Pb−Free) 13” 12 mm 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511DQ ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13648G WDFN8 3.3X3.3, 0.65P DATE 31 OCT 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com WDFN8 3.3x3.3, 0.65P CASE 511DQ ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13648G WDFN8 3.3X3.3, 0.65P DATE 31 OCT 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511DR ISSUE A DATE 18 SEP 2018 GENERIC MARKING DIAGRAM* XXXX AYWWG G DOCUMENT NUMBER: DESCRIPTION: XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) 98AON13650G WDFN8 3.3x3.3, 0.65P *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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