FDS6892AZ
Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET
General Description
Features
These N-Channel Logic Level MOSFETs are produced
using
Fairchild
Semiconductor’s
advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
• 7.5 A, 20 V.
• Low gate charge (12 nC typical)
• High performance trench technology for extremely
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
low RDS(ON)
• High power and current handling capability
DD1
DD1
D2
D
5
DD2
6
SO-8
Pin 1 SO-8
G2
S2 S
4
Q1
3
7
G1
S1 G
S
2
Q2
8
S
Absolute Maximum Ratings
Symbol
RDS(ON) = 18 mΩ @ VGS = 4.5 V
RDS(ON) = 24 mΩ @ VGS = 2.5 V
1
o
TA=25 C unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
20
V
VGSS
Gate-Source Voltage
± 12
V
ID
Drain Current
7.5
A
PD
Power Dissipation for Dual Operation
– Continuous
(Note 1a)
– Pulsed
30
2
Power Dissipation for Single Operation
TJ, TSTG
(Note 1a)
W
1.6
(Note 1b)
1
(Note 1c)
0.9
–55 to +150
°C
(Note 1a)
78
°C/W
(Note 1)
40
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6892AZ
FDS6892AZ
13’’
12mm
2500 units
2001 Fairchild Semiconductor Corporation
FDS6892AZ Rev C (W)
FDS6892AZ
October 2001
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
VGS = 0 V,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
20
Typ
Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSSF
IGSSR
V
mV/°C
14
1
10
µA
Gate–Body Leakage, Forward
VDS = 16 V, VGS = 0 V
VDS = 16 V, VGS = 0 V, TJ = 55°C
VGS = 12 V, VDS = 0 V
10
µA
Gate–Body Leakage, Reverse
VGS = –12 V, VDS = 0 V
–10
µA
1.0
–3
1.5
V
mV/°C
13
18
19
18
24
28
mΩ
On Characteristics
(Note 2)
VDS = VGS,
ID = 250 µA
ID = 250 µA, Referenced to 25°C
VGS(th)
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
0.6
ID(on)
On–State Drain Current
VGS = 4.5 V, ID = 7.5 A
VGS = 2.5 V, ID = 6.5 A
VGS = 4.5 V,ID = 7.5 A,TJ = 125°C
VGS = 4.5V, VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V,
ID = 7.5 A
36
S
VDS = 10 V,
f = 1.0 MHz
V GS = 0 V,
1286
pF
15
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
305
pF
161
pF
(Note 2)
VDD = 10 V,
VGS = 4.5 V,
VDS = 10 V,
VGS = 4.5 V
ID = 1 A,
RGEN = 6 Ω
ID = 7.5 A,
10
20
ns
14
25
ns
25
40
ns
8
16
ns
12
17
nC
2.6
nC
3
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 1.3 A
(Note 2)
0.7
1.3
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
2
mounted on a 0.5in
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
2
in pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDS6892AZ Rev C (W)
FDS6892AZ
Electrical Characteristics
FDS6892AZ
Typical Characteristics
60
1.8
3.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 4.5V
3.0V
ID , DRAIN CURRENT (A)
50
40
2.5V
30
20
2.0V
10
0
0
1
2
3
1.6
VGS = 2.5V
1.4
3.0V
1.2
3.5V
4.0V
0.8
4
0
10
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
40
50
60
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
0.05
ID = 7.5A
VGS = 4.5V
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
30
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
1.4
1.2
1
0.8
0.6
ID = 3.8A
0.04
0.03
o
TA = 125 C
0.02
o
TA = 25 C
0.01
-50
-25
0
25
50
75
100
125
150
175
1
2
o
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
40
I D, DRAIN CURRENT (A)
4.5V
1
25oC
o
TA = -55 C
30
o
125 C
20
10
VGS = 0V
10
o
TA = 125 C
1
o
0.1
25 C
0.01
-55oC
0.001
0.0001
0
1
1.5
2
2.5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
3
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6892AZ Rev C (W)
FDS6892AZ
Typical Characteristics
2000
ID = 7.5 A
f = 1 MHz
VGS = 0 V
VDS = 5V
4
1600
10V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
5
15V
3
2
1
CISS
1200
800
400
COSS
CRSS
0
0
0
2
4
6
8
10
12
14
0
5
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
20
P(pk), PEAK TRANSIENT POWER (W)
50
RDS(ON) LIMIT
100µs
1ms
10ms
100ms
1s
10
10s
DC
1
VGS = 4.5V
SINGLE PULSE
RθJA = 135oC/W
0.1
o
TA = 25 C
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
t1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
15
Figure 8. Capacitance Characteristics.
100
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
0.2
0.1
o
RθJA = 135 C/W
0.1
0.05
P(pk)
0.02
0.01
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t 1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6892AZ Rev C (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4