MOSFET – Dual N-Channel,
POWERTRENCH),
SyncFETt
FDS6900AS
General Description
The FDS6900AS is designed to replace two single SO−8 MOSFETs
and Schottky diode in synchronous DC:DC power supplies that
provide various peripheral voltages for notebook computers and other
battery powered electronic devices. FDS6900AS contains two unique
30 V, N−channel, logic level, PowerTrench MOSFETs designed to
maximize power conversion efficiency.
The high−side switch (Q1) is designed with specific emphasis on
reducing switching losses while the lowside switch (Q2) is optimized
to reduce conduction losses. Q2 also includes an integrated Schottky
diode using ON Semiconductor’s monolithic SyncFET technology.
Features
• Q2: Optimized to Minimize Conduction Losses Includes SyncFET
•
•
•
Schottky Body Diode, 8.2 A, 30 V
♦ RDS(on) = 22 mW at VGS = 10 V
♦ RDS(on) = 28 mW at VGS = 4.5 V
Q1: Optimized for Low Switching Losses Low Gate Charge (11 nC
typical), 6.9 A, 30 V
♦ RDS(on) = 27 mW at VGS = 10 V
♦ RDS(on) = 34 mW at VGS = 4.5 V
100% RG (Gate Resistance) Tested
These Devices are Pb−Free and are RoHS Compliant
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S1D2
S1D2
S1D2
G1
S2
G2
D1
Pin 1 D1
SOIC8
CASE 751EB
ELECTRICAL CONNECTION
1
8
Q1
2
7
3
6
Q2
4
5
Dual N−Channel SyncFet
MARKING DIAGRAM
Specifications
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Q2
Q1
Units
VDSS
Drain−Source Voltage
30
30
V
VGSS
Gate−Source Voltage
±20
±20
V
Drain Current
− Continuous (Note 1a)
− Pulsed
8.2
30
6.9
20
ID
PD
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG Operating and Storage Junction
Temperature Range
A
June, 2020 − Rev. 3
FDS6900AS
A
L
YW
= Specific Device Code
= Assembly Site
= Wafer Lot Number
= Assembly Start Week
W
2
ORDERING INFORMATION
1.6
1
0.9
Device
°C
−55 to +150
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2017
FDS6900AS
ALYW
1
FDS6900AS
Package
Shipping†
SOIC8
(Pb−Free)
2,500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
FDS6900AS/D
FDS6900AS
THERMAL CHARACTERISTICS
Symbol
Ratings
Units
RqJA
Thermal Resistance, Junction−to−Ambient (Note 1a)
Parameter
78
°C/W
RqJC
Thermal Resistance, Junction−to−Case (Note 1)
40
°C/W
Table 1. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Type
Min
30
30
Typ
Max
Units
OFF CHARACTERISTICS
Drain to Source Breakdown Voltage
ID = 1 mA, VGS = 0 V
ID = 250 mA, VGS = 0 V
Q2
Q1
DBVDSS /
DTJ
Breakdown Voltage Temperature
Coefficient
ID = 10 mA, referenced to 25°C
ID = 250 mA, referenced to 25°C
Q2
Q1
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
Q2
Q1
500
1
mA
IGSS
Gate−Body Leakage Current
VGS = ±20 V, VDS = 0 V
Q2
Q1
±100
nA
3
3
V
BVDSS
V
27
22
mV/°C
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 1 mA
VGS = VDS, ID = 250 mA
Q2
Q1
DVGS(th) /
DTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 10 mA, referenced to 25°C
ID = 250 mA, referenced to 25°C
Q2
Q1
−3.2
−4.2
Static Drain−Source On−Resistance
VGS = 10 V, ID = 8.2 A
VGS = 10 V, ID = 8.2 A, TJ = 125°C
VGS = 4.5 V, ID = 7.6 A
Q2
17
23
21
22
36
28
VGS = 10 V, ID = 6.9 A
VGS = 10 V, ID = 6.9 A, TJ = 125°C
VGS = 4.5 V, ID = 6.2 A
Q1
22
30
27
27
38
34
On−State Drain Current
VGS = 10 V, VDS = 5 V
Q2
Q1
Forward Transconductance
VDS = 5 V, ID = 8.2 A
VDS = 5 V, ID = 6.9 A
Q2
Q1
25
21
S
VDS = 15 V, VGS = 0 V, f = 1 MHz
Q2
Q1
570
600
pF
RDS(on)
ID(on)
gFS
1
1
1.9
1.9
mV/°C
30
20
mW
A
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Q2
Q1
180
150
pF
Crss
Reverse Transfer Capacitance
Q2
Q1
70
70
pF
RG
Gate Resistance
Q2
Q1
2.8
2.2
4.9
3.8
W
Q2
Q1
10
9
19
18
ns
SWITCHING CHARACTERISTICS (Note 2)
VDD = 15 V, ID = 1 A, VGS = 10 V,
RGEN = 6 W
td(on)
Turn−On Delay Time
tr
Turn−On Rise Time
Q2
Q1
5
4
10
8
ns
td(off)
Turn−Off Delay Time
Q2
Q1
26
23
42
32
ns
Turn−Off Fall Time
Q2
Q1
3
3
6
6
ns
tf
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2
FDS6900AS
Table 1. ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Type
Min
Typ
Max
Units
Q2
Q1
11
10
20
19
ns
SWITCHING CHARACTERISTICS (Note 2)
VDD = 15 V, ID = 1 A, VGS = 4.5 V,
RGEN = 6 W
td(on)
Turn−On Delay Time
tr
Turn−On Rise Time
Q2
Q1
15
9
27
18
ns
td(off)
Turn−Off Delay Time
Q2
Q1
16
14
29
25
ns
Turn−Off Fall Time
Q2
Q1
6
4
12
8
ns
Q2
Q1
10
11
15
15
nC
8.2
8.5
nC
tf
Q2: VDS = 15 V, ID = 8.2 A
Q1: VDS = 15 V, ID = 6.9 A
Qg(TOT)
Total Gate Charge at VGS = 10 V
Qg
Total Gate Charge at VGS = 5 V
Q2
Q1
5.8
6.1
Qgs
Gate−Source Charge
Q2
Q1
1.6
1.7
nC
Qgd
Gate−Drain Charge
Q2
Q1
2.1
2.2
nC
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain−Source
Diode Forward Current
Trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VSD
Q2
Q1
IF = 8.2 A, diF/dt = 300 A/ms
(Note 3)
IF = 6.9 A, diF/dt = 100 A/ms
(Note 3)
Drain−Source Diode Forward Voltage VGS = 0V, IS = 2.3 A (Note 2)
VGS = 0V, IS = 5 A (Note 2)
VGS = 0V, IS = 1.3 A (Note 2)
Q2
Q1
Q2
Q2
Q1
2.3
1.3
A
15
ns
6
nC
19
ns
10
nC
0.6
0.7
0.7
0.7
1.0
1.2
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design while RqCA is determined by the user’s board design.
a. 78°C/W when
mounted on
a 0.5 in2 pad of 2 oz
copper.
b. 125°C/W when
c. 135°C/W when
mounted on
a 0.02 in2 pad of 2 oz
copper.
mounted on
a minimum pad
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. See “SyncFET Schottky body diode characteristics” below.
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3
FDS6900AS
TYPICAL CHARACTERISTICS: Q2
2.4
30
4.0V
6.0V
VGS = 3.0V
3.5V
RDS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10V
4.5V
20
3.0V
10
2.2
2
1.8
1.6
4.5V
5.0V
6.0V
10V
1
0.8
0
0.5
1
1.5
2
2.5
VDS, DRAIN−SOURCE VOLTAGE (V)
3
0
Figure 1. On−Region Characteristics
10
15
20
ID, DRAIN CURRENT(A)
25
30
0.06
ID = 8.2A
VGS = 10V
RDS(ON) , ON−RESISTANCE (OHM)
ID = 4A
1.4
1.2
1
0.8
0.6
0.05
0.04
o
TA = 125 C
0.03
0.02
o
TA = 25 C
0.01
−50
−25
0
25
50
75
100
o
TJ, JUNCTION TEMPERATURE ( C)
125
150
2
Figure 3. On−Resistance Variation with
Temperature
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 4. On−Resistance Variation with
Gate−to−Source Voltage
30
100
VGS = 0V
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
25
ID, DRAIN CURRENT (A)
5
Figure 2. On−Resistance Variation with Drain
Current and Gate Voltage
1.6
RDS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
4.0V
1.2
2.5V
0
3.5V
1.4
20
15
o
TA = 125 C
10
o
−55 C
5
o
25 C
10
o
1
TA = 125 C
o
0.1
25 C
o
−55 C
0.01
0.001
0
1.5
2
2.5
3
3.5
VGS, GATE TO SOURCE VOLTAGE (V)
0
4
Figure 5. Transfer Characteristics
0.2
0.4
0.6
0.8
VSD, BODY DIODE FORWARD VOLTAGE (V)
1
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
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4
FDS6900AS
TYPICAL CHARACTERISTICS: Q2 (Continued)
800
ID =8.2A
f = 1MHz
VGS = 0 V
8
600
VDS = 10V
CAPACITANCE (pF)
VGS, GATE−SOURCE VOLTAGE (V)
10
20V
6
15V
4
Ciss
400
Coss
200
2
Crss
0
0
0
3
6
Qg, GATE CHARGE (nC)
9
12
0
Figure 7. Gate Charge Characteristics
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics
100
P(pk), PEAK TRANSIENT POWER (W)
50
RDS(ON) LIMIT
100μs
1ms
10ms
100ms
10
1s
1
10s
DC
VGS = 10V
SINGLE PULSE
o
RqJA = 135 C/W
0.1
o
TA = 25 C
0.1
1
10
VDS, DRAIN−SOURCE VOLTAGE (V)
SINGLE PULSE
RqJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
100
Figure 9. Maximum Safe Operating Area
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
ID, DRAIN CURRENT (A)
5
0.01
0.1
1
t1, TIME (sec)
10
100
Figure 10. Single Pulse Maximum Power
Dissipation
1
D = 0.5
RqJA(t) = r(t) * RqJA
RqJA = 135 °C/W
0.2
0.1
0.1
0.05
P(p
k )
0.02
t1
0.01
t2
0.01
TJ − TA = P * RqJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
1000
0.1
1
10
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
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5
100
1000
FDS6900AS
TYPICAL CHARACTERISTICS: Q1
2.2
20
VGS = 10V
RDS(ON) , NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
4.0V
16
ID, DRAIN CURRENT (A)
VGS = 3.0V
3.5V
6.0V
4.5V
12
8
3.0V
4
2
1.8
1.6
3.5V
1.4
4.0V
4.5V
1.2
5.0V
6.0V
10V
1
2.5V
0
0.8
0
0.4
0.8
1.2
1.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 12. On−Region Characteristics
16
20
0.07
ID = 6.9A
VGS = 10V
RDS(ON), ON−RESISTANCE (OHM)
ID = 3.5A
1.4
1.2
1
0.8
0.06
0.05
o
TA = 125 C
0.04
0.03
o
TA = 25 C
0.6
0.02
−50
−25
0
25
50
75
100
o
TJ, JUNCTION TEMPERATURE ( C)
125
150
2
Figure 14. On−Resistance Variation with
Temperature
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 15. On−Resistance Variation with
Gate−to−Source Voltage
100
20
VGS = 0V
IS, REVERSE DRAIN CURRENT (A)
VDS = 5V
16
ID, DRAIN CURRENT (A)
8
12
ID, DRAIN CURRENT (A)
Figure 13. On−Resistance Variation with Drain
Current and Gate Voltage
1.6
RDS(ON), NORMALIZED
DRAIN−SOURCE ON−RESISTANCE
4
0
2
12
8
o
TA = 125 C
o
−55 C
4
o
25 C
0
10
o
TA = 125 C
1
o
25 C
0.1
o
−55 C
0.01
0.001
0.0001
1
1.5
2
2.5
3
3.5
VGS, GATE TO SOURCE VOLTAGE (V)
4
0
Figure 16. Transfer Characteristics
0.2
0.4
0.6
0.8
1
VSD, BODY DIODE FORWARD VOLTAGE(V)
1.2
Figure 17. Body Diode Forward Voltage Variation
with Source Current and Temperature
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6
FDS6900AS
TYPICAL CHARACTERISTICS: Q1 (Continued)
800
ID = 6.9A
f = 1 MHz
VGS = 0 V
8
VDS = 10V
CAPACITANCE (pF)
VGS, GATE−SOURCE VOLTAGE (V)
10
20V
6
15V
4
600
Ciss
400
Coss
200
2
Crss
0
0
0
2
4
6
8
Qg, GATE CHARGE (nC)
10
12
0
Figure 18. Gate Charge Characteristics
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 19. Capacitance Characteristics
50
RDS(ON) LIMIT
P(pk), PEAK TRANSIENT POWER (W)
100
100μs
10
1ms
10ms
100ms
1s
10s
DC
1
VGS = 10V
SINGLE PULSE
o
RqJA = 135 C/W
0.1
o
TA = 25 C
0.1
1
10
VDS, DRAIN−SOURCE VOLTAGE (V)
SINGLE PULSE
RqJA = 135°C/W
TA = 25°C
40
30
20
10
0.01
0
0.001
100
Figure 20. Maximum Safe Operating Area
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
ID, DRAIN CURRENT (A)
5
0.01
0.1
1
t1, TIME (sec)
10
100
Figure 21. Single Pulse Maximum Power
Dissipation
1
D = 0.5
RqJA(t) = r(t) * RqJA
o
0.2
0.1
RqJA = 135 C/W
0.1
P(p
k )
0.05
t1
0.02
0.01
t2
0.01
TJ − TA = P * R qJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
1000
0.1
1
10
t1, TIME (sec)
Figure 22. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
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7
100
1000
FDS6900AS
TYPICAL CHARACTERISTICS (Continued)
SyncFET Schottky Body Diode Characteristics
Schottky barrier diodes exhibit significant leakage at high
temperature and high reverse voltage. This will increase the
power in the device.
Current: 1.6A/DIV
IDSS, REVERSE LEAKAGE CURRENT (A)
ON Semiconductor’s SyncFET process embeds a
Schottky diode in parallel with PowerTrench MOSFET.
This diode exhibits similar characteristics to a discrete
external Schottky diode in parallel with a MOSFET.
Figure 23 shows the reverse recovery characteristic of the
FDS6900AS.
0.01
125oC
0.001
100oC
0.0001
0.00001
25 oC
0.000001
0
5
10
15
20
VDS, REVERSE VOLTAGE (V)
25
30
Figure 25. SyncFET Body Diode Reverse
Leakage versus Drain−Source Voltage and
Temperature
Time: 10nS/DIV
Figure 23. FDS6900AS SyncFET Body Diode
Reverse Recovery Characteristics
Current: 1.6A/DIV
For comparison purposes, Figure 24 shows the reverse
recovery characteristics of the body diode of an equivalent
size MOSFET produced without SyncFET (FDS6690).
Time: 10nS/DIV
Figure 24. Non−SyncFET (FDS6690) Body
Diode Reverse Recovery Characteristics
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FDS6900AS
TYPICAL CHARACTERISTICS (Continued)
L
VDS
BVDSS
tP
VGS
RGE
DUT
VGS
VDS
IAS
+
VDD
VDD
−
0V
IAS
tp
vary t P to obtain
required peak I AS
0.01Ω
tAV
Figure 26. Unclamped Inductive Load Test Circuit
Figure 27. Unclamped Inductive Waveforms
Drain Current
Same type as
+
50kΩ
10V
−
10 mF
+
1 mF
VDD
QG(TOT)
−
VGS
10V
DUT
QGD
QGS
VGS
Ig(REF
Charge, (nC)
Figure 28. Gate Charge Test Circuit
VDS
Figure 29. Gate Charge Waveform
tON
td(ON)
RL
VDS
RGEN
VDD
DUT
−
10%
0V
VGS
0V
Figure 30. Switching Time Test Circuit
90%
10%
90%
VGS
Pulse Width v 1 ms
Duty Cycle v 0.1%
tr
90%
+
VGS
tOFF
td(OFF)
tf
50%
10%
50%
Pulse Width
Figure 31. Switching Time Waveform
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
SyncFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EB
ISSUE A
DOCUMENT NUMBER:
DESCRIPTION:
98AON13735G
SOIC8
DATE 24 AUG 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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