FDS6984S

FDS6984S Dual Notebook Power Supply N-Channel PowerTrench SyncFET™ General Description Features The FDS6984S is designed to replace two single SO-8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6984S contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. • Q2: Optimized to minimize conduction losses Includes SyncFET Schottky diode RDS(on) = 19 mΩ=@ VGS = 10V 8.5A, 30V RDS(on) = 28 mΩ=@ VGS = 4.5V • The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using Fairchild’s monolithic SyncFET technology. Q1: Optimized for low switching losses Low gate charge ( 5 nC typical) RDS(on) = 0.040Ω=@ VGS = 10V 5.5A, 30V RDS(on) = 0.055Ω=@ VGS = 4.5V D1 5 D1 D2 4 6 D2 3 Q1 7 SO-8 S2 G2 S1 G1 Absolute Maximum Ratings Symbol 8 Drain-Source Voltage Gate-Source Voltage ID Drain Current Q2 - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation PD (Note 1a) Q1 Units 30 30 ±20 8.5 30 ±20 5.5 20 V V A 2 1.6 1 0.9 -55 to +150 °C (Note 1a) 78 °C/W (Note 1) 40 °C/W (Note 1a) (Note 1b) (Note 1c) TJ, TSTG 1 TA = 25°C unless otherwise noted Parameter VDSS VGSS 2 Q2 Operating and Storage Junction Temperature Range W Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6984S FDS6984S 13” 12mm 2500 units 2000 Fairchild Semiconductor Corporation FDS6984S Rev C(W) FDS6984S September 2000 TA = 25°C unless otherwise noted Symbol Test Conditions Parameter Type Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS IGSSF Zero Gate Voltage Drain Current Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V Q2 Q1 Q2 Q1 All IGSSR Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V All On Characteristics VGS = 0 V, ID = 1 mA VGS = 0 V, ID = 250 µA VDS = 24 V, VGS = 0 V 30 30 V µA 500 1 100 nA -100 nA 3 3 V (Note 2) VGS(th) Gate Threshold Voltage ∆VGS(th) ===∆TJ Gate Threshold Voltage Temperature Coefficient RDS(on) Static Drain-Source On-Resistance ID(on) On-State Drain Current gFS Forward Transconductance VDS = VGS, ID = 1 mA VDS = VGS, ID = 250 µA ID = 1 mA, Referenced to 25°C Q2 Q1 Q2 ID = 250 uA, Referenced to 25°C Q1 -4 VGS = 10 V, ID = 8.5 A VGS = 10 V, ID = 8.5 A, TJ = 125°C VGS = 4.5 V, ID = 7 A VGS = 10 V, ID = 5.5 A VGS = 10 V, ID = 5.5 A, TJ = 125°C VGS = 4.5 V, ID = 4.6 A VGS = 10 V, VDS = 5 V Q2 16 24 23 35 53 48 VDS = 5 V, ID = 8.5 A VDS = 5 V, ID = 5.5 A 1 1 -6 Q1 Q2 Q1 Q2 Q1 mV/°C 19 32 28 40 60 55 30 20 mΩ A 26 40 S Q2 Q1 Q2 Q1 Q2 Q1 1233 462 344 113 106 40 pF Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 8 10 5 14 25 21 11 7 11 8.5 5 2.4 4 3.1 Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDS = 15 V, VGS = 0 V, f = 1.0 MHz pF pF (Note 2) VDD = 15 V, ID = 1 A, VGS = 10V, RGEN = 6 Ω Q2 VDS = 15 V, ID = 8.5 A, VGS =5V Q1 VDS = 15 V, ID = 5.5 A, VGS = 5 V 16 18 10 25 40 34 20 14 16 12 ns ns ns ns nC nC nC FDS6680S Rev C (W) FDS6984S Electrical Characteristics Symbol (continued) Parameter TA = 25°C unless otherwise noted Test Conditions Type Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current trr Reverse Recovery Time Qrr VSD Reverse Recovery Charge Drain-Source Diode Forward Voltage IF = 10A, diF/dt = 300 A/µs Q2 Q1 Q2 17 ns Q2 Q1 12.5 0.5 0.74 nC V (Note 3) VGS = 0 V, IS = 3.5 A VGS = 0 V, IS = 1.3 A (Note 2) (Note 2) 3.0 1.3 0.7 1.2 A Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 0.5in2 pad of 2 oz copper b) 125°C/W when mounted on a 0.02 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. See “SyncFET Schottky body diode characteristics” below. 3. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6680S Rev C (W) FDS6984S Electrical Characteristics FDS6984S Typical Characteristics: Q2 2.6 50 VGS = 10V 6.0V VGS = 4.0V 5.0V 40 2.2 4.5V 1.8 30 5.0V 4.0V 20 4.5V 1.4 6.0V 10 8.0V 1 3.5V 10V 0.6 0 0 1 2 0 3 10 20 30 40 50 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.06 1.9 ID = 10A VGS = 10V ID = 5A 0.05 1.6 0.04 1.3 o 0.03 TA = 125 C 1 0.02 o TA = 25 C 0.7 0.01 0.4 -50 -25 0 25 50 75 100 125 150 0 2 4 o TJ, JUNCTION TEMPERATURE ( C) 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 50 VGS = 0V VDS = 5V o TA = -55 C o 25 C 40 1 o o TA = 125 C 125 C o 30 25 C 0.1 o -55 C 20 0.01 10 0.001 0 1.5 2.5 3.5 4.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5.5 0 0.2 0.4 0.6 0.8 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6680S Rev C (W) FDS6984S Typical Characteristics: Q2 10 2000 ID =10A VDS = 5V 8 f = 1MHz VGS = 0 V 10V 1600 15V CISS 6 1200 4 800 2 400 0 0 COSS CRSS 0 3 6 9 12 15 18 21 0 5 Qg, GATE CHARGE (nC) 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 100 50 RDS(ON) LIMIT 100µs 10 10ms 100ms 30 1s 1 DC SINGLE PULSE RθJA = 135°C/W TA = 25°C 40 1ms 10s 20 VGS = 10V SINGLE PULSE 0.1 10 o RθJA = 135 C/W o TA = 25 C 0.01 0 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 10. Single Pulse Maximum Power Dissipation. FDS6680S Rev C (W) FDS6984S Typical Characteristics Q1 3 40 VGS = 10V VGS = 3.0V 6.0 2.5 5.0 30 3.5V 4.5 2 4.0V 4.0V 20 4.5V 1.5 5.0V 3.5V 6.0V 10 10V 1 3.0 0.5 0 0 1 2 3 4 0 5 10 20 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.2 ID = 4.6A VGS = 10V 1.6 ID = 2.3 A 0.15 1.4 1.2 o TA = 125 C 0.1 1 0.05 0.8 o TA = 25 C 0.6 -50 -25 0 25 50 75 100 125 150 o 0 2.5 3 TJ, JUNCTION TEMPERATURE ( C) Figure 13. On-Resistance Variation with Temperature. 3.5 4 4.5 VGS, GATE TO SOURCE VOLTAGE (V) 5 Figure 14. On-Resistance Variation with Gate-to-Source Voltage. 100 25 VGS = 0V o TA = -55 C VDS = 5V 10 o 25 C 20 o o 125 C TA = 125 C 1 15 o 25 C 0.1 10 o -55 C 0.01 5 0.001 0 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 15. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6680S Rev C (W) FDS6984S Typical Characteristics Q1 10 700 VDS = 5V ID = 4.6A 10V 8 f = 1MHz VGS = 0 V 600 15V CISS 500 6 400 300 4 200 2 COSS 100 CRSS 0 0 0 2 4 6 8 10 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics. 100 30 SINGLE PULSE RθJA = 135°C/W TA = 25°C 100µs RDS(ON) LIMIT 10 100ms 1ms 10ms 20 1s 1 DC 10s 10 VGS = 10V SINGLE PULSE 0.1 o RθJA = 135 C/W o TA = 25 C 0.01 0 0.1 1 10 100 0.01 0.1 VDS, DRAIN-SOURCE VOLTAGE (V) 1 10 100 t1, TIME (sec) Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum Power Dissipation. r(t) , NO RMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 R θJA (t) = r(t) * R θJA R θJA = 135°C/W 0.1 0.05 P(pk) 0.02 0.01 t1 Single Pulse 0.005 Duty Cycle, D = t1 /t2 0.002 0.001 0.0001 t2 TJ - T A = P * R θJA(t) 0.001 0.01 0.1 t 1, TIME (s ec) 1 10 100 300 Figure 21. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6680S Rev C (W) FDS6984S Typical Characteristics (continued) SyncFET Schottky Body Diode Characteristics Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. 3A/DIV IDSS, REVERSE LEAKAGE CURRENT (A) Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 22 shows the reverse recovery characteristic of the FDS6984S. 0.1 125oC 0.01 0.001 o 25 C 0.0001 0.00001 0 10 20 30 VDS, REVERSE VOLTAGE (V) Figure 24. SyncFET body diode reverse leakage versus drain-source voltage and temperature. 10nS/DIV Figure 22. FDS6984S SyncFET body diode reverse recovery characteristic. 3A/DIV For comparison purposes, Figure 23 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690A). 0V 10nS/DIV Figure 23. Non-SyncFET (FDS6690A) body diode reverse recovery characteristic. FDS6680S Rev C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1