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FDW2506P

FDW2506P

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TSSOP8_3X4.4MM

  • 描述:

    MOSFET 2P-CH 20V 5.3A 8-TSSO

  • 数据手册
  • 价格&库存
FDW2506P 数据手册
FDW2506P Dual P-Channel 2.5V Specified PowerTrench MOSFET General Description Features This P-Channel 2.5V specified MOSFET is a rugged gate version of Fairchild's Semiconductor’s advanced PowerTrench process. It has been optimized for power management applications with a wide range of gate drive voltage (2.5V – 12V). • –5.3 A, –20 V, • Extended VGSS range (±12V) for battery applications Applications • Low gate charge • Load switch • High performance trench technology for extremely low RDS(ON) • Motor drive • DC/DC conversion RDS(ON) = 0.022 Ω @ VGS = –4.5 V. RDS(ON) = 0.033 Ω @ VGS = –2.5V. • Low profile TSSOP-8 package • Power management G2 S2 S2 D2 G1 S1 S1 D1 TSSOP-8 1 8 2 7 3 6 4 5 Pin 1 Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter –20 V VGSS Gate-Source Voltage ±12 V ID Drain Current –5.3 A – Continuous (Note 1) – Pulsed PD –30 Power Dissipation for Single Operation TJ, TSTG (Note 1a) 1.0 (Note 1b) 0.6 W -55 to +150 °C (Note 1a) 125 °C/W (Note 1b) 208 Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 2506P FDW2506P 13’’ 12mm 2500 units 2000 Fairchild Semiconductor Corporation FDW2506P Rev. C (W) FDW2506P October 2000 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units –12 mV/°C Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA ∆BVDSS ===∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = –250 µA, Referenced to 25°C VDS = –16 V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = –12 V, VDS = 0 V –100 nA IGSSR Gate–Body Leakage, Reverse VGS = 12 V, VDS = 0 V 100 nA On Characteristics –20 V (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA ∆VGS(th) ===∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = –250 µA, Referenced to 25°C ID(on) On–State Drain Current VGS = –4.5 V, ID = –5.3 A ID = –4.4 A VGS = –2.5 V, VGS = –4.5 V, ID = –5.3 A, TJ=125°C VGS = –4.5 V, VDS = –5 V gFS Forward Transconductance VDS = –5 V, ID = –5.3 A VDS = –10 V, f = 1.0 MHz V GS = 0 V, VDD = –5 V, VGS = –4.5 V, ID = –1 A, RGEN = 6 Ω –0.6 –0.8 –1.5 3 0.018 0.026 0.023 V mV/°C 0.022 0.033 0.035 –30 Ω A 24 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) tf Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge 1015 pF 446 pF 118 pF (Note 2) 13 23 ns 17 31 ns Turn–Off Delay Time 75 120 ns Turn–Off Fall Time 38 61 ns 21 34 nC VDS = –10V, VGS = –4.5 V ID = –5.3 A, 4.5 nC 6 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = –0.83 A (Note 2) –0.7 –0.83 A –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA is 125°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4. b) RθJA is 208°C/W (steady state) when mounted on a minimum copper pad on FR-4. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDW2506P Rev. C (W) FDW2506P Electrical Characteristics FDW2506P Typical Characteristics 30 2.6 -ID, DRAIN CURRENT (A) -3.0V -3.5V 25 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = -4.5V -2.5V 20 15 -2.0V 10 5 0 2.4 VGS = -2.0V 2.2 2 1.8 1.6 -2.5V 1.4 -3.0V 1.2 -3.5V -4.5V 1 0.8 0 1 2 3 4 0 6 12 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. 30 0.07 ID = -5.3A VGS = -4.5V 1.3 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 24 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.4 1.2 1.1 1 0.9 0.8 ID = -2.7A 0.06 0.05 0.04 TA = 125oC 0.03 TA = 25oC 0.02 0.01 -50 -25 0 25 50 75 100 125 150 1 2 o 3 4 5 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 TA = -55oC VDS = -5V -IS, REVERSE DRAIN CURRENT (A) 30 25oC 25 -ID, DRAIN CURRENT (A) 18 -ID, DIRAIN CURRENT (A) o 125 C 20 15 10 5 0 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDW2506P Rev. C (W) FDW2506P Typical Characteristics 3500 ID = -5.3A VDS = -5V f = 1 MHz VGS = 0 V 3000 -10V 4 -15V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 2500 CISS 2000 1500 1000 1 COSS 500 CRSS 0 0 0 4 8 12 16 20 24 0 4 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 12 16 20 Figure 8. Capacitance Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 30 RDS(ON) LIMIT -ID, DRAIN CURRENT (A) 8 -VDS, DRAIN TO SOURCE VOLTAGE (V) 100µ 10 10ms 100ms 1s 1 10s DC VGS = -4.5V SINGLE PULSE RθJA = 208oC/W 0.1 TA = 25oC 1 10 20 15 10 5 0 0.001 0.01 0.1 SINGLE PULSE RθJA = 208°C/W TA = 25°C 25 100 0.01 Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 0.1 1 10 100 1000 t1, TIME (sec) -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) + RθJA RθJA = 208 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDW2506P Rev. C (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. F1