FL7760AM6X

FL7760 High-Side Sensing Constant Current Buck Controller for High Switching Frequency LED Driver www.onsemi.com The FL7760 is a constant current step−down CCM controller for wide output power LED lighting applications. The FL7760 adapts hysteretic reference architecture that accurately regulates LED current by sensing voltage across an external high side sense resistor. This control scheme can stabilize LED current against input voltage and output load transient condition and implement optimal PWM and analog dimming control. Time delay control method widens analog dimming range down to less than 5%. FL7760 has low 200 mV reference voltage to maximize system efficiency and high frequency driving capability so that system profile can be minimized in wide scale power ranges. The FL7760 implements PWM and analog dimming together through a DIM pin and provides thermal shutdown (TSD), and under−voltage lockout (UVLO) protections. SOT23−6LD CASE 527AJ MARKING DIAGRAM SEN 60xT VIN Features • • • • • • • • • • VCC DRV Wide Input Range (8 VDC~70 VDC) Continuous Conduction Mode Operation Hysteretic LED Current Control Wide analog dimming range down to 5% Wide PWM dimming duty range to 0.2% at 2 kHz PWM freq. High switching frequency up to 1 MHz High source / sink current of 1.5 A / 2.5 A Cycle−by−Cycle Peak Current Limit Low Operating Current (300 uA) Low Stand−by Current (240 uA) GND (Top View) 60 : x: T: Production Identifier Version (A or B) Wafer Lot Code Week Code Year Code ORDERING INFORMATION See detailed ordering and shipping information on page 4 of this data sheet. Typical Applications • LED Lighting System © Semiconductor Components Industries, LLC, 2017 November, 2018 − Rev. 5 1 Publication Order Number: FL7760/D FL7760 RsenH Line input Maxim 70 Vdc C IN Dfrd F1 Analog or PWM Dimming Signal 1 6 VIN SEN Lm 3 DIM 5 VCC 2 GND CVCC DRV Q1 4 FL7760 Figure 1. Application Schematic for Analog or PWM Dimming Table 1. PIN FUNCTION DESCRIPTION Pin Pin Name Function Description 1 VIN IC Input Connect to the high voltage input line and supply current to the IC. 2 GND Ground Ground of IC. 3 DIM Analog / PWM / Hybrid / Dimming 4 DRV Driver Output 5 VCC IC Supply 6 SEN Current Sense DIM voltage determines LED current regulation reference and switching is terminated when DIM voltage is 0 V. If dimming function is not used, it is recommended to add a 0.1 mF bypass capacitor between DIM and GND. Connect to the MOSFET gate. Supply pin for IC operation. The SEN pin is used to set the output LED current regulation. www.onsemi.com 2 FL7760 SEN 6 V SENSE VIN 1 High Side Current Sense TSD S Q Shutdown UVLO R LEB Regulation VCC 5 + VDD Good V CC Good VRH 30mV S + V RL Gate Driver Q + 2 3 DIM 4 DRV 3 DIM 6uA 3V max . clamping x 1/15 34 ms counter Standby + GND DRV R 30mV Internal Bias 4 0.45/0.50V a) A Version (with Time Delay Control) SEN 6 V SENSE VIN 1 High Side Current Sense TSD S Q Shutdown UVLO R Regulation VCC 5 + V CC Good LEB VDD Good VRH 30mV S + V RL Q R + 30mV 2 Internal Bias 6uA 3V max . clamping x 1/15 Standby 34 ms counter b) B Version (without Time Delay Control) Figure 2. Block Diagram www.onsemi.com 3 + GND Gate Driver 0.45/0.50V FL7760 Table 2. MAXIMUM RATINGS Value Unit VIN(MAX) Symbol Maximum VIN Pin Voltage Range Rating −0.3 to 70 V SEN(MAX) Maximum SEN Pin Voltage Range −0.3 to 70 V VCC(MAX) VCC Pin Voltage Range −0.3 to 5.5 V VDIM(MAX) DIM Pin Voltage Range −0.3 to 5.5 V VDRV(MAX) DRV Pin Voltage Range −0.3 to 5.5 V VCC(PULSE) Maximum VCC Pin Pulse Voltage at tPULSE < 20 ns 8 V VDRV(PULSE) Maximum DRV Pin Pulse Voltage at tPULSE < 20 ns 8 V 150 °C −65 to 150 °C TJ(MAX) Maximum Junction Temperature TSTG Storage Temperature Range RqJA Junction−to−Ambient Thermal Impedance 263 °C/W Power Dissipation 247 mW ESDHBM ESD Capability, Human Body Model (Note 2) 1.2 kV ESDCDM ESD Capability, Charged Device Model (Note 2) 2 kV PD Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters 2. This device series incorporates ESD protection and is tested by the following methods ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78 Table 3. ORDERING INFORMATION Package Shipping† FL7760AM6X 6LD,SOT23, JEDEC MO−178 VARIATION AB, 1.6MM WIDE Tape & Reel FL7760BM6X 6LD,SOT23, JEDEC MO−178 VARIATION AB, 1.6MM WIDE Tape & Reel Device Table 4. RECOMMENDED OPERATING RANGES Rating Ambient Temperature Symbol Min Max Unit TA −40 125 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 5. ELECTRICAL CHARACTERISTICS (VCC = 5 V, For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, Max Tj = 150°C, unless otherwise noted) Condition Symbol Min Typ Max Unit Self BIAS Start Threshold Voltage VCC = 5 V VIN,ON 7.05 7.5 7.95 V Self BIAS Stop Threshold Voltage VCC = 5 V VIN,OFF 6.55 7 7.45 Characteristics VIN SECTION Self BIAS Current for Startup (Note 3) IST 2 V mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. This item is guaranteed by design. 4. This is only a recommended specification and there is no limit to the PWM Dimming frequency. 5. Drift after IC reliability test (JEDEC JESD22−A08) is not included. 6. This value indicates the change in internal reference voltage with temperature change and indicates the rate of change based on 25 °C ambient temperature. This item is guaranteed by design. www.onsemi.com 4 FL7760 Table 5. ELECTRICAL CHARACTERISTICS (VCC = 5 V, For typical values Tj = 25°C, for min/max values Tj = −40°C to +125°C, Max Tj = 150°C, unless otherwise noted) Characteristics Condition Symbol Min Typ Max Unit VCC Regulator Output Voltage VVIN = 24 VDC VCC 4.5 5 5.5 V IC Start Threshold Voltage VCC Increasing VCC,ON 4.04 4.50 4.95 V IC Stop Threshold Voltage VCC Decreasing VCC,OFF 3.03 3.50 3.96 V VCC SECTION UVLO Hysteresis VCC,HYS 0.505 1.000 1.485 V Operation Current No Switching ICC 51 300 495 uA Stand−by Current (Note 3) No Switching Istby 0.1 0.24 0.4 mA Gate High Voltage VGATE,H 4.5 5 5.5 V Gate Low Voltage VGATE.L 0.5 V GATE SECTION Peak Pull−up Current (Note 3) VCC = 5 V IGATE,pullup 1.5 A Peak Pull−down Current (Note 3) VCC = 5 V IGATE,pulldown 2.5 A FSW,MAX 1 MHz Recommended Maximum Operating Frequency (Note NO TAG) CURRENT−SENSE AND REFERENCE SECTION Internal Reference Voltage VDIM = 3.5 V (TJ = 25°C) VFB,DC 192 200 208 mV Internal Reference Voltage Drift (Note 5) VDIM = 3.5 V (TJ = 25°C) VFB,DC,R 196 200 204 mV Variation of VFB,DC for Temperature (Note 6) VDIM = 3.5 V VFB,DC,T ±118.2 Feedback Reference Voltage Hysteresis VDIM = 3.5 V VFB,HYS ±30 mV Minimum On−Time (Note 3) tON,MIN 200 ns Minimum Off−Time (Note 3) tOFF,MIN 200 ns uV/°C SWITCHING SECTION DIMMING SECTION VDIM,MAX 2.7 3.0 3.3 V VDIM,MIN 0.40 0.45 0.50 V VDIM,R 0.45 0.50 0.55 V Ipull up,DIM 5 6 7 uA VDIM = 0.5 V TDelay.max 5.00 5.35 5.70 us Delay Time at 3 VDIM (A version only, Note 3) VDIM = 3 V TDelay.min 28.5 30.0 31.5 ns Blanking Time for Standby Mode (Note 3) VDIM = 0 V TBlank.stby 28 34 40 ms 140 150 °C 30 °C Maximum Effective Dimming Voltage (Note 3) Minimum Effective Dimming Voltage VDIM>VDIM,R then decreased Dimming Recovery Voltage Internal Sourcing Current Pull up to 3V Delay Time at 0.5 VDIM (A version only, Note 3) THERMAL SHUT DOWN SECTION Thermal Shutdown Temperature (Note 3) Hysteresis Temperature of TSD (Note 3) Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. This item is guaranteed by design. 4. This is only a recommended specification and there is no limit to the PWM Dimming frequency. 5. Drift after IC reliability test (JEDEC JESD22−A08) is not included. 6. This value indicates the change in internal reference voltage with temperature change and indicates the rate of change based on 25 °C ambient temperature. This item is guaranteed by design. www.onsemi.com 5 FL7760 7 7 6 6 5 5 VCC−ON (V) VCC (V) TYPICAL CHARACTERISTICS 4 3 4 3 2 2 1 1 0 0 -40 -20 0 20 40 60 80 100 120 -40 140 -20 TJ, JUNCTION TEMPERATURE (°C) 40 60 80 100 120 140 Figure 4. VCC−ON vs. Temperature 7 0.7 6 0.6 5 0.5 4 0.4 ICC (mA) VCC−OFF (V) 20 TJ, JUNCTION TEMPERATURE (°C) Figure 3. VCC vs. Temperature 3 0.3 2 0.2 1 0.1 0 0.0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 0 TJ, JUNCTION TEMPERATURE (°C) 20 40 60 80 100 120 140 TJ, JUNCTION TEMPERATURE (°C) Figure 5. VCC−OFF vs. Temperature Figure 6. ICC vs. Temperature 350 350 300 300 250 250 VFB−LOW (mV) VFB−HIGH (mV) 0 200 150 100 200 150 100 50 50 0 0 -40 -20 0 20 40 60 80 100 120 -40 140 TJ, JUNCTION TEMPERATURE (°C) -20 0 20 40 60 80 100 TJ, JUNCTION TEMPERATURE (°C) Figure 7. VFB−HIGH vs. Temperature Figure 8. VFB−LOW vs. Temperature www.onsemi.com 6 120 140 FL7760 45 0.7 40 0.6 35 0.5 VDIM−MIN (mV) VFB−HYS (±mV) TYPICAL CHARACTERISTICS (Continued) 30 25 20 0.4 0.3 0.2 15 0.1 10 0.0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 TJ, JUNCTION TEMPERATURE (°C) Figure 9. VFB−HYS vs. Temperature 8.6 0.6 8.4 VIN−ON (V) VDIM−R (mV) 0.3 80 100 120 140 7.8 7.6 7.4 0.2 7.2 0.1 7.0 6.8 0.0 6.6 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 11. VDIM−R vs. Temperature Figure 12. VIN−ON vs. Temperature 8.0 1.0 7.8 0.9 7.6 0.8 7.4 0.7 VIN−HYS (V) VIN−OFF (V) 60 8.0 0.4 7.2 7.0 6.8 0.5 0.4 0.3 6.4 0.2 6.2 0.1 0.0 -20 0 20 40 60 80 100 120 140 -40 TJ, JUNCTION TEMPERATURE (°C) -20 0 20 40 60 80 100 120 TJ, JUNCTION TEMPERATURE (°C) Figure 14. VIN−HYS vs. Temperature Figure 13. VIN−OFF vs. Temperature www.onsemi.com 7 140 0.6 6.6 -40 40 8.2 0.5 6.0 20 Figure 10. VDIM−MIN vs. Temperature 0.7 -40 0 TJ, JUNCTION TEMPERATURE (°C) 140 FL7760 APPLICATION INFORMATION General generated and the MOSFET is turned on, the LED current is still close to zero in the crossover distortion area where the input voltage is lower than the LED forward voltage. The FL7760 is a step down hysteretic LED current controller that is easily configured in varies input voltage range from 8 V to 70 V. The converter employs a high side current sensing resistor to detect and regulate the LED current. Analog, PWM and hybrid dimming can be easily implemented with single DIM pin. In addition, the time delay control operation can realize analog dimming less than 5%. Soft Start The hysteric reference voltage to regulate LED current is proportional to DIM voltage. Internal current source [6 uA] charges an external capacitor connected at DIM pin and soft start time can be programmable with capacitances. Soft start time can be calculated as below equation. Continuous Conduction Mode Regulation The FL7760 employs hysteretic reference architecture that accurately regulates LED current by detecting an external high−side current−sense resistor voltage. The voltage across the current sensing resistor is kept measured and regulated in 200 mV±15% range. This control scheme performs stable LED current regulation at input voltage and load transient conditions.. T SoftStart + C DIM 3V (eq. 1) 6uA Vin VDIM VVIN −V SEN High Reference VVIN −VSEN High Reference Low Reference Low Reference Gate Figure 17. Soft Start with DIM pin Resistor Figure 15. CCM Operation with Hysteresis Vin VIN biasing at startup Internal VIN biasing circuit quickly charges external VCC capacitor to begin IC operation. During the initial start−up, the VCC pin voltage gradually increases, and when the voltage reaches 4.5 V, the IC starts operating by VCC good signal. VDIM VVIN −VSEN High Reference Vin Low Reference LED V F 7.5V 7V Cross Over Distortion Figure 18. Soft Start with DIM pin Capacitor Cross Over Distortion VCC 4.5V Although soft start is not preferred, small filtering capacitor (~ hundreds pF) at DIM pin is recommended for noise immunity. PWM dimming signal delivered from an external PWM generator can be filtered by the capacitor, so the capacitor value needs to be carefully selected by considering an output impedance of PWM signal generator. 4V V DIM V VIN −VSEN High Reference Low Reference Analog Dimming When DIM voltage is higher than 3 V, hysteretic reference voltage is set to 200 mV±30 mV. This hysteretic reference condition limits LED current ripple spec of ±15% without storage capacitor in parallel with the LED string. The control range of the DIM pin in analog dimming is from 3 V to 0.5 V. As DIM voltage decreases, hysteretic Gate Figure 16. Start Up and Regulation Thereafter, the internal current source in the DIM pin pulls up the DIM voltage and internal hysteresis reference is enabled with gate switching. Although the gate signal is www.onsemi.com 8 FL7760 at DIM pin. It provides wide dimming range with good dimming linearity. references are reduced accordingly with the fixed +/−30 mV hysteresis. To perform wide analog dimming range to less than 5%, the FL7760 has Time Delay Control (built in version A) with hysteresis control. In this delay control method, gate is not turned on during the delay time determined by DIM voltage once VVIN − VSEN reaches to the low reference. Therefore, operating mode is entered into DCM (Discontinuous Current Mode) that makes non−linear dimming curve in low DIM voltage range. Therefore, for analog dimming application with wide dimming requirement, version A is recommended and for PWM dimming application with linear dimming curve, version B is preferred. V FB.REF High Side Reference 230mV 170mV 3V VDIM t 3V t ILED t No Dimming Analog Dimming Hybrid Dimming (Analog DIM + PWM DIM) Figure 21. Hybrid Dimming 100 Standby Operation 90 When the voltage of the DIM pin falls below 0.45 V for 34 ms, standby mode is entered and the power consumption of the control circuitry is minimized. Standby mode is terminated once DIM voltage is over 0.5 V. 80 LED Current Ratio [%] Low Side Reference 60mV (200mV±30mV) 70 60 50 VDim 40 0.45V 30 0.5V 20 TBlank.stby 10 34ms 0 0 0.5 1 1.5 2 2.5 3 3.5 Standby mode Analog Dimming Voltage [V] Figure 19. Analog Dimming Curve Gate PWM Dimming If the DIM pin voltage is less than 0.45 V for 1 us blanking time, FL7760 stops switching. When the DIM voltage is up again over 0.5 V for the blanking time, switching begins. Based on the blanking time, the minimum duty ratio for PWM dimming can be calculated as 0.2% for a 2 kHz dimming signal. Normal Mode Stby Mode Normal Mode Figure 22. Standby Mode Thermal Shut Down If internal junction temperature is higher than 150°C, TSD protection is triggered and released with 30°C hysteresis. VDim Selection the Input Capacitor A low ESR input capacitor reduces the surge current and switching noise drawn from the front end power supply. Ceramic capacitors (100 ~ 120 nF) closely connected to VIN and GND pin can be effective in bypassing switching noise generated from front−end power stage and FL7760 buck converter stage. TBlank 1us 1us 1us Gate No Gate Figure 20. PWM Dimming Hybrid Dimming The FL7760 can implement hybrid dimming by adjusting amplitude and duty ratio of the single DIM signal provided www.onsemi.com 9 FL7760 Single layer PCB layout guidance 3 C IN Elec− Capacitor CIN Bypass Capacitor RsenH 1 Dfrd 5 Analog or PWM Dimming Signal 1 6 VIN SEN Lm 3 DIM 5 VCC CDIM Bypass Capacitor 2 C VCC 4 2 GND Q1 DRV 4 FL7760 5 PG (Power GND) SG (Signal GND) 1 CIN bypass capacitor is closely connected to VIN and GND pins . 2 CDIM bypass capacitor is closely connected to DIM and GND pins . 3 Sensing resistor is connected close at VIN and SEN pins . 4 VCC capacitor is connected close at VCC pin . 5 SG and PG are combined and connected close at GND pin . Figure 23. Single layer PCB layout guidance www.onsemi.com 10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−23, 6 Lead CASE 527AJ ISSUE B DATE 29 FEB 2012 SCALE 2:1 D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DATUM C IS THE SEATING PLANE. B 6 5 4 1 2 3 E E1 DIM A A1 A2 b c D E E1 e L L2 GAGE PLANE 6X e L2 TOP VIEW b 0.20 SEATING PLANE L M C A S B S DETAIL A A2 c A 6X 0.10 C A1 C SIDE VIEW GENERIC MARKING DIAGRAM* DETAIL A SEATING PLANE END VIEW XXX MG G RECOMMENDED SOLDERING FOOTPRINT* 3.30 1 XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) 6X 0.85 6X 0.56 MILLIMETERS MIN MAX --1.45 0.00 0.15 0.90 1.30 0.20 0.50 0.08 0.26 2.70 3.00 2.50 3.10 1.30 1.80 0.95 BSC 0.20 0.60 0.25 BSC *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: STATUS: 98AON34321E ON SEMICONDUCTOR STANDARD REFERENCE: © Semiconductor Components Industries, LLC, 2002 October, DESCRIPTION: 2002 − Rev. 0 SOT−23, 6 LEAD http://onsemi.com 1 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. Case Outline Number: PAGE 1 OFXXX 2 DOCUMENT NUMBER: 98AON34321E PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM POD #SOT236−029−01 TO ON SEMICONDUCTOR. REQ. BY B. BERGMAN. 19 DEC 2008 A REDRAWN TO JEDEC STANDARDS. REQ. BY D. TRUHITTE. 12 JAN 2011 B CORRECTED LABEL FOR MOLDED BODY DIMENSION OF TOP VIEW TO E1. REQ. BY D. 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