FQD2N60CTM_WS

DATA SHEET www.onsemi.com MOSFET – N-Channel, QFET) VDSS RDS(ON) MAX ID MAX 600 V 4.7  @ 10 V 1.9 A 600 V, 1.9 A, 4,7 W D FQD2N60C / FQU2N60C This N−Channel enhancement mode power MOSFET is produced using onsemi’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on−state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts. G S Features • • • • • 1.9 A, 600 V, RDS(on) = 4.7  (Max.) @ VGS = 10 V, ID = 0.95 A Low Gate Charge (Typ. 8.5 nC) Low Crss (Typ. 4.3 pF) 100% Avalanche Tested These Devices are Halid Free and are RoHS Compliant DPAK3 (IPAK) CASE 369AR MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol MARKING DIAGRAMS Value Unit Drain−Source Voltage 600 V Drain Current − Continuous (TC = 25°C) − Continuous (TC = 100°C) 1.9 1.14 A Drain Current − Pulsed 7.6 A Gate−Source Voltage ±30 V EAS Single Pulsed Avalanche Energy (Note 2) 120 mJ IAR Avalanche Current (Note 1) 1.9 A EAR Repetitive Avalanche Energy (Note 1) 4.4 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) VDSS ID IDM VGSS PD TJ, TSTG TL Rating (Note 1) 4.5 V/ns Power Dissipation (TA = 25°C) * 2.5 W Power Dissipation (TC = 25°C) − Derate above 25°C 44 0.35 W W/°C −55 to +150 °C 300 °C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/8” (from case for 5 seconds) DPAK3 (TO−252 3 LD) CASE 369AS Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. $Y&Z&3&K FQU 2N60C FQD2N60C, FQU2N60C $Y &Z &3 &K $Y&Z&3&K FQD 2N60C = Device Code = onsemi Logo = Assembly Location = Date Code = Lot Run Traceability Code ORDERING INFORMATION Device Package Shipping† FQD2N60CTM DPAK3 (TO−252 3 LD) (Pb−Free) 2500 / Tape & Reel FQU2N60CTU DPAK3 (IPAK) (Pb−Free) 70 Units / Tube †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2004 April, 2022 − Rev. 3 1 Publication Order Number: FQU2N60C/D FQD2N60C / FQU2N60C THERMAL CHARACTERISTICS Symbol Parameter Value Unit RJC Thermal Resistance, Junction−to−Case, Max. 2.87 °C/W RJA Thermal Resistance, Junction−to−Ambient (minimum pad of 2 oz copper), Max. 110 °C/W Thermal Resistance, Junction−to−Ambient (* 1 in2 pad of 2 oz copper), Max. 50 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified) Symbol Parameter Test Condition Min Typ Max Unit 600 − − V OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage ID = 250 A, VGS = 0 V BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = 250 A, Referenced to 25°C − 0.6 − V/°C IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V − − 1 A VDS = 480 V, TC = 125°C − − 10 BVDSS IGSSF Gate−Body Leakage Current, Forward VGS = 30 V, VDS = 0 V − − 100 nA IGSSR Gate−Body Leakage Current, Reverse VGS = −30 V, VDS = 0 V − − −100 nA ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A 2.0 − 4.0 V RDS(on) Static Drain−Source On Resistance VGS = 10 V, ID = 0.95 A − 3.6 4.7  Forward Transconductance VDS = 40 V, ID = 0.95 A − 5.0 − S VDS = 25 V, VGS = 0 V, f = 1.0 MHz − 180 235 pF − 20 25 − 4.3 5.6 − 9 28 − 25 60 gFS DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance SWITCHING CHARACTERISTICS VDD = 300 V, ID = 2 A, RG = 25  ns td(on) Turn−On Delay Time tr Turn−On Rise Time td(off) Turn−Off Delay Time − 24 58 tf Turn−Off Fall Time − 28 66 − 8.5 12 − 1.3 − − 4.1 − Maximum Continuous Drain−Source Diode Forward Current − − 1.9 A ISM Maximum Pulsed Drain−Source Diode Forward Current − − 7.6 A VSD Qg Total Gate Charge Qgs Gate−Source Charge Qgd Gate−Drain Charge VDS = 480 V, ID = 2 A, VGS = 10 V (Note 4) (Note 4) nC DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Drain−Source Diode Forward Voltage VGS = 0 V, IS = 1.6 A − − 1.4 V trr Reverse Recovery Time − 230 − ns Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A, dIF/dt = 100 A/s − 1.0 − C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. Repetitive Rating : Pulse width limited by maximum junction temperature. 2. L = 56 mH, IAS = 2 A, VDD = 50 V, RG = 25 , Starting TJ = 25°C. 3. ISD ≤ 2.0 A, di/dt ≤ 200A/s, VDD ≤ BVDSS, Starting TJ = 25°C. 4. Essentially independent of operating temperature. www.onsemi.com 2 FQD2N60C / FQU2N60C TYPICAL CHARACTERISTICS 100 VGS Top: 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Bottom: 4.5 V 10−1 *Notes: 1. 250 s Pulse Test 2. TC = 25°C 10−2 10−1 ID, Drain Current (A) ID, Drain Current (A) 101 100 150°C 100 25°C 10−1 101 *Notes: 1. VDS = 40 V 2. 250 s Pulse Test 2 4 Figure 1. On−Region Characteristics 8 10 Figure 2. Transfer Characteristics 12 10 IDR, Reverse Drain Current (A) RDS(on), Drain−Source On−Resistance () 6 VGS, Gate−Source Voltage (V) VDS, Drain−Source Voltage (V) VGS = 10 V 8 6 4 VGS = 20 V 2 *Note: TJ = 25°C 0 1 0 2 3 4 150°C 100 10−1 0.2 5 0.4 350 300 250 Coss 200 100 50 0 Crss *Notes: 1. VGS = 0 V 2. f = 1 MHz 10−1 100 1.4 VDS = 120 V Ciss 150 1.2 12 VGS, Gate−Source Voltage (V) 400 1.0 0.8 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 450 0.6 VSD, Source−Drain Voltage (A) Figure 3. On−Resistance Variation vs. Drain Current and Gate Voltage 500 25°C *Notes: 1. VGS = 0 V 2. 250 s Pulse Test ID, Drain Current (A) Capacitance (pF) −55°C 10 VDS = 480 V 8 6 4 2 0 101 VDS = 300 V *Note: ID = 2 A 0 2 4 6 8 QG, Total Gate Charge (nC) VDS, Drain−Source Voltage (V) Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics www.onsemi.com 3 10 FQD2N60C / FQU2N60C TYPICAL CHARACTERISTICS (continued) 3.0 RDS(ON), (Normalized) Drain−Source On−Resistance BVDSS, (Normalized) Drain−Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 −100 *Notes: 1. VGS = 0 V 2. ID = 250 s −50 0 50 100 150 2.5 2.0 1.5 1.0 *Notes: 1. VGS = 10 V 2. ID = 0.95 A 0.5 0.0 −100 200 −50 200 1.6 ID, Drain Current (A) 100 1 ms 10 ms 100 ms *Note: 1. TC = 25°C 2. TJ = 150°C 3. Single Pulse DC 1.2 0.8 0.4 0.0 101 102 103 50 25 75 100 125 150 VDS, Drain−Source Voltage (V) TC, Case Temperature (°C) Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs. Case Temperature ZJC(t), Thermal Response (°C/W) ID, Drain Current (A) 150 2.0 Operation This Area is Limited by RDS(on) 100 s 10−2 100 100 Figure 8. On−Resistance Variation vs. Temperature Figure 7. Breakdown Voltage Variation vs. Temperature 10−1 50 TJ, Junction Temperature (°C) TJ, Junction Temperature (°C) 101 0 D = 0.5 100 0.2 0.1 PDM 0.05 0.02 10−1 t2 *Notes: 1. ZJC(t) = 2.87°C/W Max. 2. Duty Factor, D = t1/t2 3. TJM − TC = PDM × ZJC(t) 0.01 Single Pulse 10−5 10−4 t1 10−3 10−2 10−1 t1, Square Wave Pulse Duration (s) Figure 11. Transient Thermal Response Curve www.onsemi.com 4 100 101 FQD2N60C / FQU2N60C Same Type as DUT 50 k VGS Qg 12 V 10V 300 nF 200 nF VDS VGS Qgs Qgd DUT IG = const. Charge Figure 12. Gate Charge Test Circuit & Waveform RL VDS VDS 90% VDD VGS RG VGS DUT VGS 10% td(on) td(off) t f tr toff ton Figure 13. Resistive Switching Test Circuit & Waveforms BV DSS 1 2 E AS +  LI AS  BV DSS * V DD 2 L VDS BVDSS ID IAS RG VDD ID(t) DUT VGS VDD tP VDS(t) tp Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 5 Time FQD2N60C / FQU2N60C DUT + VDS _ ISD L Driver RG Same Type as DUT VGS VGS (Driver) VDD • dv/dt controlled by RG • ISD controlled by pulse period D= Gate Pulse Width 10 V Gate Pulse Period IFM, Body Diode Forward Current ISD di/dt (DUT) IRM Body Diode Reverse Current VDS Body Diode Recovery dv/dt (DUT) VSD VDD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms QFET is a registered trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK3 (IPAK) CASE 369AR ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13815G DPAK3 (IPAK) DATE 30 SEP 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK3 (TO−252 3 LD) CASE 369AS ISSUE A DATE 28 SEP 2022 GENERIC MARKING DIAGRAM* XXXXXX XXXXXX AYWWZZ XXXX A Y WW ZZ = Specific Device Code = Assembly Location = Year = Work Week = Assembly Lot Code DOCUMENT NUMBER: DESCRIPTION: *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 98AON13810G DPAK3 (TO−252 3 LD) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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