FQD4P40TM

P-Channel QFET® MOSFET -400 V, -2.7 A, 3.1 Ω Features Description These P-Channel enhancement mode power field effect transistors are produced using ON Semiconductor’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge. • -2.7 A, -400 V, RDS(on) = 3.1 Ω (Max.) @ VGS = -10 V, ID = -1.35 A • Low Gate Charge (Typ. 18 nC) • Low Crss (Typ. 11 pF) • 100% Avalanche Tested S D G S D-PAK Absolute Maximum Ratings T Symbol VDSS G o C = 25 C unless otherwise noted. Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current ID - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage - Pulsed D FQD4P40TM -400 (Note 1) Unit V -2.7 A -1.71 A -10.8 A ± 30 V mJ EAS Single Pulsed Avalanche Energy (Note 2) 260 IAR Avalanche Current (Note 1) -2.7 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 5.0 -4.5 2.5 mJ V/ns W 50 0.4 -55 to +150 W W/°C °C 300 °C dv/dt PD Power Dissipation (TC = 25°C) TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RJC RJA Parameter FQD4P40TM Thermal Resistance, Junction to Case, Max. 2.5 Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110 2 Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max. ©2000 Semiconductor Components Industries, LLC. October-2017,Rev. 3 Unit oC/W 50 Publication Order Number: FQD4P40/D FQD4P40 — P-Channel QFET® MOSFET FQD4P40 Part Number FQD4P40TM Electrical Characteristics T Symbol Package DPAK Top Mark FQD4P40 Packing Method Tape and Reel Reel Size 330 mm Tape Width 16 mm Quantity 2500 units o C = 25 C unless otherwise noted. Parameter Test Conditions Min Typ Max Unit -400 -- -- V -- 0.36 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = -400 V, VGS = 0 V -- -- -1 µA VDS = -320 V, TC = 125°C -- -- -10 µA IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -3.0 -- -5.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -1.35 A -- 2.44 3.1 Ω gFS Forward Transconductance VDS = -50 V, ID = -1.35 A -- 2.5 -- S VDS = -25 V, VGS = 0 V, f = 1.0 MHz -- 520 680 pF -- 80 105 pF -- 11 15 pF -- 13 35 ns -- 55 120 ns -- 35 80 ns -- 37 85 ns -- 18 23 nC -- 3.8 -- nC -- 9.4 -- nC Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -200 V, ID = -3.5 A, RG = 25 Ω (Note 4) VDS = -320 V, ID = -3.5 A, VGS = -10 V (Note 4) Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -2.7 A ISM -- -- -10.8 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -2.7 A Drain-Source Diode Forward Voltage -- -- -5.0 V trr Reverse Recovery Time -- 260 -- ns Qrr Reverse Recovery Charge VGS = 0 V, IS = -3.5 A, dIF / dt = 100 A/µs -- 1.4 -- µC
 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. L = 62 mH, IAS = -2.7 A, VDD = -50 V, RG = 25 Ω, starting TJ = 25oC. 3. ISD ≤ -3.5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC. 4. Essentially independent of operating temperature. www.onsemi.com 2 FQD4P40 — P-Channel QFET® MOSFET Package Marking and Ordering Information 1 10 1 10 VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -6.0 V Bottom : -5.5 V -I D, Drain Current [A] 0 10 -I D , Drain Current [A] Top : -1 10 ※ Notes : 1. 250μs Pulse Test 2. TC = 25℃ -2 10 0 10 150℃ 25℃ -55℃ -1 -1 0 10 10 1 10 10 2 4 Figure 1. On-Region Characteristics 10 1 10 VGS = - 10V 6 -I DR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 8 Figure 2. Transfer Characteristics 8 VGS = - 20V 4 2 ※ Note : TJ = 25℃ 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μs Pulse Test -1 0 3 12 10 0.0 0.5 1.0 -ID , Drain Current [A] 1200 Ciss 600 Coss 400 0 -1 10 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Crss 0 10 2.5 3.0 12 1 10 10 -V GS , Gate-Source Voltage [V] 800 200 2.0 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1000 1.5 -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Capacitance [pF] 6 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] 0 ※ Notes : 1. VDS = -50V 2. 250μs Pulse Test VDS = -80V VDS = -200V 8 VDS = -320V 6 4 2 ※ Note : ID = -3.5 A 0 0 Figure 5. Capacitance Characteristics 2 4 6 8 10 12 14 16 18 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 6. Gate Charge Characteristics www.onsemi.com 3 20 FQD4P40 — P-Channel QFET® MOSFET  !    2.5 2.0 1.1 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage 1.2 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μA 0.9 0.8 -100 -50 0 50 100 150 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -1.75 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 Operation in This Area is Limited by R DS(on) 2.5 1 -I D, Drain Current [A] 100 µs 1 ms 0 DC 10 -1 10 10 ms ※ Notes : o 1. TC = 25 C 2.0 1.5 1.0 0.5 o 2. TJ = 150 C 3. Single Pulse -2 10 0 1 10 2 10 0.0 25 3 10 10 50 Figure 9. Maximum Safe Operating Area 10 125 D = 0 .5 0 ※ N o te s : 1 . Z θ J C ( t ) = 2 . 5 ℃ /W M a x . 2 . D u ty F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C( t ) 0 .1 0 .0 5 -1 0 .0 2 0 .0 1 PDM t1 s in g le p u ls e 10 100 Figure 10. Maximum Drain Current vs. Case Temperature 0 .2 10 75 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] ZθJ C(t), Thermal Response [oC/W] -I D, Drain Current [A] 10 t2 -2 10 -5 10 -4 10 t1, -3 10 -2 10 -1 10 0 q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve www.onsemi.com 4 10 1 150 FQD4P40 — P-Channel QFET® MOSFET  !   



   FQD4P40 — P-Channel QFET® MOSFET 200nF 200nF 12V VGS Same Same T Ty ype as DUT DUT 50KΩ 50K Ω Qg 300nF 300nF VDS VGS Qgs Qgd DUT DUT IG = const. Charg Ch arge e Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL t on VDD VGS td(on d( on)) VGS t of offf tr td(of d( offf) tf 10 10% % DUT VGS VDS 90% Figure 13. Resistive Switching Test Circuit & Waveforms VDS BVDS DSS S 1 -----------------------------EAS = ---- L IAS2 ------2 BVDS DSS S - VDD L tp ID RG VGS VDD DUT DUT tp Tim Ti me VDD VDS (t) (t)) ID (t IAS BVDSS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 5 FQD4P40 — P-Channel QFET® MOSFET + VDS DUT _ I SD L Driver Driv er RG VGS VGS ( Driver Driver ) I SD ( DUT ) Compliment of DUT Comp (N-C (N-Channel hannel)) VDD • dv/dt cont ntrrolled b byy RG • ISD con onttrol ollled by pu pullse pe perriod Gate P Pul ulsse W idth ul D = -------------------------Gate te Pul Ga Pulse Per Period 10 10V V Body Bo dy D Diiod ode eR Re everse C Cu urren entt IRM di//dt di IFM , Bo Body dy D Diiod ode eF For orw ward Cu Curren entt VDS ( DUT ) VSD Body Bo dy D Diiode For Forw ward Vol Volttag age e Drop Drop VDD Body Bo dy Diod Diode e Recov cove ery dv dv/d /dtt Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms www.onsemi.com 6 FQD4P40 — P-Channel QFET® MOSFET Mechanical Dimensions Figure 16. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specif-ically the warranty therein, which covers ON Semiconductor products. www.onsemi.com 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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