MOSFET – N-Channel, QFET)
100 V, 48 A, 39 mW
FQH44N10
Description
This N−Channel enhancement mode power MOSFET is produced
using ON Semiconductor’s proprietary planar stripe and DMOS
technology. This advanced MOSFET technology has been especially
tailored to reduce on−state resistance, and to provide superior
switching performance and high avalanche energy strength. These
devices are suitable for switched mode power supplies, audio
amplifier, DC motor control, and variable switching power
applications.
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VDSS
RDS(ON) MAX
ID MAX
100 V
39 mW @ 10 V
48 A
D
Features
• 48 A, 100 V, RDS(on) = 39 mW (Max.) @ VGS = 10 V,
•
•
•
•
ID = 24 A
Low Gate Charge (Typ. 48 nC)
Low Crss (Typ. 85 pF)
100% Avalanche Tested
175°C Maximum Junction Temperature Rating
G
S
POWER MOSFET
G
D
S
TO−247−3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FQH
44N10
$Y
&Z
&3
&K
FQH44N10
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2008
March, 2021 − Rev. 5
1
Publication Order Number:
FQH44N10/D
FQH44N10
ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)
Symbol
FQH44N10−133
Unit
100
V
Continuous (TC = 25°C)
48
A
Continuous (TC = 100°C)
34
Pulsed (Note 1)
192
A
Gate−Source Voltage
±25
V
EAS
Single Pulsed Avalanche Energy (Note 2)
530
mJ
IAR
Avalanche Current (Note 1)
48
A
EAR
Repetitive Avalanche Energy (Note 1)
18
mJ
dv/dt
Peak Diode Recovery dv/dt (Note 3)
6.0
V/ns
(TC = 25°C)
180
W
Derate Above 25°C
1.2
W/°C
−55 to +175
°C
300
°C
VDSS
ID
IDM
VGSS
PD
TJ, TSTG
TL
Parameter
Drain−Source Voltage
Drain Current
Drain Current
Power Dissipation
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose
1/8″ from Case for 5 seconds
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. L = 0.345 mH, IAS = 48 A, VDD = 25 V, RG = 25 W, starting TJ = 25°C.
3. ISD ≤ 43.5 A, di/dt ≤ 300 A/ms, VDD ≤ BVDSS, starting TJ = 25°C.
THERMAL CHARACTERISTICS
Symbol
Parameter
FQH44N10−133
Unit
RqJC
Thermal Resistance, Junction to Case, Max.
0.83
_C/W
RqCS
Thermal Resistance, Case−to−Sink, Typ.
0.24
_C/W
RqJA
Thermal Resistance, Junction to Ambient, Max.
40
_C/W
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Mark
Package
Packing
Method
Reel Size
Tape Width
Quantity
FQH44N10−133
FQH44N10
TO−247
Tube
N/A
N/A
30 Units
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2
FQH44N10
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BVDSS
Drain−Source Breakdown Voltage
VGS = 0 V, ID = 250 mA
100
V
DBVDSS / DTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 mA, Referenced to 25_C
IDSS
Zero Gate Voltage Drain Current
VDS = 100 V, VGS = 0 V
1
VDS = 80 V, TC = 150_C
10
0.1
V/_C
mA
IGSSF
Gate−Body Leakage Current, Forward
VGS = 25 V, VDS = 0 V
100
nA
IGSSR
Gate−Body Leakage Current, Reverse
VGS = −25 V, VDS = 0 V
−100
nA
4.0
V
0.039
W
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 mA
RDS(on)
Static Drain−Source On−Resistance
VGS = 10 V, ID = 24 A
0.03
Forward Transconductance
VDS = 40 V, ID = 24 A
31
gFS
2.0
S
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Crss
VDS = 25 V, VGS = 0 V, f = 1.0 MHz
1400
1800
pF
Output Capacitance
425
550
pF
Reverse Transfer Capacitance
85
110
pF
19
45
ns
190
390
ns
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
VDD = 50 V, ID = 43.5 A, Rg = 25 W
(Note 4)
Turn-Off Delay Time
90
190
ns
tf
Turn-Off Fall Time
100
210
ns
Qg
Total Gate Charge
48
62
nC
Qgs
Gate−Source Charge
Qgd
Gate−Drain Charge
VDS = 80 V, ID = 43.5 A, VGS = 10 V
(Note 4)
9.0
nC
24
nC
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain−Source Diode Forward Current
48
A
ISM
Maximum Pulsed Drain−Source Diode Forward Current
192
A
VSD
Drain−Source Diode Forward Voltage
VGS = 0 V, IS = 48A
1.5
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 43.5 A,
dIF/dt = 100 A/ms
IS
98
ns
360
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
FQH44N10
TYPICAL PERFORMANCE CHARACTERISTICS
Top VGS : 15.0 V
8.0 V
7.0 V
ID, Drain Current (A)
ID, Drain Current (A)
102
10.0 V
102
6.0 V
5.5 V
5.0 V
Bottom :
4.5 V
101
* Notes :
1. 250 ms Pulse Test
2. TC = 25 °C
100
10−1
100
175°C
101
25°C
−55°C
100
* Notes :
1. VDS=40 V
2. 250 ms Pulse Test
10−1
2
101
4
VDS, Drain−Source Voltage (V)
8
10
Figure 2. Transfer Characteristics
0.15
IDR, Reverse Drain Current (A)
RDS(ON), Drain−Source On−Resistance (W)
Figure 1. On−Region Characteristics
0.12
VGS = 10 V
0.09
VGS = 20 V
0.06
0.03
* Notes : TJ = 25°C
0.00
0
30
60
90
120
150
102
101
100
ID, Drain Current (A)
3500
3000
Ciss
Crss
1000
* Notes :
1. VGS = 0 V
2. f = 1 MHz
Coss
500
0
10−1
100
0.8
1.0
1.2
1.4
1.6
1.8
2.0
12
2000
1500
0.6
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
2500
0.4
VSD, Source−Drain Voltage (V)
VGS, Gate−Source Voltage (V)
4000
* Notes :
1. VDS = 0 V
2. 250 ms Pulse Test
175°C 25°C
10−1
0.2
180
Figure 3. On−Resistance Variation
vs. Drain Current and Gate Voltage
Capacitance (pF)
6
VGS, Gate−Source Voltage (V)
VDS = 80 V
8
6
4
2
0
101
VDS = 50 V
10
VDS, Drain−Source Voltage (V)
* Notes : ID = 43.5 A
0
10
20
30
40
50
Qg, Total Gate Charge (nC)
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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4
FQH44N10
RDS(on), (Normalized)
Drain−Source On−Resistance
BVDSS, (Normalized)
Drain−Source Breakdown Voltage
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
1.2
1.1
1.0
0.9
0.8
−100
* Notes:
1. VGS = 0 V
2. ID = 250 mA
−50
0
50
100
150
3.0
2.5
2.0
1.5
1.0
* Notes:
1. VGS = 10 V
2. ID = 21.75 A
0.5
0.0
−100
200
−50
0
50
100
TJ, Junction Temperature (5C)
TJ, Junction Temperature (5C)
Figure 7. Breakdown Voltage
Variation vs. Temperature
Figure 8. On−Resistance
Variation vs. Temperature
150
200
150
175
50
102
100 ms
ID, Drain Current (A)
Operation in This Area is
Limited by RDS(on)
10 ms
1 ms
10 ms
101
DC
100
* Notes:
1. TC = 25 °C
2. TJ = 175 °C
3. Single Pulse
10−1
100
40
30
20
10
101
102
0
25
VDS, Drain−Source Voltage (V)
50
75
100
125
TC, Case Temperature (5C)
Figure 9. Maximum Safe Operating Area
ZqJC(t), Thermal Response (5C/W)
ID, Drain Current (A)
103
Figure 10. Maximum Drain
Current vs. Case Temperature
100
D=0.5
* Notes :
1. ZqJC(t) = 0.83 °C/W Max.
0.2
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
0.1
10−1
0.05
PDM
0.02
t1
0.01
Single Pulse
t2
10−2
10−5
10−4
10−3
10−2
10−1
10−0
t1, Square Wave Pulse Duration (sec)
Figure 11. Transient Thermal Response Curve
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5
101
FQH44N10
VGS
50 kW
12 V
200 nF
300 nF
Qg
Same Type
as DUT
Qgs
VDS
VGS
Qgd
DUT
IG = Const.
Charge
Figure 12. Gate Charge Test Circuit & Waveform
VDS
RL
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
tr
td(off)
ton
tf
toff
Figure 13. Resistive Switching Test Circuit & Waveforms
L
BV DSS
2
E AS + 1 L I AS
2
BV DSS * V DD
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
ID(t)
VDD
VDS(t)
tp
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
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6
Time
FQH44N10
+
DUT
VDS
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
VDS
(DUT)
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
QFET is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
A
DATE 31 JAN 2019
A
E
P1
P
A2
D2
Q
E2
S
B
D
1
2
D1
E1
2
3
L1
A1
L
b4
c
(3X) b
0.25 M
(2X) b2
B A M
DIM
(2X) e
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXX
XXXXXXX
XXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
ZZ
= Assembly Lot Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
A
A1
A2
b
b2
b4
c
D
D1
D2
E
E1
E2
e
L
L1
P
P1
Q
S
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
13.08
~
~
0.51 0.93 1.35
15.37 15.62 15.87
12.81
~
~
4.96 5.08 5.20
~
5.56
~
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
6.60 6.80 7.00
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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