FSQ0370RNA

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It is specifically designed for highperformance offline Switched Mode Power Supplies (SMPS) with minimal external components. The integrated PWM controller features include: a fixedfrequency generating oscillator, Under-Voltage Lockout (UVLO) protection, Leading-Edge Blanking (LEB), an optimized gate turn-on / turn-off driver, Thermal Shutdown (TSD) protection, and temperaturecompensated precision current sources for loop compensation and fault protection circuitry. Internal Avalanche Rugged 700V SenseFET Consumes Only 0.8W at 230VAC & 0.5W Load with Burst-Mode Operation     Precision Fixed Operating Frequency: 100kHz    Under-Voltage Lockout (UVLO) Internal Startup Circuit and Built-in Soft-Start Pulse-by-Pulse Current Limiting, Auto-Restart Mode Over-Voltage Protection (OVP), Overload Protection (OLP), Internal Thermal Shutdown Function (TSD) Low Operating Current: 3mA Adjustable Peak Current Limit Applications     Compared to a discrete MOSFET and controller or RCC switching converter solution, the FSQ0370 reduces total component count, design size, and weight while increasing efficiency, productivity, and system reliability. These devices provide a basic platform that is well suited for the design of cost-effective flyback converters, such as in PC auxiliary power supplies. Auxiliary Power Supply for PC and Server SMPS for VCR, SVR, STB, DVD, and DVCD Player Printer, Facsimile, and Scanner Adapter for Camcorder Related Application Notes  AN-4134 — Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPS™)  AN-4137 — Design Guidelines for Offline Flyback Converters Using Fairchild Power Switch (FPS™)  AN-4141 — Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications  AN-4147 — Design Guidelines for RCD Snubber of Flyback Converters Ordering Information Part Number Package FSQ0370RNA 8-Lead, Dual Inline Package (DIP) FSQ0370RLA 8-Lead, LSOP © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 Marking Code BVDSS fOSC RDS(ON)(MAX) Q0370RA 700V 100KHz 4.75Ω www.fairchildsemi.com FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) March 2012 AC IN DC OUT Vstr Ipk Drain PWM Vfb Vcc Source Figure 1. Typical Flyback Application Table 1. Output Power Table(1) Product 230VAC ±15%(2) 85-265VAC Adapter(3) Open Frame(4) Adapter(3) Open Frame(4) 20W 27W 13W 19W FSQ0370RNA FSQ0370RLA Notes: 1. The maximum output power can be limited by junction temperature. 2. 230VAC or 100/115VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter with sufficient drain pattern as a heat sink at 50°C ambient. 4. Maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sink at 50°C ambient. Internal Block Diagram Figure 2. Functional Block Diagram © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 2 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Application Circuit Figure 3. Pin Configuration (Top View) Pin Definitions Pin# Name 1 GND SenseFET source terminal on the primary side and internal control ground. Vcc Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal switch during startup (see Figure 2). It is not until VCC reaches the UVLO upper threshold (12V) that the internal startup switch opens and device power is supplied via the auxiliary transformer winding. Vfb The feedback voltage pin is the non-inverting input to the PWM comparator. It has a 0.9mA current source connected internally, while a capacitor and optocoupler are typically connected externally. A feedback voltage of 6V triggers overload protection (OLP). There is a delay while charging external capacitor Cfb from 3V to 6V using an internal 5µA current source. This delay prevents false triggering under transient conditions, but allows the protection mechanism to operate in true overload conditions. 4 Ipk This pin adjusts the peak current limit of the SenseFET. The 0.9mA feedback current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any external resistor to GND on this pin. This determines the peak current limit. If this pin is tied to Vcc or left floating, the typical peak current limit is 1.1A. 5 Vstr This pin is connected to the rectified AC line voltage source. At startup, the internal switch supplies internal bias and charges an external storage capacitor placed between the Vcc pin and ground. Once VCC reaches 12V, the internal switch is opened. 6, 7, 8 Drain The drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 700V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance. 2 3 Description © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 3 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Pin Assignments Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. Symbol VDRAIN VSTR IDM Parameter Min. Max. Unit Drain Pin Voltage 700 V Vstr Pin Voltage 700 V (5) Drain Current Pulsed (6) 12 A EAS Single Pulsed Avalanche Energy 230 mJ VCC Supply Voltage 20 V VFB Feedback Voltage Range VCC V PD Total Power Dissipation 1.5 W TJ Recommended Operating Junction Temperature -40 Internally Limited °C TA Operating Ambient Temperature -40 +85 °C Storage Temperature -55 +150 °C Value Unit TSTG -0.3 Notes: 5. Non-repetitive rating: pulse-width limited by maximum junction temperature. 6. L=51mH, starting TJ=25°C. Thermal Impedance Symbol Parameter (7) θJA Junction-to-Ambient Thermal Resistance 80 θJC Junction-to-Case Thermal Resistance(8) 20 ΨJT Junction-to-Top Thermal Resistance(9) 35 °C/W Notes: 7. Free-standing with no heat-sink, without copper clad. 8. Measured on the drain pin, close to the plastic interface. 9. Measured on the package top surface. © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 4 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Absolute Maximum Ratings T A=25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit (10) SenseFET Section IDSS Zero-Gate-Voltage Drain Current VDS=700V, VGS=0V 50 VDS=560V, VGS=0V, TC=125°C 200 µA Drain-Source On-State Resistance(10) VGS=10V, ID=0.5A 4.00 CISS Input Capacitance VGS=0V, VDS=25V, f=1MHz 315 pF COSS Output Capacitance VGS=0V, VDS=25V, f=1MHz 47 pF CRSS Reverse Transfer Capacitance VGS=0V, VDS=25V, f=1MHz 9 pF td(on) Turn-On Delay VDD=350V, ID=1A 11.2 ns Rise Time VDD=350V, ID=1A 34 ns Turn-Off Delay VDD=350V, ID=1A 28.2 ns Fall Time VDD=350V, ID=1A 32 ns RDS(ON) tr td(off) tf 4.75 Ω Control Section fOSC Switching Frequency (11) ΔfOSC Switching Frequency Variation -25°C < TJ < 85°C DMAX Maximum Duty Cycle Measured at 0.1 x VDS DMIN Minimum Duty Cycle VSTART UVLO Threshold Voltage VFB=GND IFB Feedback Source Current VFB=GND tS/S (11) VSTOP Internal Soft-Start Time 92 100 108 ±5 ±10 % 55 60 650 % 0 0 0 % 11 12 13 7 8 9 0.7 0.9 1.1 10 VFB=4V kHZ V mA ms Burst-Mode Section VBURH VBURL TJ=25°C Burst-Mode Voltage VBUR(HYS) 0.5 0.6 07 V 0.3 0.4 0.5 V 100 200 300 mV 0.97 1.10 1.23 A Protection Section ILIM tCLD TSD Peak Current Limit di/dt=240mA/µs (11) Current Limit Delay Thermal Shutdown Temperature (11) 500 ns 125 140 °C VSD Shutdown Feedback Voltage 5.5 6.0 VOVP Over-Voltage Protection 18 19 IDELAY Shutdown Delay Current 3.5 5.0 tLEB VFB=4V (11) Leading-Edge Blanking Time 6.5 V V 6.5 200 µA ns Total Device Section IOP Operating Supply Current (Control Part Only) VCC=14V 1 3 5 mA ICH Startup Charging Current VCC=0V 0.70 0.85 1.00 mA VSTR Supply Voltage VCC=0V VSTR 24 V Notes: 10. Pulse test: Pulse width ≤ 300μs, duty ≤ 2%. 11. These parameters, although guaranteed, are not 100% tested in production. © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 5 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Electrical Characteristics Characteristic graphs are normalized at TA=25°C. Figure 4. Operating Frequency (fOSC) vs. TA Figure 5. Over-Voltage Protection (VOVP) vs. TA Figure 6. Maximum Duty Cycle (DMAX) vs. TA Figure 7. Operating Supply Current (IOP) vs. TA Figure 8. Start Threshold Voltage (VSTART) vs. TA Figure 9. Stop Threshold Voltage(VSTOP) vs. TA © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 6 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Typical Performance Characteristics Characteristic graphs are normalized at TA=25°C. Figure 10. Feedback Source Current (IFB) vs. TA Figure 11. Startup Charging Current (ICH) vs. TA Figure 12. Peak Current Limit (ILIM) vs. TA © 2011 Fairchild Semiconductor Corporation FSQ0370RNA / FSQ0370RLA • Rev. 1.0.2 www.fairchildsemi.com 7 FSQ0370RNA / FSQ0370RLA — Green Mode Fairchild Power Switch (FPS™) Typical Performance Characteristics 1. Startup: In previous generations of Fairchild Power Switches (FPS™), the Vstr pin required an external resistor to the DC input voltage line. In this generation, the startup resistor is replaced by an internal highvoltage current source and a switch that shuts off 10ms after the VCC supply voltage goes above 12V. The source turns back on if VCC drops below 8V. VIN,dc ISTR Vstr VCC78% at 115VAC and 230VAC input)   The delay for overload protection is designed to be about 30ms with C8 of 47nF. If faster/slower triggering of OLP is required, C8 can be changed to a smaller or larger value (eg. 100nF for 60ms). Enhanced system reliability through various protection functions     Low EMI through frequency modulation ZP1, DL1, RL1, RL2, RL3, RL4, RL5, RL7, QL1, QL2, and CL9 build a line Under-Voltage Lockout block (UVLO). The Zener voltage of ZP1 determines the input voltage that turns the FPS on. RL5 and DL1 provide a reference voltage from VCC. If the input voltage divided by RL1, RL2, and RL4 is lower than the Zener voltage of DL1; QL1, and QL2 turn on and pull Vfb down to ground.  An evaluation board and corresponding test report can be provided. Contact a Fairchild representative. Low Standby Mode power consumption (