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FSQ0465RSWDTU

FSQ0465RSWDTU

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO220-6

  • 描述:

    Converter Offline Flyback Topology 48kHz ~ 67kHz TO-220F

  • 数据手册
  • 价格&库存
FSQ0465RSWDTU 数据手册
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FSQ0465RS/RB Green-Mode Fairchild Power Switch (FPS™) for Quasi-Resonant Operation - Low EMI and High Efficiency Features Description ! Optimized for Quasi-Resonant Converters (QRC) A Quasi-Resonant Converter (QRC) generally shows lower EMI and higher power conversion efficiency than a conventional hard-switched converter with a fixed switching frequency. The FSQ-series is an integrated Pulse-Width Modulation (PWM) controller and SenseFET specifically designed for quasi-resonant operation and Alternating Valley Switching (AVS). The PWM controller includes an integrated fixed-frequency oscillator, Under-Voltage Lockout (UVLO), LeadingEdge Blanking (LEB), optimized gate driver, internal softstart, temperature-compensated precise current sources for a loop compensation, and self-protection circuitry. Compared with a discrete MOSFET and PWM controller solution, the FSQ-series can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device provides a basic platform for cost-effective designs of quasi-resonant switching flyback converters. ! Low EMI through Variable Frequency Control and AVS (Alternating Valley Switching) ! High-Efficiency through Minimum Voltage Switching ! Narrow Frequency Variation Range over Wide Load and Input Voltage Variation ! Advanced Burst-Mode Operation for Low Standby Power Consumption ! Simple Scheme for Sync Voltage Detection ! Pulse-by-Pulse Current Limit ! Various Protection Functions: Overload Protection ! ! ! ! (OLP), Over-Voltage Protection (OVP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD) with Hysteresis, Output Short Protection (OSP) Under-Voltage Lockout (UVLO) with Hysteresis Internal Startup Circuit Internal High-Voltage Sense FET (650V) Built-in Soft-Start (17.5ms) Applications ! Power Supply for LCD TV and Monitor, VCR, SVR, STB, and DVD & DVD Recorder ! Adapter Related Resources Visit: http://www.fairchildsemi.com/apnotes/ for: ! AN-4134: Design Guidelines for Offline Forward ! ! ! ! ! ! ! Converters Using Fairchild Power Switch (FPS™) AN-4137: Design Guidelines for Offline Flyback Converters Using Fairchild Power Switch (FPS™) AN-4140: Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPS™) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications AN-4145: Electromagnetic Compatibility for Power Converters AN-4147: Design Guidelines for RCD Snubber of Flyback Converters AN-4148: Audible Noise Reduction Techniques for Fairchild Power Switch (FPS™) Applications AN-4150: Design Guidelines for Flyback Converters Using FSQ-Series Fairchild Power Switch (FPS™) © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation December 2009 Maximum Output Power(1) Product Number FSQ0465RSWDTU FSQ0465RBWDTU PKG.(5) Operating Current RDS(ON) Temp. Limit Max. TO-220F 230VAC±15%(2) Adapter(3) 85-265VAC Open Open Adapter(3) Frame(4) Frame(4) Replaces Devices 1.8A 3.0A FSQ0465RSLDTU TO220F(L- -25 to +85°C Forming) 1.8A FSQ0465RBLDTU TO220F(LForming) 3.0A FSCM0465R FSDM0465RE 2.6Ω 60W 70W 33W 48W FSCM0465R FSDM0465RE For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. Notes: 1. The junction temperature can limit the maximum output power. 2. 230VAC or 100/115VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature. 4. Maximum practical continuous power in an open-frame design at 50°C ambient. 5. Eco Status, RoHS. © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 2 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Ordering Information FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Application Diagram VO AC IN VSTR Drain PWM Sync GND VFB VCC FSQ0465 Rev. 00 Figure 1. Typical Flyback Application Internal Block Diagram Sync 5 AVS Vstr VCC Drain 6 3 1 OSC VCC VCC Vref Idelay FB 4 Vref 0.35/0.55 VBurst VCC good 8V/12V IFB PWM 3R R SoftStart S Q LEB 250ns Gate driver R Q tON < tOSP after SS VOSP LPF AOCP VSD VCC S TSD Q 2 VOCP (1.1V) GND R Q LPF VOVP VCC good FSQ0465 Rev.00 Figure 2. Internal Block Diagram © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 3 6. VSTR 5. Sync 4. FB 3. VCC 2. GND 1. Drain FSQ0465 Rev.00 Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name 1 Drain SenseFET Drain. High-voltage power SenseFET drain connection. 2 GND Ground. This pin is the control ground and the SenseFET source. 3 VCC Power Supply. This pin is the positive supply input, providing internal operating current for both startup and steady-state operation. 4 FB Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload protection triggers, which shuts down the FPS. 5 Sync Sync. This pin is internally connected to the sync-detect comparator for quasi-resonant switching. In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V. Vstr Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled. It is not recommended to connect Vstr and Drain together. 6 Description © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 4 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified. Symbol Parameter Min. Max. Unit Vstr Vstr Pin Voltage 500 V VDS Drain Pin Voltage 650 V VCC Supply Voltage VFB Feedback Voltage Range Sync Pin Voltage VSync 20 V -0.3 13.0 V -0.3 13.0 V 9.6 A 4.0 A 120 mJ Drain Current Pulsed IDM IDSW Continuous Drain Switching Current(6) EAS Single Pulsed Avalanche Energy(7) PD Total Power Dissipation (TC=25°C) 45 W TJ Operating Junction Temperature Internally limited °C TA Operating Ambient Temperature -25 +85 °C Storage Temperature -55 +150 °C TSTG ESD TC = 25°C Human Body Model, JESD22-A114 2.0 kV Charged Device Model, JESD22-C101 2.0 kV Notes: 6. Repetitive peak switching current when inductor load is assumed: limited by maximum duty and maximum junction temperature. IDS DMAX fSW 7. 7. L=14mH, starting TJ=25°C. Thermal Impedance TA = 25°C unless otherwise specified. Symbol θJA θJC Parameter Junction-to-Ambient Thermal Junction-to-Case Thermal Package Resistance(8) Resistance(9) TO-220F-6L Value Unit 50 °C/W 2.8 °C/W Notes: 8. Free-standing with no heat-sink under natural convection. 9. Infinite cooling condition - refer to the SEMI G30-88. © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 5 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Absolute Maximum Ratings TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit SENSEFET SECTION BVDSS Drain Source Breakdown Voltage VCC = 0V, ID = 100µA IDSS Zero-Gate-Voltage Drain Current VDS = 560V Drain-Source On-State Resistance TJ = 25°C, ID = 0.5A 2.2 COSS Output Capacitance VGS = 0V, VDS = 25V, f = 1MHz 60 pF td(on) Turn-On Delay Time VDD = 350V, ID = 25mA 12 ns Rise Time VDD = 350V, ID = 25mA 20 ns Turn-Off Delay Time VDD = 350V, ID = 25mA 30 ns Fall Time VDD = 350V, ID = 25mA 16 ns RDS(ON) tr td(off) tf 650 V 250 µA 2.6 Ω CONTROL SECTION Maximum On Time TJ = 25°C 8.8 10.0 11.2 µs tB Blanking Time TJ = 25°C, Vsync = 5V 13.5 15.0 16.5 µs tW Detection Time Window TJ = 25°C, Vsync = 0V fS Initial Switching Frequency tON.MAX ΔfS tAVS Switching Frequency Variation(11) On Time 6.0 59.6 66.7 75.8 kHz -25°C < TJ < 85°C ±5 ±10 % at VIN = 240VDC, Lm = 360μH (AVS triggered when VAVS > spec. and tAVS < spec.) 4.0 µs 1.2 V VAVS AVS Triggering Threshold(11) tSW Switching Time Variance by AVS(11) Sync = 500kHz sine input VFB = 1.2V, tON = 4.0µs 13.5 IFB Feedback Source Current VFB = 0V 700 Minimum Duty Cycle VFB = 0V DMIN VSTART VSTOP UVLO Threshold Voltage tS/S Internal Soft-Start Time VOVP Over-Voltage Protection Feedback Voltage µs After turn-on 20.5 µs 900 1100 µA 0 % 11 12 13 V 7 8 9 V With free-running frequency 17.5 ms 18 19 20 V 0.45 0.55 0.65 V 0.25 0.35 0.45 V BURST-MODE SECTION VBURH VBURL Burst-Mode Voltages (10) TJ = 25°C, tPD = 200ns Hysteresis 200 mV Continued on the following page... © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 6 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Electrical Characteristics TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit PROTECTION SECTION ILIMIT Peak Current Limit of FSQ0465RS TJ = 25°C, di/dt = 480mA/µs 1.6 1.8 2.0 A ILIMIT Peak Current Limit of FSQ0465RB TJ = 25°C, di/dt = 370mA/µs 2.64 3.00 3.36 A VSD Shutdown Feedback Voltage VCC = 15V 5.5 6.0 6.5 V Shutdown Delay Current VFB = 5V 4 5 6 µA 1.4 µs IDELAY tLEB Leading-Edge Blanking TJ = 25°C OSP triggered when tON < tOSP, VFB > VOSP and lasts longer than Feedback Blanking Time tOSP_FB Output Short Threshold Feedback Protection(11) Voltage tOSP_FB TSD Hys 250 Threshold Time tOSP VOSP Time(11) Shutdown Temperature 1.2 1.8 2.0 2.0 2.5 ns V 3.0 +125 +140 +155 Thermal Shutdown(11) Hysteresis +60 µs °C SYNC SECTION VSH1 VSL1 tsync VSH2 VSL2 VCLAMP Sync Threshold Voltage 1 VCC = 15V, VFB = 2V 1.0 1.2 1.4 0.8 1.0 1.2 Sync Delay Time(11)(12) 230 Sync Threshold Voltage 2 VCC = 15V, VFB = 2V Low Clamp Voltage ISYNC_MAX = 800µA, ISYNC_MIN = 50µA V ns 4.3 4.7 5.1 4.0 4.4 4.8 0.0 0.4 0.8 V V TOTAL DEVICE SECTION IOP ISTART ICH VSTR Operating Supply Current VCC = 13V 1 3 5 mA Start Current VCC = 10V (before VCC reaches VSTART) 350 450 550 µA Startup Charging Current VCC = 0V, VSTR = minimum 50V 0.65 0.85 1.00 mA Minimum VSTR Supply Voltage 26 V Notes: 10. Propagation delay in the control IC. 11. Guaranteed by design; not tested in production. 12. Includes gate turn-on time. © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 7 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Electrical Characteristics (Continued) Function Operation Method EMI Reduction FSDM0x65RE FSQ-Series Constant Frequency PWM Quasi-Resonant Operation Frequency Modulation Reduced EMI Noise ! Reduced EMI noise ! Reduced components to detect valley point ! Valley Switching ! Inherent Frequency Modulation ! Alternate Valley Switching CCM or AVS Based on Load ! Improves efficiency by introducing hybrid control and Input Condition Hybrid Control Burst-Mode Operation Burst-Mode Operation Advanced Burst-Mode Operation Strong Protections OLP, OVP OLP, OVP, AOCP, OSP TSD 145°C without Hysteresis 140°C with 60°C Hysteresis © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 FSQ-Series Advantages ! Improved efficiency by valley switching ! Improved standby power by advanced burst-mode ! Improved reliability through precise AOCP ! Improved reliability through precise OSP ! Stable and reliable TSD operation ! Converter temperature range www.fairchildsemi.com 8 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Comparison Between FSDM0x65RNB and FSQ-Series 1.2 Normalized Normalized These characteristic graphs are normalized at TA= 25°C. 1.0 0.8 1.2 1.0 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -25 0 25 50 75 100 0.0 -25 125 0 Temperature [°C] 1.2 1.0 0.8 0.4 0.2 0.2 75 100 0.0 -25 125 0 Normalized Normalized 1.2 1.0 0.8 125 0.8 0.4 0.4 0.2 0.2 75 100 0.0 -25 125 0 25 50 75 100 125 Temperature [°C] Temperature [°C] Figure 8. Initial Switching Frequency (fS) vs. TA Figure 9. Maximum On Time (tON.MAX) vs. TA © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 100 1.0 0.6 50 75 1.2 0.6 25 50 Figure 7. Startup Charging Current (ICH) vs. TA Figure 6. UVLO Stop Threshold Voltage (VSTOP) vs. TA 0 25 Temperature [°C] Temperature [°C] 0.0 -25 125 0.8 0.4 50 100 1.0 0.6 25 75 1.2 0.6 0 50 Figure 5. UVLO Start Threshold Voltage (VSTART) vs. TA Normalized Normalized Figure 4. Operating Supply Current (IOP) vs. TA 0.0 -25 25 Temperature [°C] www.fairchildsemi.com 9 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Typical Performance Characteristics 1.2 Normalized Normalized These characteristic graphs are normalized at TA= 25°C. 1.0 0.8 1.2 1.0 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -25 0 25 50 75 100 0.0 -25 125 0 1.2 1.0 0.8 0.4 0.2 0.2 75 100 0.0 -25 125 0 1.2 1.0 0.8 125 0.8 0.4 0.4 0.2 0.2 75 100 0.0 -25 125 Temperature [°C] 0 25 50 75 100 125 Temperature [°C] Figure 14. Burst-Mode Low Threshold Voltage (Vburl) vs. TA | Figure 15. Peak Current Limit (ILIM) vs. TA © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 100 1.0 0.6 50 75 1.2 0.6 25 50 Figure 13. Burst-Mode High Threshold Voltage (Vburh) vs. TA Normalized Normalized Figure 12. Shutdown Delay Current (IDELAY) vs. TA 0 25 Temperature [°C] Temperature [°C] 0.0 -25 125 0.8 0.4 50 100 1.0 0.6 25 75 1.2 0.6 0 50 Figure 11. Feedback Source Current (IFB) vs. TA Normalized Normalized Figure 10. Blanking Time (tB) vs. TA 0.0 -25 25 Temperature [°C] Temperature [°C] www.fairchildsemi.com 10 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Typical Performance Characteristics (Continued) 1.2 Normalized Normalized These characteristic graphs are normalized at TA= 25°C. 1.0 0.8 1.2 1.0 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0.0 -25 0 25 50 75 100 0.0 -25 125 0 1.2 1.0 0.8 0.4 0.2 0.2 75 100 0.0 -25 125 0 1.2 1.0 0.8 125 0.8 0.4 0.4 0.2 0.2 75 100 0.0 -25 125 Temperature [°C] 0 25 50 75 100 125 Temperature [°C] Figure 20. Sync High Threshold Voltage 2 (VSH2) vs. TA Figure 21. Sync Low Threshold Voltage 2 (VSL2) vs. TA © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 100 1.0 0.6 50 75 1.2 0.6 25 50 Figure 19. Over-Voltage Protection (VOV) vs. TA Normalized Normalized Figure 18. Shutdown Feedback Voltage (VSD) vs. TA 0 25 Temperature [°C] Temperature [°C] 0.0 -25 125 0.8 0.4 50 100 1.0 0.6 25 75 1.2 0.6 0 50 Figure 17. Sync Low Threshold Voltage 1 (VSL1) vs. TA Normalized Normalized Figure 16. Sync High Threshold Voltage 1 (VSH1) vs. TA 0.0 -25 25 Temperature [°C] Temperature [°C] www.fairchildsemi.com 11 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Typical Performance Characteristics (Continued) 2.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the SenseFET is limited by the inverting input of PWM comparator (VFB*), as shown in Figure 23. Assuming that the 0.9mA current source flows only through the internal resistor (3R + R = 2.8k), the cathode voltage of diode D2 is about 2.5V. Since D1 is blocked when the feedback voltage (VFB) exceeds 2.5V, the maximum voltage of the cathode of D2 is clamped at this voltage, clamping VFB*. Therefore, the peak value of the current through the SenseFET is limited. 1. Startup: At startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (Ca) connected to the VCC pin, as illustrated in Figure 22. When VCC reaches 12V, the FPS™ begins switching and the internal high-voltage current source is disabled. The FPS continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 8V. VDC 2.2 Leading-Edge Blanking (LEB): At the instant the internal SenseFET is turned on, a high-current spike usually occurs through the SenseFET, caused by primary-side capacitance and secondary-side rectifier reverse recovery. Excessive voltage across the Rsense resistor would lead to incorrect feedback operation in the current-mode PWM control. To counter this effect, the FPS employs a leading-edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (tLEB) after the SenseFET is turned on Pulse-WidthModulation (PWM) Circuit CVCC VCC 3 VSTR 6 Istart VREF 8V/12V Vcc good Internal Bias 3. Synchronization: The FSQ-series employs a quasiresonant switching technique to minimize the switching noise and loss. The basic waveforms of the quasiresonant converter are shown in Figure 25. To minimize the MOSFET's switching loss, the MOSFET should be turned on when the drain voltage reaches its minimum value, which is indirectly detected by monitoring the VCC winding voltage, as shown in Figure 24. FSQ0465 Rev.00 Figure 22. Startup Circuit 2. Feedback Control: FPS employs current-mode control, as shown in Figure 23. An opto-coupler (such as the FOD817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, pulling down the feedback voltage and reducing the duty cycle. This typically happens when the input voltage is increased or the output load is decreased. Vds V RO VRO V DC TF Vsync V ovp (8V) VCC VREF Idelay VFB VO IFB 4 H11A817A D2 + VFB* KA431 1.2V SenseFET OSC D1 CB 1.0V 3R 230ns Delay Gate driver R MOSFET Gate - VSD OLP ON Rsense ON FSQ0465 Rev.00 FSQ0465 Rev.00 Figure 24. Quasi-Resonant Switching Waveforms Figure 23. Pulse-Width-Modulation (PWM) Circuit © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 12 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation Functional Description ID S I DS ingnore 4.4V V sync FS Q 0465 R ev.00 Figure 27. After Vsync Finds First Valley 4. Protection Circuits: The FSQ-series has several self-protective functions, such as Overload Protection (OLP), Abnormal Over-Current Protection (AOCP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). All the protections are implemented as autorestart mode. Once the fault condition is detected, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC falls down to the Under-Voltage Lockout (UVLO) stop voltage of 8V, the protection is reset and the startup circuit charges the VCC capacitor. When the VCC reaches the start voltage of 12V, normal operation resumes. If the fault condition is not removed, the SenseFET remains off and VCC drops to stop voltage again. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. Because these protection circuits are fully integrated into the IC without external components, reliability is improved without increasing cost. V DS 4.4V V sync 1.2V 1.0V FSQ 0465 Rev.00 internal delay Figure 25. Vsync > 4.4V at tX tX IDS 1.2V 1.0V internal delay I DS tB=15µs I DS V DS tX t B =15µs tX t B =15µs IDS V DS Power on Fault occurs Fault rem oved VDS Vsync 4.4V V CC 1.2V 1.0V 12V 8V FSQ0465 Rev.00 internal delay t Figure 26. Vsync < 4.4V at tX FSQ0465 Rev.00 Norm al operation Fault situation Norm al operation Figure 28. Auto Restart Protection Waveforms © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 13 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation The switching frequency is the combination of blank time (tB) and detection time window (tW). In case of a heavy load, the sync voltage remains flat after tB and waits for valley detection during tW. This leads to a low switching frequency not suitable for heavy loads. To correct this drawback, additional timing is used. The timing conditions are described in Figures 25, 26, and 27. When the Vsync remains flat higher than 4.4V at the end of tB which is instant tX, the next switching cycle starts after internal delay time from tX. In the second case, the next switching occurs on the valley when the Vsync goes below 4.4V within tB. Once Vsync detects the first valley in tB, the other switching cycle follows classical QRC operation. 3R LEB 200ns S Q R Q Gate driver R Rsense 2 GND + AOCP - FSQ0465 Rev.00 VOCP Figure 30. Abnormal Over-Current Protection 4.3 Output-Short Protection (OSP): If the output is shorted, steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Such a steep current brings high voltage stress on the drain of SenseFET when turned off. To protect the device from such an abnormal condition, OSP is included in the FSQseries. It is comprised of detecting VFB and SenseFET turn-on time. When the VFB is higher than 2V and the SenseFET turn-on time is lower than 1.2µs, the FPS recognizes this condition as an abnormal error and shuts down PWM switching until VCC reaches Vstart again. An abnormal condition output short is shown in Figure 31. Rectifier Diode Current MOSFET Drain Current F S Q 0 4 6 5 R e v .0 0 V FB OSC PWM Turn-off delay ILIM O ve rlo a d p ro te c tio n VFB 6 .0 V 0 Minimum turn-on time Vo 2 .5 V D 1.2µs output short occurs t 1 2 = C fb *(6 .0 -2 .5 )/I d e la y T1 0 T2 Io t FSQ0465 Rev. 00 Figure 29. Overload Protection 0 Figure 31. Output Short Waveforms 4.2 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time. Even though the FSQ-series has overload protection, it is not enough to protect the FSQ-series in that abnormal case, since severe current stress is imposed on the SenseFET until OLP triggers. The FSQ-series has an internal AOCP circuit shown in Figure 30. When the gate turn-on signal is applied to the power SenseFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the latch, resulting in the shutdown of the SMPS. 4.4 Over-Voltage Protection (OVP): If the secondary side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until overload protection is activated. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an over-voltage protection (OVP) circuit is employed. In general, VCC is proportional to the output voltage and the FSQ-series uses VCC instead of directly monitoring the output voltage. If VCC exceeds 19V, an OVP circuit is activated, © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 14 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation 4.1 Overload Protection (OLP): Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the SMPS. However, even when the SMPS is in the normal operation, the overload protection circuit can be triggered during the load transition. To avoid this undesired operation, the overload protection circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SenseFET is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (VO) decreases below the set voltage. This reduces the current through the optocoupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 2.5V, D1 is blocked and the 5µA current source starts to charge CB slowly up to VCC. In this condition, VFB continues increasing until it reaches 6V, when the switching operation is terminated, as shown in Figure 29. The delay time for shutdown is the time required to charge CFB from 2.5V to 6V with 5µA. A 20 ~ 50ms delay time is typical for most applications. VO Voset VFB 4.5 Thermal Shutdown with Hysteresis (TSD): The SenseFET and the control IC are built in one package. This enables the control IC to detect the abnormally high temperature of the SenseFET. If the temperature exceeds approximately 140°C, the thermal shutdown triggers IC shutdown. The IC recovers its operation when the junction temperature decreases 60°C from TSD temperature and VCC reaches startup voltage (Vstart). 0.55V 0.35V IDS 5. Soft-Start: The FPS has an internal soft-start circuit that increases PWM comparator inverting input voltage with the SenseFET current slowly after it starts up. The typical soft-start time is 17.5ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. This mode helps prevent transformer saturation and reduces stress on the secondary diode during startup. VDS t1 Switching disabled t2 t3 Switching disabled t4 Figure 32. Waveforms of Burst Operation 7. Switching Frequency Limit: To minimize switching loss and Electromagnetic Interference (EMI), the MOSFET turns on when the drain voltage reaches its minimum value in quasi-resonant operation. However, this causes switching frequency to increases at light load conditions. As the load decreases or input voltage increases, the peak drain current diminishes and the switching frequency increases. This results in severe switching losses at light-load condition, as well as intermittent switching and audible noise. These problems create limitations for the quasi-resonant converter topology in a wide range of applications. 6. Burst Operation: To minimize power dissipation in standby mode, the FPS enters burst-mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 32, the device automatically enters burst-mode when the feedback voltage drops below VBURL (350mV). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (550mV), switching resumes. The feedback voltage then falls and the process repeats. Burst-mode operation alternately enables and disables switching of the power SenseFET, thereby reducing switching loss in standby mode. To overcome these problems, FSQ-series employs a frequency-limit function, as shown in Figures 33 and Figure 34. Once the SenseFET is turned on, the next turn-on is prohibited during the blanking time (tB). After the blanking time, the controller finds the valley within the detection time window (tW) and turns on the MOSFET, as shown in Figures 33 and Figure 34 (Cases A, B, and C). If no valley is found during tW, the internal SenseFET is forced to turn on at the end of tW (Case D). Therefore, the devices have a minimum switching frequency of 48kHz and a maximum switching frequency of 67kHz. © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 time FSQ0465 Rev. 00 www.fairchildsemi.com 15 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation resulting in the termination of the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed below 19V. IDS IDS A VDS tB=15μs ts IDS Internally, quasi-resonant operation is divided into two categories; one is first-valley switching and the other is second-valley switching after blanking time. In AVS, two successive occurrences of first-valley switching and the other two successive occurrences of second-valley switching is alternatively selected to maximize frequency modulation. As depicted in Figure 34, the switching frequency hops when the input voltage is high. The internal timing diagram of AVS is described in Figure 35. IDS B tB=15μs VDS ts IDS IDS fs C VDS 1 15μs 1 17 μs Assume the resonant period is 2 μ s 67kHz 59kHz tB=15μs 53kHz 48kHz ts 1 19 μs AVS trigger point Constant frequency CCM IDS IDS 1 21μs Variable frequency within limited range DCM AVS region VDS tB=15μs tW=6μs D D C B A VIN FSQ0465 Rev.00 tsmax=21μs FSQ0465 Rev. 00 Figure 34. Switching Frequency Range Figure 33. QRC Operation with Limited Frequency Vgate AVS Synchronize One-shot Synchronize GateX2 triggering 1st or 2nd is depend on GateX2 tB Vgate continued 2 pulses Vgate continued another 2 pulses 1st valley switching 2nd valley switching fixed fixed fixed VDS Vgate continued 2 pulses fixed de-triggering triggering tB 1st valley switching tB GateX2: Counting Vgate every 2 pulses independent on other signals . fixed fixed 1st or 2nd is dependent on GateX2 tB tB tB 1st valley- 2nd valley frequency modulation. Modulation frequency is approximately 17kHz. FSQ0465 Rev. 00 Figure 35. Alternating Valley Switching (AVS) © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 16 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation 8. AVS (Alternating Valley Switching): Due to the quasi-resonant operation with limited frequency, the switching frequency varies depending on input voltage, load transition, and so on. At high input voltage, the switching on time is relatively small compared to low input voltage. The input voltage variance is small and the switching frequency modulation width becomes small. To improve the EMI performance, AVS is enabled when input voltage is high and the switching on time is small. tsmax=21μs Due to the combined scheme, FPS shows better noise immunity than conventional PWM controller and MOSFET discrete solutions. Furthermore, internal drain current sense eliminates noise generation caused by a sensing resistor. There are some recommendations for PCB layout to enhance noise immunity and suppress the noise inevitable in power-handling components. There are typically two grounds in the conventional SMPS: power ground and signal ground. The power ground is the ground for primary input voltage and power, while the signal ground is ground for PWM controller. In FPS, those two grounds share the same pin, GND. Normally the separate grounds do not share the same trace and meet only at one point, the GND pin. More, wider patterns for both grounds are good for large currents by decreasing resistance. Capacitors at the VCC and FB pins should be as close as possible to the corresponding pins to avoid noise from the switching device. Sometimes Mylar® or ceramic capacitors with electrolytic for VCC is better for smooth operation. The ground of these capacitors needs to connect to the signal ground (not power ground). Figure 36. Recommended PCB Layout The cathode of the snubber diode should be close to the Drain pin to minimize stray inductance. The Y-capacitor between primary and secondary should be directly connected to the power ground of DC link to maximize surge immunity. Because the voltage range of feedback and sync line is small, it is affected by the noise of the drain pin. Those traces should not draw across or close to the drain line. When the heat sink is connected to the ground, it should be connected to the power ground. If possible, avoid using jumper wires for power ground and drain. Mylar® is a registered trademark of DuPont Teijin Films. © 2008 Fairchild Semiconductor Corporation FSQ0465RS/RB Rev. 1.0.1 www.fairchildsemi.com 17 FSQ0465RS/RB — Green-Mode Farichild Power Switch (FPS™) for Quasi-Resonant Operation PCB Layout Guide Application FPS™ Device Input Voltage Range Rated Output Power Output Voltage (Maximum Current) LCD Monitor Power Supply FSQ0465RS 85-265VAC 40W 5.0V (2.0A) 13V (2.3A) Features ! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ! Low standby mode power consumption (
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