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HCPL0700, HCPL0701, HCPL0730, HCPL0731
Low Input Current High Gain Split Darlington Optocouplers
Single Channel: HCPL0700, HCPL0701, Dual Channel: HCPL0730, HCPL0731
Features
Description
■ Low input current: 0.5mA
The HCPL0700, HCPL0701, HCPL0730 and HCPL0731
optocouplers consist of an AlGaAs LED optically coupled
to a high gain split darlington photodetector housed in a
compact 8-pin small outline package. The HCPL0730
and HCPL0731 devices have two channels per package
for optimum mounting density.
■ Superior CTR: 2000%
■ Superior CMR – 10 kV/µs
■ CTR guaranteed 0°C to 70°C
■ U.L. Recognized (file# E90700)
■ VDE 0884 recognized (file# 136616)
The split darlington configuration separating the input
photodiode and the first stage gain from the output transistor permits lower output saturation voltage and higher
speed operation than possible with conventional darlington phototransistor optocoupler.
– approval pending for HCPL0730/0731
■ BSI recognized (file# 8661, 8662)
– HCPL0700/0701 only
Applications
The combination of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL
requirements.
■ Digital logic ground isolation
■ Telephone ring detector
■ EIA-RS-232C line receiver
■ High common mode noise line receiver
■ µP bus isolation
■ Current loop receiver
Schematics
N/C 1
8 VCC
+ 1
8 VCC
V
F1
+ 2
7 VB
_ 2
7 V01
V
F
_
3
6 VO
_
3
6 V02
V
F2
N/C 4
5 GND
HCPL0700 / HCPL0701
©2003 Fairchild Semiconductor Corporation
HCPL0700, HCPL0701, HCPL0730, HCPL0731 Rev. 1.0.1
Truth Table
LED
+ 4
5 GND
VO
ON
LOW
OFF
HIGH
HCPL0730 / HCPL0731
www.fairchildsemi.com
HCPL0700, HCPL0701, HCPL0730, HCPL0731 — Low Input Current High Gain Split Darlington Optocouplers
April 2009
Symbol
Parameter
Value
Units
TSTG
Storage Temperature
-40 to +125
°C
TOPR
Operating Temperature
-40 to +85
°C
Reflow Temperature Profile (Refer to page 12)
EMITTER
IF (avg)
DC/Average Forward Input Current
20
mA
IF (pk)
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
40
mA
Peak Transient Input Current - (≤1 µs P.W., 300 pps)
IF (trans)
1.0
A
VR
Reverse Input Voltage
5
V
PD
Input Power Dissipation
35
mW
Average Output Current (Pin 6)
60
mA
DETECTOR
IO (avg)
VEBR
Emitter-Base Reverse Voltage
HCPL0700/HCPL0701
0.5
V
VCC, VO
Supply Voltage, Output Voltage
HCPL0700/HCPL0730
-0.5 to 7
V
HCPL0701/HCPL0731
-0.5 to 18
PD
Output power dissipation
©2003 Fairchild Semiconductor Corporation
HCPL0700, HCPL0701, HCPL0730, HCPL0731 Rev. 1.0.1
100
mW
www.fairchildsemi.com
2
HCPL0700, HCPL0701, HCPL0730, HCPL0731 — Low Input Current High Gain Split Darlington Optocouplers
Absolute Maximum Ratings (TA = 25°C unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Individual Component Characteristics
Symbol
Parameter
Test Conditions
Device
Min. Typ.* Max
Unit
EMITTER
VF
Input Forward
Voltage
IF = 1.6mA
TA = 25°C
HCPL0700/01
1.0
HCPL0730/31
1.25
BVR
V
1.35
All
Input Reverse
TA =25°C, IR = 10µA
Breakdown Voltage
1.7
1.75
All
5.0
DETECTOR
IOH
Logic High Output
Current
IF = 0mA, VO = VCC = 18V
HCPL0701/31
0.01
100
IF = 0mA, VO = VCC = 7V
HCPL0700/30
0.01
250
ICCL
Logic Low Supply
Current
IF = 1.6mA, VO = Open, VCC = 18V
HCPL0700/01
0.4
1.5
HCPL0730
0.8
3
HCPL0731
1
Logic High
Supply Current
IF = 0mA, VO = Open, VCC = 18V
IF1 = IF2 = 1.6mA, VCC = 7V
VO1 = VO2 = Open, VCC = 18V
ICCH
HCPL0700/01
µA
mA
10
IF1 = IF2 = 0, VCC = 7V
HCPL0730
0.001
VO1 = VO2 = Open, VCC = 18V
HCPL0731
0.01
µA
20
Transfer Characteristics
Symbol
CTR
VOL
Parameter
Test Conditions
COUPLED
IF = 0.5mA, VO = 0.4 V, VCC = 4.5V
Current Transfer
Ratio (Note 1, 2)
IF = 1.6mA,
VO = 0.4 V,
VCC = 4.5V
Logic Low Output
Voltage
IF = 0.5mA, IO = 2mA, VCC = 4.5V
IF = 1.6mA, IO = 8mA, VCC = 4.5V
Device
Min. Typ.* Max. Unit
HCPL0701/31
400
5000
HCPL0700
300
2600
HCPL0701
500
2600
HCPL0730
300
5000
HCPL0731
500
5000
HCPL0701
HCPL0731
0.4
V
0.4
IF = 5mA, IO = 15mA, VCC = 4.5V
0.4
IF = 12mA, IO = 24mA, VCC = 4.5V
0.4
IF = 1.6mA, IO = 4.8mA, VCC = 4.5V
%
HCPL0700/0730
0.4
Isolation Characteristics
Symbol
II-O
Characteristics
Test Conditions
Input-Output
Insulation Leakage Current
Relative humidity = 45%,
TA = 25°C, t = 5 s,
VI-O = 3000 VDC (Note 4)
VISO
Withstand Insulation Test
Voltage
RH ≤ 50%, TA = 25°C,
II-O ≤ 2µA, t = 1 min.
(Note 4, 5)
RI-O
Resistance (Input to Output)
VI-O = 500 VDC (Note 4)
Min.
Typ.*
2500
Max.
Unit
1.0
µA
VRMS
1012
Ω
*All typicals at TA = 25°C
©2003 Fairchild Semiconductor Corporation
HCPL0700, HCPL0701, HCPL0730, HCPL0731 Rev. 1.0.1
www.fairchildsemi.com
3
HCPL0700, HCPL0701, HCPL0730, HCPL0731 — Low Input Current High Gain Split Darlington Optocouplers
Electrical Characteristics (TA = 0 to 70°C unless otherwise specified)
Switching Characteristics (VCC = 5V)
Symbol
TPHL
Parameter
Propagation Delay
Time to Logic Low
(Note 2) (Fig. 14)
Test Conditions
Device
RL = 4.7kΩ, IF = 0.5mA
TA = 25°C
RL = 270 Ω, IF = 12mA
TA = 25°C
RL = 2.2 kΩ, IF = 1.6mA
TA = 25°C
TPLH
Propagation Delay
Time to Logic High
(Note 2) (Fig. 14)
RL = 4.7 kΩ, IF = 0.5mA
Min.
Typ.*
Max.
Unit
HCPL0701
30
µs
HCPL0731
120
HCPL0701
3
25
HCPL0731
5
100
HCPL0701
2
HCPL0731
3
HCPL0701
0.3
1
HCPL0731
0.4
2
HCPL0700
15
HCPL0730/0731
25
HCPL0700
1
10
HCPL0730/0731
2
20
HCPL0701/31
TA = 25°C
RL = 270 Ω, IF = 12mA
TA = 25°C
RL = 2.2 kΩ, IF = 1.6mA
90
HCPL0701/31
12
HCPL0701
10
HCPL0731
15
HCPL0701
1.6
7
HCPL0731
1.6
10
HCPL0700/30/31
TA = 25°C
|CMH|
Common Mode
Transient
Immunity at
Logic High
IF = 0mA, |VCM| = 10 VP-P ,
TA = 25°C, RL = 2.2kΩ
(Note 3) (Fig. 15)
|CML|
Common Mode
Transient
Immunity at
Logic Low
IF = 1.6mA, |VCM| = 10 VP-P ,
TA = 25°C, RL = 2.2 kΩ
(Note 3) (Fig. 15)
µs
60
50
HCPL0700/30/31
7
35
ALL
1,000
10,000
V/µs
ALL
1,000
10,000
V/µs
*All typicals at TA = 25°C
Notes:
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF,
times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the
leading edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic high state
(i.e., VO > 2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt
on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state
(i.e., VO